United States Patent (19)
`Ogura et al.
`
`54) DISTORTION COMPENSATION CIRCUIT
`75 Inventors: Satoshi Ogura; Kiyoharu Seino;
`Tomohiko Ono, Akihiro Kamikokura;
`Haruzo Hirose, all of Tokyo, Japan
`73 Assignee: Mitsubishi Denki Kabushiki Kaisha,
`Tokyo, Japan
`
`21 Appl. No.: 635,710
`22 Filed:
`Apr. 22, 1996
`Foreign Application Priority Data
`30
`Apr. 28, 1995
`JP
`Japan .................................... 7-105923
`Oct. 2, 1995
`JP
`Japan .................................... T-255071
`(51) Int. Cl." ........................................................ HO3F 1/26
`52 U.S. Cl. ........................... 330/149; 330/277; 330/296
`58 Field of Search ..................................... 330/149, 277,
`330/296,289, 295
`
`56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`4,011,518 3/1977 Irvine et al. ........................ 330/277 X
`4,392.252 7/1983 Cluniat .............
`... 455/116
`4,532,477 7/1985 Green, Jr. et al.
`... 330/149
`4,564,816
`1/1986 Kumar et al. ....
`... 330/149
`4,682,119 7/1987 Michel .............
`... 330/149
`5,138,275 8/1992 Abbiati et al. .......................... 330/149
`5,162,748 11/1992 Katz ........................................ 330/149
`5,363,058 11/1994 Sasaki ................................. 330/277 X
`FOREIGN PATENT DOCUMENTS
`0040127 11/1981 European Pat. Off..
`
`USOO5815038A
`Patent Number:
`11
`(45) Date of Patent:
`
`5,815,038
`Sep. 29, 1998
`
`European Pat. Off..
`O190073 8/1986
`European Pat. Off..
`O 451 909 A2 10/1991
`European Pat. Off..
`O451909 10/1991
`Germany.
`35 26 748 A1 1/1987
`Japan .
`53-085142 7/1978
`Japan .
`4-292005 A 10/1992
`Japan .
`5-235646 A 9/1993
`Japan .
`6-69731. A 3/1994
`7-7333 A 1/1995 Japan.
`2020500 11/1979 United Kingdom.
`OTHER PUBLICATIONS
`Masatoshi Nakayama, et all “A Novel Amplitude and Phase
`Linearizing Technique for Microwave Power Amplifiers'
`1995 IEEE Mitsubishi Electric Corporation.
`Rodrigo Cordeiro Tupynamba & Edmar Camargo "Mesfelt
`Nonlinearities Applied to Predistortion Linearization
`Design” 1992 IEEE MTT-S Digest.
`Satoshi Ogura, Kiyoharu Seino, Toshihiko Ozawa, Akihiro
`Kamikokura, Tadashi Takagi and Haruzo Hirose “A Linear
`ized C-band Solid State Power Amplifier for Satellite Use”
`Mitsubishi Electric Corp. pp. 567-570.
`Primary Examiner Steven Mottola
`Attorney, Agent, or Firm Wolf, Greenfield & Sacks, P.C.
`57
`ABSTRACT
`A Small-sized distortion compensation circuit is disclosed.
`In a Semi-conductor element having three terminals, its gate
`is used as an input terminal. One of the drain and Source is
`used as an output terminal, and the other is grounded. This
`structure does not need a conventionally used circuit com
`prising a complicated combination of distributors, couplers
`and attenuators, enabling the circuit to be Smaller.
`
`18 Claims, 20 Drawing Sheets
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`7
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`INPUT
`CIRCUIT
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`8
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`OUTPUT
`CIRCUIT
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`LE gor“bi
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`-000
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`HETd
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`vS
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`€S
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`-/0G8p9S Pod
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`wofoneneqeseene
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`Sheet 11 of 20
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`GAIN
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`PHASE
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`INPUT POWER
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`
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`SS-
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`INPUT POWER
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`GAN
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`PHASE
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`INPUT POWER
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`Fig. 15A
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`INPUT POWER
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`Fig. 15B
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`Sheet 13 0f 20
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`GATE
`BAS
`CIRCUIT
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`DRAIN
`BAS
`CIRCUIT
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`Sheet 14 of 20
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`5,815,038
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`FET
`
`DRAN
`
`Vds VOLTAGE BETWEEN DRAIN AND SOURCE
`ld DRAIN CURRENT
`Vgs = VOLTAGE BETWEEN GATE AND SOURCE
`
`Fig. 17A
`
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`Vgs=CONSTANT
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`-Vds
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`VgS=
`CONSTANT
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`+Vds
`KNEE VOLTAGE
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`V-d
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`RANGE IN WHICH THE PREFERRED
`EMBODIMENTS APPLICABLE,
`
`Fig. 17B
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`Sep. 29, 1998
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`Sheet 15 of 20
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`Fig. 18A
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`Fig. 18B
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`Sheet 16 of 20
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`5,815,038
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`Al GAN
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`
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`PHASE
`
`
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`NCREASING IN
`Bis VOLTAGE
`
`...
`
`INPUT POWER
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`Fig. 19A
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`-
`
`INCREASING IN
`, BAS VOLTAGE
`
`INPUT POWER
`
`Fig. 19B
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`Sep. 29, 1998
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`Sheet 17 0f 20
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`5,815,038
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`GAIN
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`PHASE
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`
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`Fig. 20A
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`/INCREASING IN
`TEMPERATURE
`
`INPUT POWER
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`INCREASING IN
`TEPERATURE
`
`INPUT POWER
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`Fig. 20B
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`Page 18 of 29
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`Sep. 29, 1998
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`Sheet 18 of 20
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`5,815,038
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`70
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`
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`GATE
`BAS
`CIRCUIT
`72-1
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`DRAIN
`BAS
`CIRCUIT
`N-73
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`Fig. 21A
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`8O
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`7
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`3
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`8
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`OUTPUT
`CIRCUIT
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`DRAN
`BAS
`CIRCUIT
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`71
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`GATE
`BAS
`CIRCUIT
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`70
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`Fig. 21B
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`Sheet 19 of 20
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`5,815,038
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`GAN
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`NCREASING
`INTEMPERATURE
`-o-
`
`PHASE
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`
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`
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`INPUT POWER
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`Fig. 22A
`
`- Co
`INCREASING
`INTEMPERATURE
`INPUT POWER
`
`Fig. 22B
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`Page 20 of 29
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`Sep. 29, 1998
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`Sheet 20 of 20
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`5,815,038
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`OUTPUT
`CIRCUIT
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`BAS
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`BAS
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`Sb. DS
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`1
`DISTORTION COMPENSATION CIRCUIT
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`5,815,038
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`2
`distributor 63 has the same amplitude characteristic as that
`of the output signal applied to the input terminal 59. The
`output Signal is adjusted in level in the Second variable
`attenuator 65, and then inputted to the other input terminal
`61 of the fourth coupler 55 via the third coupler 54. The
`Signals inputted to the input terminals 60 and 61 are made in
`phase before being combined in the fourth coupler 55. An
`output signal having an amplitude characteristic shown by
`the curve D, is obtained at an output terminal 2.
`The phase characteristic of the linearizer is similar to the
`amplitude characteristic described above. The phase char
`acteristics of the output signals of the distortion generating
`amplifier 48 and linear amplifier 49 for the power of the
`input signal are shown by the curves E and F in FIG. 14,
`respectively. A signal with a phase characteristic shown by
`the curve G is outputted to the input terminal 60. The signals
`inputted to the input terminals 60 and 61 with the phase
`characteristics G and F are made in phase before being
`combined in the fourth coupler 55. An output signal with a
`phase characteristic shown by the curve H, is obtained at an
`output terminal 2.
`In general, the amplitude characteristic of an output signal
`of a high frequency amplifier show that the gain decreases
`with the increase in power of the input Signal, as shown by
`the curve I in FIG. 15A. In a linearizer, in contrast, the gain
`gradually increases with the increase in power of the input
`signal, as shown by the curve D in FIG. 13. An ideal
`amplitude characteristic shown by the curve J can be
`obtained by connecting the linearizer to the input terminal of
`a high frequency amplifier. The linearizer can Suppress the
`generation of distorted waves in the high frequency
`amplifier, leading to good linearity of an output signal.
`With regard to the phase characteristic, a high frequency
`amplifier has a phase characteristic shown by the curve Kin
`FIG. 15B, whereas the linearizer has a phase characteristic
`shown by the curve H. Good linearity of an output signal of
`the high frequency amplifier can be obtained by inputting an
`output signal of the linearizer to the high frequency ampli
`fier.
`Current linearizers have the above described Structure, in
`which the couplers 52,53,54 and 55, and attenuators 50, 51,
`64 and 65 are included. These make the linearizer large in
`Size and costly.
`The characteristics of the amplifiers 48 and 49, and
`attenuators 50, 51, 64 and 65 need to be adjusted according
`to the characteristic of an amplifier whose distorted waves
`are to be compensated. Considerable time is necessary for
`precisely adjusting the output signal of the linearizer due to
`its complicated Structure.
`The combination of the attenuators 50, 51, 64 and 65, and
`equi-power distributorS 62 and 63 causes a very large power
`loSS in the whole linearizer, requiring a large gain in a high
`frequency amplifier connected to the linearizer.
`Consequently, the number of Sections in the high frequency
`amplifier needs to be increased, resulting in a decrease in the
`power efficiency of the high frequency amplifier.
`The combination of the couplers 52, 53, 54 and 55 and
`attenuators 50, 51, 64 and 65 causes the applicable fre
`quency band of the whole linearizer to be narrower than the
`frequency band of the individual elements.
`SUMMARY OF THE INVENTION
`In order to solve the above problems, the present inven
`tion provides a distortion compensation circuit (linearizer)
`which has a Small size, reduced power loSS and large
`applicable frequency band, and which has an output signal
`that is easy to adjust.
`
`15
`
`40
`
`BACKGROUND OF THE INVENTION
`1. Field of the invention
`The present invention relates to a distortion compensation
`circuit for compensating non-linear distortion generated in
`output signals of high frequency amplifiers.
`2. Description of the related arts
`The non-linearity of Semi-conductors used in a high
`power high frequency amplifier brings about distorted waves
`in output signals of the amplifier. Many distortion compen
`sation circuits (called "linearizer(s)' hereafter) are used for
`compensating the non-linear distortion. The linearizers are
`classified into two types. One is a pre-distortion type,
`disposed before an amplifier whose distorted output signals
`are to be compensated. Output signals of the pre-distortion
`type linearizer are inputted to the amplifier. The other is a
`feed forward type, combining distorted output Signals of the
`amplifier and those of the feed forward type linearizer in
`order to compensate the distortion. The former pre
`distortion type is often used due to its good power efficiency.
`An equivalent circuit of a current pre-distortion type
`linearizer disclosed at 1994 Asia Pacific Microwave Con
`ference (pp. 567-570) is shown in FIG. 12. In this linearizer,
`25
`a distortion generating amplifier 48, a first attenuator 50 and
`a first equi-power distributor 62 are Successively connected
`to one of the output terminals 56 of a first coupler 52. A
`second attenuator 51, a linear amplifier 49 and a second
`equi-power distributor 63 are Successively connected to the
`other output terminal 57 of the first coupler 52. The output
`terminal of the first equi-power distributor 62 and one of the
`output terminals of the Second equi-power distributor 63 are
`connected to the input terminals 58 and 59 of a second
`coupler 53, respectively. The output terminal of the second
`coupler 53 is connected to an input terminal 60 of a fourth
`coupler 55 via a first variable attenuator 64. The other output
`terminal of the second equi-power distributor 63 is con
`nected to the other input terminal 61 of the fourth coupler 55
`via a second variable attenuator 65 and a third coupler 54.
`This linearizer is formed on a dielectric Substrate by means
`of microwave integrated circuit technology. Field-effect
`transistors (FETS) are used in the distortion generating
`amplifier 48 and linear amplifier 49, and thin film resistors
`made of tantalum nitride are used in the attenuators.
`45
`The operation of this linearizer is described below. A
`Signal inputted from an input terminal 1 of the first coupler
`52 is divided into two equal Signals. The divided signals are
`outputted from the output terminals 56 and 57, and supplied
`to the distortion generating amplifier 48 and linear amplifier
`49, respectively, in order to be amplified. The output termi
`nal of the distortion generating amplifier 48 is connected to
`the first attenuator 50, whereas the input terminal of the
`linear amplifier 49 is connected to the second attenuator 51.
`Therefore, the distortion generating amplifier 48 is Saturated
`prior to the linear amplifier 49. The amplitude characteristics
`of the output Signals of the distortion generating amplifier 48
`and linear amplifier 49, for varying power input Signals are
`shown by the curves A and B respectively in FIG. 13. The
`two output signals are outputted to the terminals 58 and 59
`via the equi-power distributors 62 and 63, respectively. The
`outputted Signals are made tradian out of phase each other
`before being combined in the Second coupler 53. A signal
`formed by the Signal combining is adjusted in level, and then
`outputted to the input terminal 60 with an amplitude char
`acteristic shown by the curve C in FIG. 13. An output signal
`from the other output terminal of the Second equi-power
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`In a linearizer provided by the present invention, a Semi
`conductor element is used without an external direct current
`(D.C.) bias applied to it. The amplitude and phase charac
`teristics of this linearizer are inverse to those of a high
`frequency amplifier connected Successively.
`In a linearizer provided by the present invention, at least
`one of the terminals of the Semi-conductor element is
`grounded via a return circuit including a resistor. The
`amplitude and phase characteristics of an output Signal are
`adjusted by varying the level of D.C. by changing the
`resistance of the resistor included in the return circuit.
`In a linearizer provided by the present invention, at least
`one of the terminals of the Semi-conductor element is
`grounded via a return circuit including a capacitor. The
`amplitude and phase characteristics of an output Signal are
`adjusted by varying the impedance to a high frequency
`Signal through the capacitor included in the return circuit.
`In a linearizer provided by the present invention, a Semi
`conductor element is used with an external D.C. bias applied
`to one of its terminals. The amplitude and phase character
`istics of an output Signal are electrically adjusted by varying
`the external D.C. bias.
`In a linearizer provided by the present invention, an
`external D.C. bias is applied to the Semi-conductor element
`via a diode. The amplitude and phase characteristics of an
`output signal can be adjusted by controlling the polarity of
`D.C. by applying the external D.C. bias via the diode.
`In a linearizer provided by the present invention, a vari
`able attenuator is connected before an input circuit. The
`amplitude and phase characteristics of an output Signal are
`adjusted by varying the amplitude of a high frequency Signal
`inputted to a semi-conductor element by adjusting the
`attenuator.
`In a linearizer provided by the present invention, an
`amplifier is connected before an input circuit. The amplitude
`and phase characteristics of an output Signal are adjusted by
`varying the amplitude of a high frequency Signal inputted to
`a Semi-conductor element through the amplifier connected
`before the input circuit. This structure of the linearizer
`realizes reduced power loSS.
`In a linearizer provided by the present invention, a plu
`rality of linearizers are Serially connected by couplers. Good
`reflection characteristics of input and output signals are
`achieved by forming a balanced circuit.
`In a linearizer provided by the present invention, a plu
`rality of amplifier modules can be multi-sectionally
`connected, and at least one of the amplifier modules is used
`without an external D.C. bias applied. This structure of the
`linearizer realizes reduced distortion of a high frequency
`amplifier without connecting an external linearizer.
`In a linearizer provided by the present invention, a nega
`tive D.C. bias is applied to a gate of the Semi-conductor
`element, and a negative or positive D.C. bias below a knee
`Voltage is applied to a drain of the Semi-conductor element.
`In a linearizer provided by the present invention, the D.C.
`bias applied to the gate or drain of the Semi-conductor
`element is varied with temperature.
`In a linearizer provided by the present invention, an input
`level adjusting circuit having a variable attenuator or a
`variable gain amplifier is connected before the input circuit.
`In a linearizer provided by the present invention, an
`output level of the input level adjusting circuit increases
`with the increase in temperature.
`In a linearizer provided by the present invention, an
`output level adjusting circuit having a variable attenuator or
`
`4
`variable gain amplifier is connected after the output circuit
`as well as the input level adjusting circuit connected before
`the input circuit.
`In a linearizer provided by the present invention, output
`levels of the input level and output level adjusting circuits
`increase with the increase in temperature.
`In a linearizer provided by the present invention, a plu
`rality of amplifier modules are multi-Sectionally connected,
`and a D.C. bias below a knee Voltage is applied to at least
`one of the amplifier modules.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 shows an equivalent circuit of a distortion com
`pensation circuit (linearizer) according to the first embodi
`ment of the present invention.
`FIG. 2A shows an input or output circuit comprising
`transmission lines.
`FIG. 2B Shows an input or output circuit comprising
`transmission lines having an impedance adjusting function.
`FIG. 3A shows a simplified equivalent circuit of a semi
`conductor element.
`FIG. 3B shows another simplified equivalent circuit of a
`Semi-conductor element.
`FIG. 4 shows an equivalent circuit of a linearizer accord
`ing to the Second embodiment of the present invention.
`FIG. 5 shows an equivalent circuit of a linearizer accord
`ing to the third embodiment of the present invention.
`FIG. 6 shows an equivalent circuit of a linearizer accord
`ing to the fourth embodiment of the present invention.
`FIG. 7 shows an equivalent circuit of a linearizer accord
`ing to the fifth embodiment of the present invention.
`FIG. 8 shows an equivalent circuit of a linearizer accord
`ing to the Sixth embodiment of the present invention.
`FIG. 9 shows an equivalent circuit of a linearizer accord
`ing to the Seventh embodiment of the present invention.
`FIG. 10A shows an equivalent circuit of a linearizer
`according to the eighth embodiment of the present inven
`tion.
`FIG. 10B shows another equivalent circuit of a linearizer
`according to the eighth embodiment of the present inven
`tion.
`FIG. 11 shows a block diagram of a high frequency
`amplifier having a linearizer according to the ninth embodi
`ment of the present invention.
`FIG. 12 shows an equivalent circuit of a conventional
`linearizer.
`FIG. 13 represents the operation of a conventional lin
`earizer using an amplitude characteristic for input power.
`FIG. 14 represents the operation of a conventional lin
`earizer using a phase characteristic for input power.
`FIG. 15A represents distortion compensation for a high
`frequency amplifier by a current linearizer using an ampli
`tude characteristic for input voltage.
`FIG. 15B represents distortion compensation for a high
`frequency amplifier by a current linearizer using a phase
`characteristic for input Voltage.
`FIG.16 shows an equivalent circuit of a linearizer accord
`ing to the tenth embodiment of the present invention.
`FIG. 17A shows a circuit representing the connection of
`an FET.
`FIG. 17B shows the static characteristic and a knee
`voltage of the FET shown in FIG. 17A.
`
`15
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`FIG. 18A shows an input or output circuit comprising
`transmission lines.
`FIG. 18B shows an input or output circuit comprising
`transmission lines having an impedance adjusting function.
`FIG. 19 Ashows gain plotted against the D.C. bias voltage
`in a linearizer according to the eleventh embodiment of the
`present invention.
`FIG. 19B shows phase plotted against the D.C. bias
`Voltage in a linearizer according to the eleventh embodiment
`of the present invention.
`FIG. 20A shows the temperature-dependence of the gain
`of a high frequency amplifier according to the eleventh
`embodiment of the present invention.
`FIG.20B shows the temperature-dependence of the phase
`of a high frequency amplifier according to the eleventh
`embodiment of the present invention.
`FIG. 21A shows an equivalent circuit of a linearizer
`according to the twelfth embodiment of the present inven
`tion.
`FIG.21B shows another equivalent circuit of a linearizer
`according to the twelfth embodiment of the present inven
`tion.
`FIG.22A Shows temperature-dependence of the gain of a
`linearizer according to the thirteenth embodiment of the
`present invention.
`FIG.22B shows temperature-dependence of the phase of
`a linearizer according to the thirteenth embodiment of the
`present invention.
`FIG.23 shows an equivalent circuit of a linearizer accord
`ing to the fourteenth embodiment of the present invention.
`FIG. 24 shows a block diagram of a high frequency
`amplifier according to the Sixteenth embodiment of the
`present invention.
`
`15
`
`25
`
`35
`
`6
`current. Therefore, the virtual current Source 13 can be
`replaced with a virtual Voltage Supply 16. The linearizer can
`be expressed as an equivalent circuit shown in FIG. 3B. The
`transfer function of this equivalent circuit is expressed using
`a load impedance ZO by the following equation:
`
`2Zo
`1.
`+joCdSRds
`
`Rds
`
`It is known that in the Semi-conductor elements having
`three terminals, Such as FETs, the increase in the Voltage of
`an input signal is accompanied with the transfer from a
`linear operation to a large-signal operation, and a resistance
`Rs 15 between the drain 5 and Source 6 gradually decreases
`with the transfer, as shown at the autumn meeting of The
`Institute of Electronics, Information and Communication
`(1993, C-24). In Equation (1) above, the amplitude IV
`of
`an output signal increases and the passing phase Z.V.
`decreases, when the resistance R. 15 decreases. With the
`increase in the Voltage of the input Signal, the amplitude
`IV
`of the output signal increases, and the passing phase
`ZV, decreases. Consequently, the amplitude and phase
`characteristics of the output signal for the input signal of the
`semi-conductor element 3 are shown by the curves D and H
`in FIG. 15A and FIG. 15B, respectively, as those of a current
`linearizer.
`An ideal amplitude characteristic of the output Signal
`shown by the curve J can be obtained by connecting the
`linearizer to the input terminal of a high frequency amplifier.
`Distorted waves generated in the amplifier can be Sup
`pressed using this linearizer to obtain an output signal
`having good linearity.
`This linearizer is very simple compared with a conven
`tional one. The size of the linearizer can be reduced.
`The applicable frequency band of this linearizer can be
`extended because neither couplers nor attenuators are used.
`Second embodiment
`FIG. 4 shows an equivalent circuit of a linearizer accord
`ing to the Second embodiment of the present invention. The
`gate 4 included in a linearizer shown in the first embodiment
`is grounded via a return circuit including a resistance 17.
`The operation, and amplitude and phase characteristics, of
`this linearizer are the Same as those described in the first
`embodiment. The process for compensating the non
`linearity of a high frequency amplifier Successively con
`nected to this linearizer using an output signal of the latter
`is also the same as that shown in the first embodiment.
`In this linearizer, the level of D.C. can be varied by
`changing the resistance 17 included in the return circuit. The
`amplitude and phase characteristics of an output signal can
`be precisely adjusted. The amplitude and phase character
`istics of the output signal are shown by the curves D and H
`in FIGS. 15A and 15B. They can be appropriately adjusted
`in response to the characteristic of a high frequency ampli
`fier which is Successively connected to the linearizer, the
`distortion of which is to be compensated.
`Third embodiment
`FIG. 5 shows an equivalent circuit of a linearizer accord
`ing to the third embodiment of the present invention. The
`drain 5 included in a linearizer shown in the first embodi
`ment is grounded via a return circuit including a capacitance
`18.
`The operation, and amplitude and phase characteristics, of
`this linearizer are the Same as those described in the first
`embodiment. The process for compensating the non
`linearity of a high frequency amplifier Successively con
`
`DESCRIPTION OF THE PREFERRED
`EMBODIMENTS
`
`First embodiment
`FIG. 1 shows an equivalent circuit of a distortion com
`40
`pensation circuit (linearizer) according to the first embodi
`ment of the present invention. This linearizer has an input
`terminal 1 and output terminal 2. In this linearizer, an input
`circuit 7 and output circuit 8 are connected to a gate 4 and
`drain 5 of a Semi-conductor element 3, respectively. A Source
`6 of the Semi-conductor element 3 is grounded. An external
`D.C. bias is not applied to any of the gate 4, drain 5 or Source
`6. The input circuit 7 and output circuit 8 in this distortion
`circuit are used for obtaining required amplitude and phase
`characteristics. FIGS. 2A and 2B show examples of the input
`50
`circuit 7 and output circuit 8. The circuitry shown in FIG. 2A
`comprises a transmission line 9 having a characteristic
`impedance equal to a power Source impedance or load
`impedance. The circuitry shown in FIG. 2B comprises the
`transmission lines 9 and an impedance adjusting Stub 10,
`thus implementing an impedance adjusting function.
`The operation of the linearizer will be described. In
`general, Semi-conductor elements having three terminals,
`Such as FETs, are simply expressed by an equivalent circuit
`shown in FIG. 3A. This equivalent circuit has a resistance 11
`between the gate 4 and Source 6, capacitance 12 between the
`gate 4 and Source 6, and Virtual current Source 13 dependent
`on a Voltage Vg acroSS the capacitance 12 between the gate
`4 and Source 6. It also has a capacitance 14 and resistance
`15 between the drain 5 and Source 6. When the external D.C.
`bias is not applied to the Semi-conductor element 3 in this
`linearizer, the virtual current Source 13 outputs a constant
`
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`Page 24 of 29
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`

`

`5,815,038
`
`1O
`
`15
`
`25
`
`35
`
`40
`
`7
`nected to this linearizer using an output signal of the latter
`is also the same as that shown in the first embodiment.
`In this linearizer, a terminal of the Semi-conductor ele
`ment 3 is grounded via a return circuit including the capaci
`tance 18. The amplitude and phase characteristics of an
`output Signal can be precisely adjusted by varying the
`impedance for a high frequency Signal. The amplitude and
`phase characteristics of the output Signal are shown by the
`curves D and H in FIGS. 15A and 15B. They can be
`appropriately adjusted in response to the characteristic of a
`high frequency amplifier which is Successively connected to
`the linearizer, the distortion of which is to be compensated.
`Fourth embodiment
`FIG. 6 shows an equivalent circuit of a linearizer accord
`ing to the fourth embodiment of the present invention. Abias
`line 19 is connected only to the gate 4 of the semi-conductor
`element. An external D.C. bias Vg is applied from a terminal
`20. A capacitor 21 is connected So that a high frequency
`Signal leaking into the bias line 19 is short-circuited to the
`ground.
`The operation, and amplitude and phase characteristics, of
`this linearizer are the same as those described in the first
`embodiment. The process for compensating the non
`linearity of a high frequency amplifier Successively con
`nected to this linearizer using an output signal of the latter
`is also the same as that shown in the first embodiment.
`In this linearizer, the amplitude and phase characteristics
`of an output signal can be precisely and electrically adjusted
`by varying the external D.C. bias applied to the gate 4 of the
`Semi-conductor element 3. The amplitude and phase char
`acteristics of the output signal are shown by the curves D
`and H in FIGS. 15A and 15B. They can be appropriately
`adjusted electrically in response to the characteristic of a
`high frequency amplifier which is Successively connected to
`the linearizer, the distortion of which is to be compensated.
`Fifth embodiment
`FIG. 7 shows an equivalent circuit of a linearizer accord
`ing to the fifth embodiment of the present invention. A diode
`22 is further included in a linearizer shown in the fourth
`embodiment, and the external D.C. bias Vg inputted to the
`terminal 20 is applied via the diode 22.
`The operation, and amplitude and phase characteristics, of
`this linearizer are the same as those described in the first
`embodiment. The process for compensating the non
`linearity of a high frequency amplifier Successively con
`nected to this linearizer using an output signal of the latter
`is also the same as that shown in the first embodiment.
`In this linearizer, the external D.C. bias is applied via the
`diode 22. The amplitude and phase characteristics of an
`output signal can be precisely adjusted by controlling the
`polarity of D.C.. The amplitude and phase characteristics of
`the output signal are shown by the curves D and H in FIGS.
`15A and 15B. They can be appropriately adjusted in
`response to the characteristic of a high frequency amplifier
`which is Successively connected to the linearizer, the dis
`tortion of which is to be compensated.
`Sixth embodiment
`FIG. 8 shows an equivalent circuit of a linearizer accord
`ing to the Sixth embodiment of the present invention. A
`variable attenuator 23 connected before the input circuit 7 is
`further included in a linearizer shown in the first embodi
`ment.
`The operation, and amplitude and phase characteristics, of
`this linearizer are the same as those described in the first
`embodiment. The process for compensating the non
`linearity of a high frequency amplifier Successively con
`nected to this linearizer using an output signal of the latter
`is also the same as that shown in the first embodiment.
`
`45
`
`50
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`55
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`60
`
`65
`
`8
`In this linearizer, the amplitude and phase characteristics
`of an output Signal can be precisely adjusted by varying the
`amplitude of a high frequency Signal inputted to the Semi
`conductor element 3 by changing the attenuation at the
`attenuator 23. The amplitude and phase characteristics of the
`output signal are shown by the curves D and H in FIGS. 15A
`and 15B. They can be appropriately adjusted in response to
`the characteristic of a high frequency amplifier which is
`Successively connected to the linearizer, the distortion of
`which is to be compensated.
`Seventh embodiment
`FIG. 9 shows an equivalent circuit of a linearizer accord
`ing to the Seventh embodiment of the present invention. A
`dual gate FET 24 connected before the input circuit 7 is
`further included in a linearizer shown in the first embodi
`ment.
`The operation, and amplitude and phase characteristics of
`this linearizer are the Same as those described in the first
`embodiment. The process for compensating the non
`lineari