FILE HISTORY
`US 6,603,343
`
`6,603,343
`PATENT:
`INVENTORS: YAMAGUCHI MAMIKO
`SASAKI YOSHINOBU
`
`TITLE:
`
`Phase correction circuit for transistor using
`high-frequency signal
`
`APPLICATION
`NO:
`FILED:
`ISSUED:
`
`US2002171983A
`
`17 JUN 2002
`05 AUG 2003
`
`COMPILED:
`
`01 DEC 2021
`
`Page 1 of 159
`
`GOOGLE EXHIBIT 1002
`
`

`

`PATENT NUMBER and
`ISSUE DATE
`6603343
`WN&NIN90
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`AUG 0 5 2003
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`U.S. UTILITY Patent Application
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`APP .UM
`1017193
`
`FILING DATE
`06/17/2002
`
`CLASS SUBCLASS GAU
`2816
`327j
`
`____________________-____-
`
`"APPLICANTS:
`
`YaniugUchi Maiko; Sasaki Yoshinobu;
`
`I*CONTINUINO rC.ATA VERlIFED:
`
`"* FOREIGN APPLICAIIONS VERIFIED:
`JAPAN 2001-384257 12/18/2001
`
`PC-PUB 'DO NOT PBLISH
`yes O no
`Foreign prnon't claimd
`yes u no
`35 USC 119 ccinditionmt
`j
`Verified andAcnowa od xamnerss tials
`401739
`j
`TITLE: Phase 'c;orrection circuK for transistor using high-frequency signal
`
`RES
`
`ATTORNEY DOCKET NO
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`6
`U.S:
`-I'
`
`EPT.OC M./PAT.&TM-PTO-436L(Rev 12-94)
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`NOTICE OF ALLOWANCE MAILED
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`PRIMARY EXAMINERA
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`Primary Examiner
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`Ii.atlo Exmie 110
`PREPARED FOR ISSUE
`WARNING; Th infomation disclosed herein may be restricted.
`Unauthorized disclosuremay be prohibited by the United States Code Title 35,
`Sections 122, 181 and 368, Possession outside the U.S. Patent &Trademark
`Office is restricted to authorized employesand contractors only.
`CD-ROM
`MJ
`DISK (CRF)
`FILED WITH:
`(Attached In pocket on right Inside ilap)
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`A
`
`/
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`-
`Page 2 of 159
`
`

`

`6,603,343
`PHASE CORRECTION CIRCUIT FOR TRANSISTOR USING HIGH-
`FREQUENCY SIGNAL
`Transaction History
`
`
`Transaction Description
`Date
`06-17-2002 Workflow - Drawings Finished
`06-17-2002 Workflow - Drawings Matched with File at Contractor
`06-17-2002 Preliminary Amendment
`06-17-2002
`Information Disclosure Statement (IDS) Filed
`06-17-2002
`Information Disclosure Statement (IDS) Filed
`06-17-2002 Request for Foreign Priority (Priority Papers May Be Included)
`06-17-2002
`Initial Exam Team nn
`07-19-2002 Application Is Now Complete
`07-22-2002 Application Dispatched from OIPE
`08-19-2002 Case Docketed to Examiner in GAU
`11-27-2002 Case Docketed to Examiner in GAU
`12-16-2002 Non-Final Rejection
`12-18-2002 Mail Non-Final Rejection
`03-07-2003 Response after Non-Final Action
`03-17-2003 Date Forwarded to Examiner
`04-07-2003 Mail Notice of Allowance
`04-07-2003 Notice of Allowance Data Verification Completed
`04-08-2003 Receipt into Pubs
`04-08-2003 Dispatch to Publications
`04-14-2003 Workflow - File Sent to Contractor
`05-08-2003 Receipt into Pubs
`06-18-2003
`Issue Fee Payment Verified
`06-18-2003
`Issue Fee Payment Received
`06-27-2003 Application Is Considered Ready for Issue
`07-02-2003 Receipt into Pubs
`07-17-2003
`Issue Notification Mailed
`08-05-2003 Recordation of Patent Grant Mailed
`08-05-2003 Patent Issue Date Used in PTA Calculation
`
` 
`
` 
`
`Page 3 of 159
`
`

`

`liIillIIIlillill 1II I
`10171983
`
`jC979 U.S. PTO
`io/171983
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`INITIALS
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`1.
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`9.
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`13.
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`14.
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`15.
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`16.
`
`17.
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`18.
`
`19.
`
`20.
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`21.
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`22.
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`23.
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`24.
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`25.
`
`26.
`
`27.
`
`28.
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`29.
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`30.
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`31.
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`32,
`
`33.
`
`34.
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`35.
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`36.
`
`37.
`
`39.
`
`40.
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`41.
`
`42.
`
`43.
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`48.
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`49.
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`50.
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`51.
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`52.
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`53.
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`55.
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`57.
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`59.
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`60.
`
`Page 4 of 159
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`

`

`0IG INAL
`T SUBCLAS CLASS
`CLAS
`
`.ISSE SLIP STAPLE AREA (for additional cross-references)
`ISSUING CLASSIFICATION
`CROSS REFERENCE(S)
`SUBCLASS (ONE SUBCLASS PER BLOCK)
`
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`CLASSIICATION
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`INDEX OF CLAIMS
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`-
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`-----------------------
`----------------------
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`111
`112
`113
`114
`115
`118
`117
`217
`118
`119
`120
`121
`122
`123
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`/
`-
`Page 5 of 159
`
`

`

`w
`
`CLASSIFICATION NOTES
`Examiner/ {
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`IInitials
`Date
`Class
`
`POSITION
`FEEDETERMINATION
`FILE ASSEMBLY
`QUALITY CHECK
`SCANNING
`CLASSIFIER
`FORMALITYREVIEW
`RESPONSE
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`NAME
`
`ID NO.
`
`DATE
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`
`Page 6 of 159
`
`

`

`I
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`SEARCH
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`Page 7 of 159
`
`

`

`Search Text
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`DBs
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`22 BRS L22 263 i21 and 3
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`
`Page 8 of 159
`
`

`

` Most Frequently Occurring Classifications of Patents Returned
` From A Search of 10171983 on July 29, 2002
`
`Original Classifications
` 4 326/81
` 3 327/333
` 2 257/331
` 2 326/58
` 2 326/68
` 2 438/138
`
`Cross-Reference Classifications
` 7 326/83
` 6 326/81
` 4 257/139
` 4 257/341
` 3 257/129
` 3 257/144
` 3 257/409
` 3 361/111
` 3 361/56
` 2 257/152
` 2 257/331
` 2 326/121
` 2 326/27
` 2 326/34
` 2 326/58
` 2 326/80
` 2 326/86
` 2 326/87
` 2 327/112
` 2 327/205
` 2 327/328
` 2 327/437
` 2 327/545
` 2 365/104
` 2 365/190
` 2 438/133
` 2 438/135
` 2 438/212
` 2 438/259
` 2 438/270
` 2 438/309
`
`Combined Classifications
` 10 326/81
` 7 326/83
` 4 257/139
` 4 257/331
`
`Page 9 of 159
`
`

`

`NNNNNINNNNNNNNNNNNNNNNNNNNNWWWwWwwowowwoppfp
`
` 4 257/341
`257/341
` 4 326/58
`326/58
` 4 327/333
`327/333
` 3 257/129
`257/129
` 3 257/144
`257/144
` 3 257/409
`257/489
` 3 326/27
`326/27
` 3 326/68
`326/68
` 3 326/86
`326/86
` 3 327/205
`327/285
` 3 361/111
`361/111
` 3 361/56
`361/56
` 2 257/152
`257/152
` 2 326/112
`326/112
` 2 326/121
`326/121
` 2 326/21
`326/21
` 2 326/34
`326/34
` 2 326/57
`326/57
` 2 326/63
`326/63
` 2 326/80
`326/80
` 2 326/87
`326/87
` 2 327/112
`327/112
` 2 327/143
`327/143
` 2 327/328
`327/328
` 2 327/374
`327/374
` 2 327/437
`327/437
` 2 327/545
`327/545
` 2 365/104
`365/104
` 2 365/185.21
`365/185.21
` 2 365/185.23
`365/185.23
` 2 365/190
`365/190
` 2 438/133
`438/133
` 2 438/135
`438/135
` 2 438/138
`438/138
` 2 438/212
`438/212
` 2 438/259
`438/259
` 2 438/270
`438/278
` 2 438/309
`438/309
`
`Page 10 of 159
`
`Page 10 of 159
`
`

`

`Titles of Most Frequently Occurring Classifications of Patents Returned
` From A Search of 10171983 on July 29, 2002
`
` 10 326/81 (4 OR, 6 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/62 INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT,
` ETC.)
` 326/80 .Supply voltage level shifting (i.e., interface
` between devices of a same logic family with different
` operating voltage levels)
` 326/81 ..CMOS
`
` 7 326/83 (0 OR, 7 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/62 INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT,
` ETC.)
` 326/82 .Current driving (e.g., fan in/out, off chip
` driving, etc.)
` 326/83 ..Field-effect transistor
`
` 4 257/139 (0 OR, 4 XR)
` Class 257 : ACTIVE SOLID-STATE DEVICES
` 257/107 REGENERATIVE TYPE SWITCHING DEVICE (E.G., SCR,
` COMFET, THYRISTOR)
` 257/133 .Combined with field effect transistor
` 257/139 ..With extended latchup current level (e.g.,
` COMFET device)
`
` 4 257/331 (2 OR, 2 XR)
` Class 257 : ACTIVE SOLID-STATE DEVICES
` 257/213 FIELD EFFECT DEVICE
` 257/288 .Having insulated electrode (e.g., MOSFET, MOS
` diode)
` 257/327 ..Short channel insulated gate field effect
` transistor
` 257/329 ...Gate controls vertical charge flow portion
` of channel (e.g., VMOS device)
` 257/330 ....Gate electrode in groove
` 257/331 .....Plural gate electrodes or grid shaped gate
` electrode
`
` 4 257/341 (0 OR, 4 XR)
` Class 257 : ACTIVE SOLID-STATE DEVICES
` 257/213 FIELD EFFECT DEVICE
` 257/288 .Having insulated electrode (e.g., MOSFET, MOS
` diode)
` 257/327 ..Short channel insulated gate field effect
` transistor
` 257/335 ...Active channel region has a graded dopant
`
`Page 11 of 159
`
`

`

` concentration decreasing with distance from source
`region
` (e.g., double diffused device, DMOS transistor)
` 257/341 ....Plural sections connected in parallel
` (e.g., power MOSFET)
`
` 4 326/58 (2 OR, 2 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/56 TRI-STATE (I.E., HIGH IMPEDANCE AS THIRD STATE)
`
` 326/57 .With field effect-transistor
` 326/58 ..Complementary FET`s
`
` 4 327/333 (3 OR, 1 XR)
` Class 327 : MISCELLANEOUS ACTIVE ELECTRICAL NONLINEAR
` DEVICES, CIRCUITS, AND SYSTEMS
` 327/100 SIGNAL CONVERTING, SHAPING, OR GENERATING
` 327/306 .Amplitude control
` 327/333 ..Interstage coupling (e.g., level shift, etc.)
`
` 3 257/129 (0 OR, 3 XR)
` Class 257 : ACTIVE SOLID-STATE DEVICES
` 257/107 REGENERATIVE TYPE SWITCHING DEVICE (E.G., SCR,
` COMFET, THYRISTOR)
` 257/119 .Bidirectional rectifier with control electrode
` (gate) (e.g., Triac)
` 257/129 ..With means to increase reverse breakdown
` voltage
`
` 3 257/144 (0 OR, 3 XR)
` Class 257 : ACTIVE SOLID-STATE DEVICES
` 257/107 REGENERATIVE TYPE SWITCHING DEVICE (E.G., SCR,
` COMFET, THYRISTOR)
` 257/133 .Combined with field effect transistor
` 257/139 ..With extended latchup current level (e.g.,
` COMFET device)
` 257/144 ...Cathode emitter or cathode electrode feature
`
` 3 257/409 (0 OR, 3 XR)
` Class 257 : ACTIVE SOLID-STATE DEVICES
` 257/213 FIELD EFFECT DEVICE
` 257/288 .Having insulated electrode (e.g., MOSFET, MOS
` diode)
` 257/409 ..With means to increase breakdown voltage
` (e.g., field shield electrode, guard ring, etc.)
`
` 3 326/27 (1 OR, 2 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
`
`Page 12 of 159
`
`

`

` 326/21 SIGNAL SENSITIVITY OR TRANSMISSION INTEGRITY
` 326/26 .Output switching noise reduction
` 326/27 ..With field effect-transistor
`
` 3 326/68 (2 OR, 1 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/62 INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT,
` ETC.)
` 326/63 .Logic level shifting (i.e., interface between
` devices of different logic families)
` 326/68 ..Field-effect transistor (e.g., JFET, MOSFET,
` etc.)
`
` 3 326/86 (1 OR, 2 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/62 INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT,
` ETC.)
` 326/82 .Current driving (e.g., fan in/out, off chip
` driving, etc.)
` 326/83 ..Field-effect transistor
` 326/86 ...Bus driving
`
` 3 327/205 (1 OR, 2 XR)
` Class 327 : MISCELLANEOUS ACTIVE ELECTRICAL NONLINEAR
` DEVICES, CIRCUITS, AND SYSTEMS
` 327/100 SIGNAL CONVERTING, SHAPING, OR GENERATING
` 327/185 .Particular stable state circuit (e.g.,
` tristable, etc.)
` 327/199 ..Circuit having only two stable states (i.e.,
` bistable)
` 327/205 ...Using hysteresis (e.g., Schmitt trigger,
` etc.)
`
` 3 361/111 (0 OR, 3 XR)
` Class 361 : ELECTRICITY: ELECTRICAL SYSTEMS AND DEVICES
`
` 361/1 SAFETY AND PROTECTION OF SYSTEMS AND DEVICES
` 361/111 .Transient responsive
`
` 3 361/56 (0 OR, 3 XR)
` Class 361 : ELECTRICITY: ELECTRICAL SYSTEMS AND DEVICES
`
` 361/1 SAFETY AND PROTECTION OF SYSTEMS AND DEVICES
` 361/54 .Load shunting by fault responsive means (e.g.,
` crowbar circuit)
` 361/56 ..Voltage responsive
`
` 2 257/152 (0 OR, 2 XR)
` Class 257 : ACTIVE SOLID-STATE DEVICES
` 257/107 REGENERATIVE TYPE SWITCHING DEVICE (E.G., SCR,
`
`Page 13 of 159
`
`

`

` COMFET, THYRISTOR)
` 257/147 .With extended latchup current level (e.g.,
` gate turn off "GTO" device)
` 257/152 ..Cathode emitter or cathode electrode feature
`
` 2 326/112 (1 OR, 1 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/104 FUNCTION OF AND, OR, NAND, NOR, or NOT
` 326/112 .Field-effect transistor (e.g., JFET, etc.)
`
` 2 326/121 (0 OR, 2 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/104 FUNCTION OF AND, OR, NAND, NOR, or NOT
` 326/112 .Field-effect transistor (e.g., JFET, etc.)
` 326/119 ..MOSFET (i.e., metal-oxide semiconductor
` field-effect transistor)
` 326/121 ...CMOS
`
` 2 326/21 (1 OR, 1 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/21 SIGNAL SENSITIVITY OR TRANSMISSION INTEGRITY
`
` 2 326/34 (0 OR, 2 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/21 SIGNAL SENSITIVITY OR TRANSMISSION INTEGRITY
` 326/31 .Signal level or switching threshold
` stabilization
` 326/34 ..With field effect-transistor
`
` 2 326/57 (1 OR, 1 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/56 TRI-STATE (I.E., HIGH IMPEDANCE AS THIRD STATE)
`
` 326/57 .With field effect-transistor
`
` 2 326/63 (1 OR, 1 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/62 INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT,
` ETC.)
` 326/63 .Logic level shifting (i.e., interface between
` devices of different logic families)
`
` 2 326/80 (0 OR, 2 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/62 INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT,
` ETC.)
` 326/80 .Supply voltage level shifting (i.e., interface
` between devices of a same logic family with different
` operating voltage levels)
`
`Page 14 of 159
`
`

`

` 2 326/87 (0 OR, 2 XR)
` Class 326 : ELECTRONIC DIGITAL LOGIC CIRCUITRY
` 326/62 INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT,
` ETC.)
` 326/82 .Current driving (e.g., fan in/out, off chip
` driving, etc.)
` 326/83 ..Field-effect transistor
` 326/87 ...Having plural output pull-up or pull-down
` transistors
`
` 2 327/112 (0 OR, 2 XR)
` Class 327 : MISCELLANEOUS ACTIVE ELECTRICAL NONLINEAR
` DEVICES, CIRCUITS, AND SYSTEMS
` 327/100 SIGNAL CONVERTING, SHAPING, OR GENERATING
` 327/108 .Current driver
` 327/111 ..Having capacitive load
` 327/112 ...Push-pull
`
` 2 327/143 (1 OR, 1 XR)
` Class 327 : MISCELLANEOUS ACTIVE ELECTRICAL NONLINEAR
` DEVICES, CIRCUITS, AND SYSTEMS
` 327/100 SIGNAL CONVERTING, SHAPING, OR GENERATING
` 327/141 .Synchronizing
` 327/142 ..Reset (e.g., initializing, starting,
` stopping, etc.)
` 327/143 ...Responsive to power supply
`
` 2 327/328 (0 OR, 2 XR)
` Class 327 : MISCELLANEOUS ACTIVE ELECTRICAL NONLINEAR
` DEVICES, CIRCUITS, AND SYSTEMS
` 327/100 SIGNAL CONVERTING, SHAPING, OR GENERATING
` 327/306 .Amplitude control
` 327/309 ..By limiting, clipping, or clamping
` 327/327 ...Using only transistor active elements
` 327/328 ....Field-effect type device
`
` 2 327/374 (1 OR, 1 XR)
` Class 327 : MISCELLANEOUS ACTIVE ELECTRICAL NONLINEAR
` DEVICES, CIRCUITS, AND SYSTEMS
` 327/365 GATING (I.E., SWITCHING INPUT TO OUTPUT)
` 327/374 .Accelerating switching
`
` 2 327/437 (0 OR, 2 XR)
` Class 327 : MISCELLANEOUS ACTIVE ELECTRICAL NONLINEAR
` DEVICES, CIRCUITS, AND SYSTEMS
` 327/365 GATING (I.E., SWITCHING INPUT TO OUTPUT)
` 327/419 .Utilizing three or more electrode solid-state
` device
` 327/427 ..Field-effect transistor
`
`Page 15 of 159
`
`

`

` 327/434 ...Insulated gate FET (e.g., MOSFET, etc.)
` 327/437 ....Complementary metal-oxide semiconductor
` (CMOS)
`
` 2 327/545 (0 OR, 2 XR)
` Class 327 : MISCELLANEOUS ACTIVE ELECTRICAL NONLINEAR
` DEVICES, CIRCUITS, AND SYSTEMS
` 327/524 SPECIFIC IDENTIFIABLE DEVICE, CIRCUIT, OR
` SYSTEM
` 327/530 .With specific source of supply or bias voltage
`
` 327/545 ..Including signal protection or bias
` preservation
`
` 2 365/104 (0 OR, 2 XR)
` Class 365 : STATIC INFORMATION STORAGE AND RETRIEVAL
` 365/94 READ ONLY SYSTEMS (I.E.. SEMIPERMANENT)
` 365/103 .Semiconductive
` 365/104 ..Transistors
`
` 2 365/185.21 (1 OR, 1 XR)
` Class 365 : STATIC INFORMATION STORAGE AND RETRIEVAL
` 365/185.01 FLOATING GATE
` 365/185.18 .Particular biasing
` 365/185.2 ..Reference signal (e.g., dummy cell)
` 365/185.21 ...Sensing circuitry (e.g., current mirror)
`
` 2 365/185.23 (1 OR, 1 XR)
` Class 365 : STATIC INFORMATION STORAGE AND RETRIEVAL
` 365/185.01 FLOATING GATE
` 365/185.18 .Particular biasing
` 365/185.23 ..Drive circuitry (e.g., word line driver)
`
` 2 365/190 (0 OR, 2 XR)
` Class 365 : STATIC INFORMATION STORAGE AND RETRIEVAL
` 365/189.01 READ/WRITE CIRCUIT
` 365/190 .For complementary information
`
` 2 438/133 (0 OR, 2 XR)
` Class 438 : SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
`
` 438/133 MAKING REGENERATIVE-TYPE SWITCHING DEVICE
` (E.G., SCR, IGBT, THYRISTOR, ETC.)
`
` 2 438/135 (0 OR, 2 XR)
` Class 438 : SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
`
` 438/133 MAKING REGENERATIVE-TYPE SWITCHING DEVICE
` (E.G., SCR, IGBT, THYRISTOR, ETC.)
` 438/135 .Having field effect structure
`
`Page 16 of 159
`
`

`

` 2 438/138 (2 OR, 0 XR)
` Class 438 : SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
`
` 438/133 MAKING REGENERATIVE-TYPE SWITCHING DEVICE
` (E.G., SCR, IGBT, THYRISTOR, ETC.)
` 438/135 .Having field effect structure
` 438/138 ..Vertical channel
`
` 2 438/212 (0 OR, 2 XR)
` Class 438 : SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
`
` 438/142 MAKING FIELD EFFECT DEVICE HAVING PAIR OF
` ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY
`FORMATION OR
` ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS
` 438/197 .Having insulated gate (e.g., IGFET, MISFET,
` MOSFET, etc.)
` 438/199 ..Complementary insulated gate field effect
` transistors (i.e., CMOS)
` 438/212 ...Vertical channel
`
` 2 438/259 (0 OR, 2 XR)
` Class 438 : SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
`
` 438/142 MAKING FIELD EFFECT DEVICE HAVING PAIR OF
` ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY
`FORMATION OR
` ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS
` 438/197 .Having insulated gate (e.g., IGFET, MISFET,
` MOSFET, etc.)
` 438/257 ..Having additional gate electrode surrounded
` by dielectric (i.e., floating gate)
` 438/259 ...Including forming gate electrode in trench
` or recess in substrate
`
` 2 438/270 (0 OR, 2 XR)
` Class 438 : SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
`
` 438/142 MAKING FIELD EFFECT DEVICE HAVING PAIR OF
` ACTIVE REGIONS SEPARATED BY GATE STRUCTURE BY
`FORMATION OR
` ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS
` 438/197 .Having insulated gate (e.g., IGFET, MISFET,
` MOSFET, etc.)
` 438/268 ..Vertical channel
` 438/270 ...Gate electrode in trench or recess in
` semiconductor substrate
`
` 2 438/309 (0 OR, 2 XR)
`
`Page 17 of 159
`
`

`

` Class 438 : SEMICONDUCTOR DEVICE MANUFACTURING: PROCESS
`
` 438/309 FORMING BIPOLAR TRANSISTOR BY FORMATION OR
` ALTERATION OF SEMICONDUCTIVE ACTIVE REGIONS
`
`Page 18 of 159
`
`

`

`(6208178
`5565807
`5617048
`6075271
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`6130557
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`5266849
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`5302888
`5424984
`5444397
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`5519313
`5519338).pn.
`
`Page 19 of 159
`
`

`

`PLUS Search Results for S/N 10171983, Searched July 29, 2002
`
`6208178
`5565807
`5617048
`6075271
`6127857
`6130557
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`4387349
`4417162
`4443718
`4490632
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`4933906
`5179297
`5266849
`5291077
`5300835
`5302888
`5424984
`5444397
`5479115
`
`Page 20 of 159
`
`

`

`5519313
`5519313
`5519338
`5519338
`
`Page 21 of 159
`
`Page 21 of 159
`
`

`

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`Page 22 of 159
`
`

`

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`
`Page 23 of 159
`
`

`

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`
`Page 24 of 159
`
`

`

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`
`Page 25 of 159
`
`

`

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`
`Page 26 of 159
`
`

`

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`
`Page 27 of 159
`
`

`

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`
`Page 28 of 159
`
`

`

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`
`Page 29 of 159
`
`

`

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`would 1
`
`Page 30 of 159
`
`

`

`(6208178 5565807 5617048 6075271 6127857 6130557 6236236 4963766 5334950 5418476
`5559464 5587667 5923216 6081412 6233130 4802137 4954991 5281869 5701024 5705941
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`6218217 6218217 4316106 4387349 4417162 4443718 4490632 4590395 4931670 4933906
`5179297 5266849 5291077 5300835 5302888 5424984 5444397 5479115 5519313 5519338).pn.
`
`Page 31 of 159
`
`

`

`IIIIIIIIIII|||
`
`1|11
`
`11 11 11|11||11 11
`
`|11
`
`US006603343B2
`
`|1
`
`|111|11|11
`
`lll
`
`(12)United States Patent
`Yamaguchi et al.
`
`(to) Patent No.:
`(45) Date of Patent:
`
`US 6,603,343 B2
`Aug. 5, 2003
`
`(54) PHASE CORRECTION CIRCUIT FOR
`TRANSISTOR USING HIGH-FREQUENCY
`SIGNAL
`
`(75)
`
`Inventors:
`
`Mamiko Yamaguchi, Tokyo (JP);
`Yoshinobu Sasaki, Tokyo (JP)
`
`(73) Assignee:
`
`Mitsubishi Denki Kabushiki Kaisha,
`Tokyo(JP)
`
`(*
`
`) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`(21) Appl. No.: 10/171,983
`
`(22) Filed:
`
`Jun. 17, 2002
`
`(65)
`
`Prior Publication Data
`
`US 2003/0112054 Al Jun. 19, 2003
`
`(30)
`
`Foreign Application Priority Data
`
`(JP)
`
`Dec. 18, 2001
`
`2001-384257
`.......................................
`.... .... . HO3L 35/00; H03K 17/78
`Int. Cl.7 .................
`(51)
`(52) U .S. C l. .......................................................
`327/513
`(58) Field of Search .................................
`327/512, 513,
`327/580, 584, 314, 317, 320, 325, 326
`
`(56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`* 4/1997 Ward et al. ................. 327/143
`5,617,048 A
`6,278,313 B1 * 8/2001 Kakuta et al.
`.............. 327/317
`
`FOREIGN PATENT DOCUMENTS
`
`JP
`JP
`JP
`
`3-258008
`11-74367
`1-137713
`
`11/1991
`3/1999
`5/1999
`
`* cited by examiner
`
`Primary Examiner-My-Trang Nu Ton
`(74) Attorney, Agent, or Firm-Leydig, Voit & Mayer, Ltd.
`
`(57)
`
`ABSTRACT
`
`In order to stabilize a phase of an output signal of a
`transistor, a phase correction circuit includes: a) a circuit
`element connected in parallel to a gate of the transistor, an
`impedance including a reactance changing in response to a
`potential difference; and b) a voltage control circuit to
`decrease the reactance component in response
`to the
`increase in potential of the gate, wherein total reactance
`component of the circuit element and the transistor is
`maintained to a predetermined value. Because of the func-
`tion of the phase correction circuit, another circuit using the
`output signal of the transistor can work correctly.
`
`3,584,233 A
`
`* 6/1971 Cath et al. .................. 327/362
`
`4Cl
`
`aims, 6 Drawing Sheets
`
`r -----------------------------
`b
`Vg3=-3V
`b
`22
`21~ .
`a
`
`01L_
`
`CONTROL SIGNAL6
`
`I
`]
`L
`--
`----------------
`13 1la 11b 11c 12-
`1
`
`P
`
`13
`
`V
`ab
`]
`
`1
`
`20
`Vcc
`V
`
`100
`
`VTH=-1.5V
`VGS200
`GS
`
`HIGH-FREQUENCY
`CIRCUIT
`Tq
`
`Vgl=-1V
`
`Vg2=-5V-
`
`1140
`
`Page 32 of 159
`
`

`

`U.S. Patent
`
`Aug. 5, 2003
`
`Sheet 1 of 6
`
`US 6,603,343 B2
`
`Fig. 1
`
`r----------------
`Vg3=-3V
`22
`
`------------------
`b
`bVc
`Vab
`
`21
`
`20
`
`CONTROL SIGNAL
`
`.a _
`101L
`_-_-_---
`r -------------
`
`c
`
`100
`
`VTH=-1.5V
`200
`
`13
`
`Vgl=-1V
`
`l11a 11lb 1