IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`APPLIED MATERIALS, INC.
`
`Petitioner,
`
`v.
`
`OCEAN SEMICONDUCTOR LLC,
`
`Patent Owner.
`
`Case IPR: Unassigned
`
`U.S. Patent No. 9,968,248
`
`DECLARATION OF STANLEY SHANFIELD, PH.D.
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 1
`
`

`

`
`
`
`
`
`
`Table of Contents
`Overview .......................................................................................................... 1
`Experience and Qualifications ......................................................................... 2
`Information and Materials Considered ............................................................ 6
` Legal Principles ............................................................................................... 9
`Person of Ordinary Skill in the Art (“POSA”) ...................................... 9
`
`Claim Construction..............................................................................10
`
`Obviousness .........................................................................................10
`
`Summary of Opinions ....................................................................................12
` Person of Ordinary Skill in the Art ................................................................13
` Technical Background ...................................................................................14
` Summary of the ’248 Patent ..........................................................................22
`Claims ..................................................................................................22
`Summary of the Specification .............................................................23
`Summary of the Prosecution History ..................................................27
`Parent ’145 Application Prosecution History ...........................27
`
`’098 Application Prosecution History ......................................30
`
` Overview of the Prior Art References ...........................................................31
`Schulze ................................................................................................31
`
`Gupta ...................................................................................................37
`
` Obviousness Analysis ....................................................................................42
`Combination of Schulze and Gupta ....................................................42
`A POSA Would Have Been Motivated To Adopt a
`
`Semiconductor Fabrication System With Automated
`Monitoring and Assessment as Taught by Schulze ..................42
`A POSA Would Have Been Motivated To Enhance the
`Operational Efficiency of Schulze’s Semiconductor Fabrication
`
`
`
`
`
`
`
`
`
`
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 2
`
`

`

`
`
`
`
`
`
`
`
`
`
`
`
`System With the Event-Driven Software Local Scheduler
`Taught by Gupta........................................................................44
`A POSA Would Have Had a Reasonable Expectation of
`Success Combining Gupta With Schulze .................................47
`Independent Claim 1 ...........................................................................51
`[1.Pre] “A method for scheduling in an automated
`
`manufacturing environment” ....................................................51
`[1.a] “automatically detecting an occurrence of a predetermined
`event in an integrated, automated process flow” ......................52
`[1.b] “automatically notifying a software scheduling agent of
`the occurrence” .........................................................................52
`[1.c] “reactively scheduling an action from the software
`scheduling agent responsive to the detection of the
`predetermined event” ................................................................55
`Independent Claim 14 .........................................................................56
`“a computer system, including a plurality of software
`
`scheduling agents” ....................................................................58
`“a plurality of predetermined events” .......................................60
`
`“scheduling appointments for activities” ..................................60
`
`Claims 6, 15, and 18 ............................................................................61
`Claims 2-5, 10-13, 16, 17, 21, and 22 .................................................65
`Claims 2 and 16.........................................................................65
`
`Claims 3, 4, and 17....................................................................66
`
`Claims 10, 11, and 21 ...............................................................69
`
`Claims 12, 13, and 22 ...............................................................71
`
`Claim 5 ......................................................................................73
`
`Claims 7 and 19 ...................................................................................74
`
`Claims 8, 9 and 20 ...............................................................................75
`
` Objective Indicia of Nonobviousness .................................................76
` Conclusion .....................................................................................................76
`
`
`
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 3
`
`

`

`I, Stanley Shanfield, Ph.D., hereby declare as follows:
`
`
`
`OVERVIEW
`I am over eighteen (18) years of age and otherwise competent to make
`1.
`
`this declaration.
`
`2.
`
`I have been retained as an expert on behalf of Petitioner Applied
`
`Materials, Inc. (“Petitioner”) in connection with the above-captioned inter partes
`
`review of U.S. Patent No. 6,968,248 (“’248 patent”). Ex. 1001.
`
`3.
`
`I am being compensated for my time spent on this matter at my
`
`standard consulting rate of $385 per hour. My compensation is not dependent on
`
`the substance of my opinions, my testimony, or the outcome of the inter partes
`
`review proceeding.
`
`4.
`
`I am not currently, and have not at any time in the past been, an
`
`employee of Petitioner or any affiliate or subsidiary thereof. I have no financial
`
`interest in Applied Materials, Inc.
`
`5.
`
`I have been asked to provide my opinions regarding whether claims
`
`1-22 of the ’248 patent are invalid as obvious to a person having ordinary skill in
`
`the art at the time of the alleged invention.
`
`6.
`
`I understand that the ’248 patent issued from U.S. App. No.
`
`11/151,098 (“’098 application”), which claims priority to U.S. App. No.
`
`10/135,145 (“’145 application”), now U.S. Patent No. 6,907,305 (“’305 patent”).
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 4
`
`

`

`Ex. 1001, Ex. 1002. I understand that the earliest priority date claimed by the ’248
`
`patent is April 30, 2002, which is the filing date of the ’145 application. I further
`
`understand that, according to USPTO records, the ’248 patent is currently assigned
`
`to Ocean Semiconductor LLC (“Ocean”). Ex. 1010.
`
`7.
`
`This declaration summarizes the opinions I have formed to date. I
`
`reserve the right to modify my opinions, if necessary, based on further review and
`
`analysis of information that I receive subsequent to the filings of this declaration,
`
`including in response to positions that parties to the inter partes review proceeding,
`
`or their experts, may take that I have not yet seen.
`
` EXPERIENCE AND QUALIFICATIONS
`I have four decades of professional experience as a practicing
`8.
`
`engineer in the field of semiconductor fabrication, circuit design, and electronic
`
`module design and fabrication. My professional qualifications, experience,
`
`publications, presentations, the patents on which I am a named inventor, and a list
`
`of previous cases in which I have provided expert testimony are set forth in my
`
`curriculum vitae, attached as Exhibit 1004.
`
`9.
`
`I received my Bachelor of Science degree in Physics from the
`
`University of California, Irvine, in 1977. I received my Ph.D. from the
`
`Massachusetts Institute of Technology (“MIT”) in 1981, with a dissertation on
`
`high field superconductors. During my doctoral program at MIT, I received a four-
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 5
`
`

`

`year scholarship from the Energy Research and Development Administration (now
`
`part of the Department of Energy).
`
`10. After earning my Ph.D. in 1981, I began work as a Staff Scientist,
`
`then later as a Senior Staff Scientist, at Spire Corporation in Bedford,
`
`Massachusetts. At Spire Corporation, I developed new methods for low
`
`temperature deposition of plasma-assisted CVD epitaxial silicon. I also built,
`
`operated, and characterized an ion-assisted deposition system for making coating
`
`for semiconductors.
`
`11.
`
`In 1985, I joined Raytheon Corporation, located in
`
`Lexington/Andover, Massachusetts, as a Section Manager in Semiconductors &
`
`Integrated Circuits. My work focused on developing processes for fabrication high
`
`power, high frequency multi-function integrated circuits. In 1992, I was promoted
`
`to Research Laboratory Manager, where I led a 90-person team, in high
`
`performance semiconductor devices and circuits, including measurement,
`
`assembly, and wafer fabrication. My work then focused on the design, fabrication,
`
`and measurement of state-of-the-art complementary metal-oxide semiconductor
`
`(“CMOS”) devices of the time, primarily for digital and mixed signal applications.
`
`12.
`
`In 1996, I was promoted to Manager of Semiconductor Operations. In
`
`this capacity, I was involved in all aspects of CMOS-based IC fabrication. I was
`
`also responsible for a custom silicon application-specific integrated circuit
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 6
`
`

`

`(“ASIC”) design and development group and the associated layout and simulation
`
`facilities. I was directly involved in the design of certain commercial products
`
`produced in the facility, including flip-chip modules for an AT&T wireless base
`
`station, and the transmit/receive modules for Iridium satellite handsets using chip-
`
`on-board (COB).
`
`13. After 14 years at Raytheon, I became part of the founding team for
`
`AXSUN Technologies, located in Bedford/Billerica, Massachusetts, as a Vice
`
`President of Operations in 1999. In this capacity, I designed a complete facility for
`
`semiconductor processing, including establishing a fabrication facility in Belfast,
`
`North Ireland for producing thick oxide silicon-on-insulator material.
`
`14.
`
`In 2003, I joined Draper Laboratory at MIT (“Draper”), located in
`
`Cambridge, Massachusetts, where I am still employed. Currently, I am the
`
`Division Leader of Advanced Hardware Development and am a Distinguished
`
`Member of Technical Staff and Technical Director. In my time at Draper, I have
`
`been responsible for in-house module and electronic system designs and have been
`
`involved in CMOS foundry implementation for multiple ASIC designs.
`
`15. My experience with manufacturing execution systems (MES)
`
`included the use of what became IBM’s SiView system in the early 1990’s, a
`
`version of which was used for a low rate silicon wafer fab facility created at
`
`Raytheon. I was directly involved in the implementation of the database and data
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 7
`
`

`

`analysis software used by process engineers with this and other systems for
`
`determining the correlation between a process outcome (e.g., etch rate) and the
`
`process parameters measured (e.g., RF power, bias voltage, etc.). When Raytheon
`
`invested in a new commercial semiconductor fab in Andover, Massachusetts, I
`
`oversaw the implementation of a version of the PROMIS MES system in this new
`
`facility, including its work station scheduling system (physical decomposition). I
`
`led a team that established the initial implementation of a process feedback control
`
`system through rank correlation, principal factor and other types of analysis. After
`
`becoming an Operations Director of the 24/7 wafer fab facility in the mid-1990s, I
`
`provided the impetus for a more complete implementation of a semiconductor
`
`scheduling, and a process feedback and control system. I often participated in the
`
`analysis of processing and tool maintenance issues, as well as dispatching issues
`
`that would arise at the facility. At Draper, I have been involved in analyzing the
`
`processing of radiation-hardened integrated circuits at Taiwan Semiconductor
`
`Manufacturing Company (TSMC) and Global Semiconductor Corporation (GSC).
`
`In the mid-2000’s, Draper performed some of the processing steps for foundry-
`
`based ASIC designs used in orbital hardware. In analyzing the results from these
`
`designs, I become familiar with the use of proprietary MES scheduling (using both
`
`physical decomposition and some applications of deep learning methods), as well
`
`as the data collection and analytic tools at TSMC, GSC, and other large scale
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 8
`
`

`

`semiconductor foundries. I have also been the author of specialized software
`
`analysis tools for semiconductor processing and modeling as required by the ASIC
`
`design fabricated in large scale foundry production.
`
`16.
`
`I have been a member of many professional societies and electrical
`
`engineering industry groups over the years, such as the Institute of Electrical and
`
`Electronics Engineers (IEEE) and the American Physical Society (APS).
`
`17.
`
`I have received a number of academic awards and honors over the
`
`years, including awards and honors for the best Draper patent and most successful
`
`Draper development project.
`
`18.
`
`I have also authored or co-authored over 25 technical papers covering
`
`various aspects of semiconductor devices and advanced semiconductor
`
`manufacturing.
`
`19.
`
`I am a named inventor or co-inventor on more than nine (9) patents
`
`covering aspects of semiconductor devices, system and circuit design, and
`
`semiconductor manufacturing.
`
`
`
`INFORMATION AND MATERIALS CONSIDERED
`In forming my opinions in this declaration, I relied upon my education
`20.
`
`and experience in the relevant field of the art, and have considered the view point
`
`of a person having ordinary skill in the art (POSA) at the time of the alleged
`
`invention.
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 9
`
`

`

`21.
`
`I have considered the materials referenced herein, including the ’248
`
`patent, Ex. 1001, the file history for the ’248 patent, the file history of the ’305
`
`patent, and other documents listed in the table below:
`
`Exhibit No.
`
`Description
`
`1001
`
`1002
`
`1005
`
`1006
`
`1007
`
`1008
`
`1009
`
`1010
`
`1012
`
`
`1013
`
`
`1014
`
`
`Mata et al., U.S. Patent No. 6,968,248 (filed June 13, 2005; issued
`Nov. 22, 2005) (“the ’402 patent”)
`Mata et al., U.S. Patent No. 6,907,305 (filed Apr. 30, 2002; issued
`June 14, 2005) (“the ’305 patent”)
`File Wrapper for the ’248 patent
`
`File Wrapper for the ’305 patent
`
`Schulze, U.S. Patent Application Publication No. US
`2002/0116083 (provisional application filed Oct. 17, 2000;
`application filed Oct. 16; 2001; published Aug. 22, 2002)
`Gupta et al., U.S. Patent No. 4,888,692 (filed Nov. 10, 1988; issued
`Dec. 19, 1989)
`Schulze, U.S. Provisional Application No. 60/241,343 (filed Oct.
`17, 2000)
`United States Patent and Trademark Office’s Electronic
`Assignment Record for U.S. Patent No. 5,212,645
`B.L. MacCarthy and J. Liu, Addressing the Gap in Scheduling
`Research: A Review of Optimization and Heuristic Methods in
`Production Scheduling, Int. J. Prod. Pres., Vol. 31, No. 1, 59-79
`(1993)
`W. Shen, L. Wang and Q. Hao, Agent-based Distributed
`Manufacturing Process Planning and Scheduling: A State-of-the-
`art survey, IEEE Transactions on Systems, Man, and Cybernetics,
`Part C (Applications and Reviews), vol. 36, no. 4, pp. 563-577
`(July 2006)
`W. Shen, Distributed manufacturing scheduling using intelligent
`agents, IEEE Intelligent Systems, vol. 17, no. 1, 88-94 (Jan.-Feb.
`2002)
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 10
`
`

`

`Exhibit No.
`
`1015
`
`
`1016
`
`
`1017
`
`
`1018
`
`1019
`
`1020
`
`1021
`
`1022
`
`1023
`
`1024
`
`1025
`
`1026
`
`Description
`M. Yamamoto and S. Y. Nof, Scheduling/rescheduling in the
`manufacturing operating system environment , International
`Journal of Production Research, 23:4, 705-722 (1985)
`J. Sun and D. Xue, A Dynamic Reactive Scheduling Mechanism for
`Responding to Changes of Production Orders and Manufacturing
`Resources, Computers in Industry, 189-207 (2001)
`J. McGehee, The MMST Computer-Integrated Manufacturing
`System Framework, IEEE Transactions on Semiconductor
`Manufacturing, 7: 107-16 (1994)
`P. Cowling and M. Johansson, Using Real Time Information for
`Effective Dynamic Scheduling, European Journal of Operational
`Research 139, 230-244 (2002)
`P. Diwan and D. Kothari, Role of Automation and Robotics in
`Semiconductor Industry, IETE Technical Review, 7: 368-77 (1990)
`N.R. Jennings and M. Wooldridge, Applications of Intelligent
`Agents, Agent Technology, 3-28 (1998)
`J.Y. Pan and J.M. Tenenbaum, Toward an Intelligent Agent
`Flamework for Enterprise Integration, AAAI (1991)
`H. Fargher and R. Smith, Planning for the Semiconductor
`Manufacturer of the Future, AAAI (1992)
`W. Shen and D. Norrie, A Hybrid Agent-Oriented Infrastructure
`for Modeling Manufacturing Enterprises (1998)
`K. Kouiss, H. Pierreval, and N. Mebarki, Using Multi-Agent
`Architecture in FMS for Dynamic Scheduling, J. Intelligent
`Manufacturing, vol. 8, no. 1, 41–47 (Feb. 1997)
`S. Parthasarathy and S.H. Kim, Manufacturing Systems: Parallem
`System Models and Some Theoretical Results, International Journal
`of Computer Applications in Technology, Vol. 3, No. 4, 225-238
`(1990)
`R. Uzsoy, C. Lee, and L. Martin-Vega, Models in the
`Semiconductor Industry Part I: System Characteristics,
`Performance Evaluation and Production Planning, IIE
`Transactions, 24:4, 47-60 (1992)
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 11
`
`

`

`Exhibit No.
`
`1027
`
`1028
`
`1029
`
`1030
`
`1031
`
`Description
`H. Fargher, et al., A Planner and Scheduler for Semiconductor
`Manufacturing, IEEE Transactions on Semiconductor
`Manufacturing, Vol. 7, No. 2, 117-28 (May 1994)
`R. Leachman and D. Hodges, Benchmarking Semiconductor
`Manufacturing (2001)
`J. Macher et al., E-Business and Semiconductor Industry Value
`Chain: Implications for Vertical Specialization and Integrated
`Semiconductor Manufacturers, East-West Center Working Papers
`Economics Series No. 47 (May 2002)
`G. Tassey, Standardization in Technology-Based Markets (June
`1999)
`R. Langlois, Capabilities and Vertical Disintegration in Process
`Technology: The Case of Semiconductor Fabrication Equipment
`(January 1998)
`
` LEGAL PRINCIPLES
`I am not an attorney. For purpose of this declaration, I have been
`22.
`
`
`
`informed about certain aspects of the patent law that are relevant to my opinions.
`
`My understanding of the law is listed below.
`
`
`23.
`
`Person of Ordinary Skill in the Art (“POSA”)
`I understand that a POSA is a hypothetical person who is presumed to
`
`be aware of all the pertinent art, thinks along conventional wisdom in the art, and is
`
`a person of ordinary creativity. I also understand that a POSA may work as part of
`
`a multi-disciplinary team and not only draw upon their own skill, but also take
`
`advantage of certain specialized skills of others in the team to solve a given
`
`problem.
`
`24.
`
`I understand that there are multiple factors relevant to determining the
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 12
`
`

`

`level of ordinary skill in the pertinent art, including the education level of active
`
`workers in the field at the time of the alleged invention, the sophistication of the
`
`technology, the type of problems encountered in the art, and the prior art solutions
`
`to those problems.
`
` Claim Construction
`I understand that, in an IPR proceeding, words of a claim are given
`25.
`
`their plain and ordinary meaning as understood by a POSA at the time of
`
`invention, in light of the specification and prosecution history as well as pertinent
`
`evidence extrinsic to the patent.
`
` Obviousness
`I understand that a patent claim is invalid if the claim had been
`26.
`
`obvious to a POSA at the time of the alleged invention. This means, even if all of
`
`the limitations of a claim are not found in a single prior art reference, the claim is
`
`invalid if the differences between the subject matter in the prior art and the subject
`
`matter in the claim would have been obvious to a POSA at the time of the alleged
`
`invention.
`
`27.
`
`I understand that a determination of whether a claim would have been
`
`obvious should be based upon several factors, including among others: (1) the
`
`level of ordinary skill in the art at the time of the alleged invention; (2) the scope
`
`and content of the prior art; and (3) what differences, if any, existed between the
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 13
`
`

`

`claimed invention and the prior art.
`
`28.
`
`I understand that the teachings of two or more references may be
`
`combined in the same way as disclosed in the claims, if such a combination would
`
`have been obvious to a POSA. In determining whether a combination would have
`
`been obvious, it is appropriate to consider at least the following factors:
`
`• whether the teachings of the prior art reference disclose known
`
`concepts combined in familiar ways, which, when combined, would
`
`yield predictable results;
`
`• whether a POSA would implement a predictable variation, and would
`
`see the benefit of doing so;
`
`• whether the claimed elements represent one of a limited number of
`
`known design choices, and would have a reasonable expectation of
`
`success by a POSA;
`
`• whether a POSA would have recognized a reason to combine known
`
`elements in the manner described in the claim;
`
`• whether there is some teaching or suggestion in the prior art to make
`
`the modification or combination of limitations claimed in the patent;
`
`and
`
`• whether the innovation applies a known technique that had been used
`
`to improve a similar device or method in a similar way.
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 14
`
`

`

`29.
`
`I understand that a POSA has ordinary creativity, and is not an
`
`automation.
`
`30.
`
`I understand that in considering obviousness, it is important not to
`
`determine obviousness using the benefit of hindsight derived from the patent being
`
`considered.
`
`31.
`
`I understand that certain factors, often referred to as “objective
`
`indicia” or “secondary considerations”, may support or rebut an assertion of
`
`obviousness of a patent claim. I understand such objective indicia include, among
`
`other things, commercial success of the alleged invention, skepticism of those
`
`having ordinary skill in the art at the time of the alleged invention, unexpected
`
`results of the alleged invention, any long-felt unresolved need in the art that was
`
`satisfied by the alleged invention, the failure of others to make the alleged
`
`invention, praise of the alleged invention by those having ordinary skill in the art,
`
`and copying of the alleged invention by others in the field. I further understand
`
`that there must be a nexus, a connection, between any such objective indicia and
`
`the alleged invention. I also understand that contemporaneous and independent
`
`invention by others is an objective indicia tending to show obviousness.
`
`
`
`SUMMARY OF OPINIONS
`It is my opinion that claims 1-22 of the ’248 patent are rendered
`32.
`
`obvious by U.S. Patent Application Publication No. US 2002/0116083
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 15
`
`

`

`(“Schulze”), Ex. 1007, in view of U.S. Patent No. 4,888,692 (“Gupta”), Ex. 1008.
`
`33.
`
`It is my opinion that, for the purposes of this IPR proceeding, the
`
`claim terms of the ’248 patent need not be construed to resolve the prior art issues
`
`presented here. This is because, as explained in § X below, the prior art discussed
`
`here discloses the claimed invention and the subject matter of each of the
`
`challenged claims under any reasonable construction as understood by a POSA at
`
`the time of invention.
`
` PERSON OF ORDINARY SKILL IN THE ART
`It is my opinion that the art of the subject matter of the ’248 patent is
`34.
`
`automated manufacturing. In determining the characteristics of a POSA of the
`
`’248 patent at the time of the alleged invention, I considered several factors,
`
`including the types of problems encountered in the field, the sophistication of
`
`technology involved, the education background and experience of those actively
`
`working in the field, and the level of education that would be necessary to
`
`understand the ’248 patent. Finally, I placed myself back in the relevant period of
`
`time, and considered the state of the art and the level of skill of the engineers
`
`working in this field at the time.
`
`35. Based on the materials I have considered, my own experience
`
`managing and designing automated manufacturing facilities, my involvement in
`
`the IEEE and APS, and the knowledge required to design and implement an
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 16
`
`

`

`automated manufacturing facility, especially a semiconductor manufacturing
`
`facility, I came to the conclusion that the characteristics of a POSA of the ’248
`
`patent would be someone who had at least a B.S. degree in computer science,
`
`mechanical engineering, electrical engineering, or a related field, and three years of
`
`experience working with automated manufacturing processes. Such a POSA
`
`would have had general knowledge of systems and methods used in automated
`
`manufacturing environment, including the solutions and techniques disclosed in
`
`the references discussed in this declaration.
`
` TECHNICAL BACKGROUND
`36. Starting from at least 1980s, the general manufacturing sector
`
`recognized the various advantages of software-based automation. Ex. 1015, 705-
`
`06. By early 1990s, the semiconductor industry not only recognized such an
`
`automated system as a necessity to remain competitive, but also “the only hope for
`
`the future” given the sector’s increasing level of integration, decreasing minimum
`
`feature size, increasing processing flexibility, demand for better quality, process
`
`control, yield optimization, and ease of operation. Ex. 1019, 368.
`
`37. Among other aspects, the industry focused on improving the
`
`information systems of manufacturing facilities, so manufacturing operations can
`
`be monitored and tracked on a real-time basis as 1) information being generated in
`
`real time by process control computers, 2) computer systems for the entry and
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 17
`
`

`

`dissemination of data made available at various locations on the shop floors, and 3)
`
`feedback being generated from all work centers to track jobs and update progress.
`
`Ex. 1018, 231.
`
`38.
`
`In 2001, a survey on semiconductor wafer fabrication plants in U.S.,
`
`Asia, and Europe conducted by the University of California, Berkeley’s
`
`Engineering Systems Research Center observed that “[a]utomat[ing] information
`
`handling and step-level material handling” is one of the key practices that
`
`correlated with good manufacturing performance. Ex. 1028, 4. The same survey
`
`also noted that, while “some participants with a narrow product mix” could still
`
`achieve high line yields with little or no automation, “other leading participants
`
`have applied very effective forms of information automation.” Ex. 1028, 5.
`
`39. Around the same time, the semiconductor industry also introduced
`
`various industry-wide standards for information reporting, such as the E-10-0699
`
`Standard for Definition and Measurement of Equipment Reliability, Availability
`
`and Maintainability (RAM) (the “E10 Standard”) and E58-0697 Automated
`
`Reliability, Availability and Maintainability Standard (ARAMS) (“E58 Standard”),
`
`both of which were proposed by the industry association Semiconductor
`
`Equipment and Materials International (SEMI). Ex. 1007, ¶¶ 0008-09. By virtue
`
`of promoting the universal acceptance of the same information reporting methods,
`
`such standardization efforts were typically believed to promote industry-wide
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 18
`
`

`

`collaborations and reduce transactional costs among the industry players. Ex.
`
`1030, 5.
`
`40. By 2002, the semiconductor industry recognized that the adoption of
`
`such industry standards can reduce manufacturing costs, reduce development time
`
`and effort, and increase product reliability and manufacturing productivity. Ex.
`
`1017, 110; Ex. 1030, 5. Further, such standards were generally believed to give
`
`manufacturers greater competitive leverage over equipment suppliers as they lower
`
`switching costs and facilitate portability. Ex. 1029, 19; Ex. 1017, 110.
`
`41.
`
`In the 1990s, with the increased capability to automatically monitor
`
`and track job and machine status in real time, the semiconductor industry further
`
`leveraged the data collected to enable further automation enhancements, such as
`
`computer aided scheduling. Ex. 1015, 705-06; Ex. 1018, 231-32; Ex. 1019, 369.
`
`A good scheduling strategy to maintain a manufacturing facility’s overall
`
`productivity plays an important role in a manufacturer’s profitability and
`
`competitiveness. Ex. 1012, 59; Ex. 1013, 563.
`
`42. However, semiconductor manufacturing facilities presented
`
`scheduling problems more challenging than other industries due to their size,
`
`complexity and unpredictability. Ex. 1026, 49. Unplanned or unexpected events
`
`like cancellation of production order at a customer’s request, insertion of an urgent
`
`new order that has to be completed within a short period of time, machine
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 19
`
`

`

`breakdowns, power failures, and staff illness (i.e., the “high variability of schedule
`
`factors”) are all common scenarios in a typical manufacturing shop. Ex. 1016,
`
`189; Ex. 1015, 705; Ex. 1026, 50. Further, a typical wafer fab of that time contains
`
`several hundreds of machines and personnel. Ex. 1017, 107. The production of
`
`each wafer requires several hundred process steps. Id. Further complicating the
`
`process, a wafer typically needed to re-enter the same machine for a number of
`
`these steps. Ex. 1026, 49.
`
`43. The time and resources required to solve even a simple manufacturing
`
`scheduling problem also pose challenges. Manufacturing scheduling problems are
`
`typically “NP-hard,” which means finding an optimal solution is practically
`
`impossible without using an enumerative algorithm. Ex. 1014, 88. The
`
`computational time and resources required to solve a scheduling problem increases
`
`exponentially with the size and complexity of manufacturing facility, which
`
`renders “ceaseless rescheduling” of an entire facility prohibitively expensive and
`
`practically impossible. Ex. 1015, 705; Ex. 1014, 88; Ex. 1012, 69.
`
`44. To make matter worse, in the 1990s, the semiconductor industry was
`
`going through constant product evolution as manufacturers were moving from high
`
`volume production of commodity parts to low volume production of application-
`
`specific parts. Ex. 1017, 107; Ex. 1031, 9-10, Ex. 1017, 107. One practical
`
`consequence was the repeated re-engineering of the manufacturing process (e.g.,
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1003, IPR2022-00681, Pg. 20
`
`

`

`addition of new processes or machines), which posed further challenges in the
`
`design of a facility’s scheduling system. Ex. 1017, 107.
`
`45. Due to these challenges, in early 1990s, human operators were still
`
`needed to make scheduling decisions in most wafer fabs. Ex. 1027, 122; Ex. 1012,
`
`59. In the 1990s, researchers and manufacturing companies facing such challenges
`
`developed two solutions: (1) dynamic scheduling mechanisms, and (2) software
`
`agent-based decision-making.
`
`46.
`
`In the 1980s and 1990s, the development of computerized
`
`manufacturing systems and computer aided scheduling systems enabled the
`
`emergence of a new scheduling mechanism: dynamic scheduling or real-time
`
`scheduling. Ex. 1015, 705-06. Dynamic sched