`v.
`Arigna Technology LTD. (Patent Owner)
`Petitioner Demonstratives
`Case No. IPR2022-00651
`U.S. Patent No. 6,603,343
`Before Hon. Thu A. Dang, Garth D. Baer, and Sharon Fenick
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
`
`APPLE 1027
`Apple v. Arigna
`IPR2022-00651
`
`1
`
`
`
`Table of Contents
`
`Overview of the ’343 Patent
`
`The circuits of the ’343 Patent and Jeon 412 are substantially similar
`
`Issue 1: A “temperature” limitation should not be read into claim 1
`
`Issue 2: The cited references render obvious a “voltage control circuit”
`
`Issue 3: “Phase correction” is non-limiting, and is met by the references
`
`Issue 4: Petitioner has met its burden in establishing obviousness as it relates to the
`claimed “reactance”
`
`Ground 2: The arguments made with respect to Ground 1 also hold for Ground 2
`
`3
`
`9
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`12
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`18
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`22
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`33
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`36
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`2
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`2
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`
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`Overview of the ’343 Patent: Principle of Operation
`
`EX-1001, FIG. 1
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`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`EX-1001, FIG. 2
`
`3
`
`3
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`
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`Overview of the ’343 Patent: Principle of Operation
`
`EX-1001, FIG. 1
`
`EX-1001, FIG. 4;
`Petition, 7
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`4
`
`4
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`
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`Overview of the ’343 Patent: Principle of Operation
`
`EX-1001, FIG. 1
`
`EX-1001, FIG. 5;
`Petition, 7
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`5
`
`5
`
`
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`Overview of the ’343 Patent: Principle of Operation
`
`EX-1001, FIG. 1
`
`EX-1001, FIG. 6;
`Petition, 8
`
`EX-1001, FIG. 7;
`Petition, 9
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`6
`
`6
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`
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`Overview of the ’343 Patent: Principle of Operation
`
`EX-1001, FIG. 1
`
`EX-1001, FIG. 9;
`Petition, 10
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`7
`
`7
`
`
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`Overview of the ’343 Patent: Claims 1-2
`
`Mapping of ’343 Patent’s FIG. 1
`circuit to claim elements
`
`EX-1001, FIG. 1;
`Petition, 6, 33-38
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`EX-1001, claims 1-2
`
`8
`
`8
`
`
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`Comparison of the ’343 Patent and Jeon 412
`
`The circuits of the ’343 Patent and Jeon 412
`have substantially similar topology and
`functionality
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`9
`
`9
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`9
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`9
`
`9
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`
`
`The two circuits have the same configuration of diode, transistor, and
`voltage applied to diode
`
`Each element recited in claims 1-2 has the same configuration in
`these two circuits
`
`’343 Patent FIG. 1 circuit
`
`Jeon 412 FIG. 5 circuit
`
`Diode with cathode connected to gate
`of transistor and anode connected to
`voltage terminal
`
`Diode with cathode
`connected to gate of
`transistor and anode
`connected to voltage
`terminal
`
`EX-1001, FIG. 1;
`Petition, 15
`
`EX-1005, FIG. 5;
`Petition, 15
`
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`10
`
`10
`
`
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`Based on their matching configuration of circuit elements, the two
`circuits perform the same constant-capacitance function
`
`’343 Patent FIG. 1 circuit
`maintains constant capacitance
`
`Jeon 412 FIG. 5 circuit
`maintains constant capacitance
`
`Total capacitance Cd + CGS
`maintained constant
`
`Total capacitance Cdiode + Cgs
`maintained constant
`
`EX-1001, FIG. 9;
`Petition, 16
`
`EX-1005, FIG. 6;
`Petition, 16
`
`Patent Owner is forced to manufacture issues to distract from the
`fundamental match between the claimed circuit and that of Jeon ’412
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`11
`
`11
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`
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`Issue 1
`
`A “temperature” limitation should not be read
`into claim 1
`
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`12
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`12
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`12
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`
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`The challenged claims recite that a sum of reactances “remains
`substantially constant,” without reciting “temperature”
`
`EX-1001, claim 1;
`Petition, 9;
`Petitioner’s Reply, 2
`
`EX-1001, col. 7;
`Petitioner’s Reply, 4
`
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`13
`
`13
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`
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`Jeon 412 discloses that a sum of a diode capacitance and a gate-source
`capacitance remains constant
`
`Jeon 412: sum of capacitances remains
`constant as gate voltage (Vg) changes
`
`’343 Patent: sum of capacitances remains
`constant as supply voltage to gate increases
`
`Sum of gate-source capacitance
`Cgs and diode capacitance
`Cdiode remains constant
`
`EX-1001, col. 7;
`Petitioner’s Reply, 4;
`EX-1003, 25-28
`
`EX-1005, FIG. 6;
`Petition, 42
`
`EX-1005, col. 4;
`Petition, 13
`
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`14
`
`14
`
`
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`Patent Owner attempts to read a “with changing temperature” limitation
`into claim 1
`Patent Owner argues reactance must remain
`constant with changing temperature
`
`This “disclaimer of claim
`scope” is “improper,” as “a
`particular embodiment
`appearing in the written
`description may not be read
`into a claim when the claim
`language is broader than
`the embodiment”
`Petitioner’s Reply, 3;
`SuperGuide Corp. v. DirecTV
`Enters., Inc., 358 F.3d 870, 875
`(Fed. Cir. 2004)
`
`POR, 16
`
`POR, 19
`
`Surreply, 12
`
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`15
`
`15
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`
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`Temperature variation is merely an example
`
`EX-1001, col. 2;
`Petitioner’s Reply, 4, 6-7
`
`EX-1001, col. 7;
`Petitioner’s Reply, 4, 6-7
`
`POR, 26;
`Petitioner’s Reply, 4
`
`16
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`16
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`
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`The proximate cause of the offsetting reactances in the ’343 Patent’s FIG.
`1 circuit is a changing gate potential
`
`Deposition of Dr. Herniter
`
`EX-1022, 63;
`Petitioner’s Reply, 6
`
`EX-1001, col. 7;
`EX-1003, 25-28
`Petitioner’s Reply, 6
`
`POR, 26
`
`17
`
`EX-1001, FIG. 1
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`17
`
`
`
`Issue 2
`
`The cited references render obvious a “voltage
`control circuit”
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`18
`
`18
`18
`
`18
`
`
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`The “voltage control circuit” is shown implicitly in the ’343 Patent
`
`EX-1001, FIG. 1;
`Petition, 5-6;
`Petitioner’s Reply, 15-16;
`EX-1003, 29
`
`Deposition of Dr. Herniter
`
`EX-1001, claims 1-2
`
`EX-1022, 56
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`19
`
`19
`
`
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`A “voltage control circuit” is similarly disclosed implicitly in Jeon 412
`
`Declaration of Dr. Kiaei
`
`Deposition of Dr. Herniter
`
`EX-1003, 100
`
`EX-1005, FIG. 5;
`Petition, 34;
`Petitioner’s Reply, 15-16
`
`Implicit voltage
`control circuit
`
`EX-1022, 95
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`20
`
`20
`
`
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`Alternatively, it would have been obvious to incorporate Jeon 412’s
`“outside voltage control circuit”
`
`Declaration of Dr. Kiaei
`
`EX-1005, FIG. 5
`
`Diode
`
`Voltage control circuit
`supplies a voltage
`Vdiode to an anode
`terminal of the diode
`
`EX-1003, 104;
`Petition, 36-38;
`Petitioner’s Reply, 16-19
`
`EX-1005, FIG. 8A;
`Petition, 37
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`21
`
`21
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`
`
`Issue 3
`
`“Phase correction” is non-limiting, and is met by
`the references
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`22
`22
`
`22
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`
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`The body of claim 1 defines a structurally complete circuit
`
`EX-1001, FIG. 1;
`Petition, 6, 33-38
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`EX-1001, claims 1-2;
`Petitioner’s Reply, 9
`
`23
`
`23
`
`
`
`“Phase correction” is a benefit of the features recited in the body of claim 1
`
`EX-1001, col. 7;
`Petitioner’s Reply, 8-9;
`EX-1003, 24-25
`
`“[A] preamble generally is not limiting when the claim body
`describes a structurally complete invention such that
`deletion of the preamble phrase does not affect the structure
`or steps of the claimed invention. [] [P]reamble language
`merely extolling benefits or features of the claimed invention
`does not limit the claim scope without clear reliance on
`those benefits or features as patentably significant.”
`
`Catalina Mark. Intern. v. Coolsavings.com,
`289 F.3d 801 (Fed. Cir. 2002);
`Petitioner’s Reply, 9
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`24
`
`24
`
`
`
`Patent Owner’s arguments regarding “phase correction”
`
`Patent Owner argues “phase correction” must be limiting to define “substantially constant”
`
`Surreply, 4
`Patent Owner argues “phase correction” was relied upon during prosecution, and is thus limiting
`
`Patent Owner argues that “phase distortion” correction is not an example of “phase
`correction”
`
`Surreply, 5
`
`POR, 33
`
`Surreply, 11
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`25
`
`25
`
`
`
`The phrase “phase correction circuit” was not “highlighted” during prosecution
`
`First citation of prosecution history to
`allegedly show “reliance on the preamble”
`
`Surreply, 5
`
`EX-1002, 5
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`26
`
`26
`
`
`
`The phrase “phase correction circuit” was not “highlighted” during prosecution
`
`Second citation of prosecution history to
`allegedly show “reliance on the preamble”
`
`Surreply, 5
`
`EX-1002, 4
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`27
`
`27
`
`
`
`Requiring “phase correction” to be limiting would introduce unacceptable
`uncertainty
`
`EX-1001, FIG. 1
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`EX-1001, col. 5;
`Petitioner’s Reply, 10
`
`28
`
`28
`
`
`
`Requiring “phase correction” to be limiting would introduce unacceptable
`uncertainty
`
`Deposition of Dr. Herniter
`
`EX-1022, 115
`
`EX-1022, 116;
`Petitioner’s Reply, 11
`
`EX-1022, 116;
`Petitioner’s Reply, 11
`
`Surreply, 6
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`29
`
`29
`
`
`
`“Phase distortion” correction constitutes “phase correction” within the
`meaning of the ’343 Patent
`
`’343 Patent
`
`EX-1001, col. 2
`
`JP A-11-74367
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`EX-1025, [0026];
`Petitioner’s Reply, 12
`
`30
`
`30
`
`
`
`“Phase distortion” correction constitutes “phase correction” within the
`meaning of the ’343 Patent
`
`Jeon 412
`
`EX-1005, col. 3;
`Petitioner’s Reply, 12
`
`“Similar” to JP A-11-74367’s
`“reduction” of “waveform
`distortion”
`Petitioner’s Reply, 12
`
`Surreply, 7
`
`JP A-11-74367 is disparaged
`for its lack of threshold
`voltage and temperature
`compensation, but it is still
`described as a “phase
`correction circuit”
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`EX-1001, col. 2
`
`31
`
`31
`
`
`
`Because the “phase correction” is a direct result of the constant capacitance
`sum, Jeon 412 necessarily provides the same benefit
`
`Total capacitance Cd + CGS
`maintained constant
`
`Total capacitance Cdiode + Cgs
`maintained constant
`
`EX-1001, FIG. 9;
`Petition, 16
`
`EX-1005, FIG. 6;
`Petition, 16
`
`Deposition of Dr. Herniter
`
`EX-1022, 91;
`Petitioner’s Reply, 14
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`EX-1001, col. 7;
`Petitioner’s Reply, 13
`
`32
`
`32
`
`
`
`Issue 4
`
`Petitioner has met its burden in interpreting
`obviousness as it relates to “reactance”
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`33
`33
`
`33
`
`
`
`Patent Owner argues Petitioner has not met its burden regarding “reactance”
`
`POR, 54
`
`Surreply, 25
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`34
`
`34
`
`
`
`Petitioner has provided unrebutted evidence and a proposed interpretation
`regarding “reactance”
`
`Declaration of Dr. Kiaei
`
`EX-1003, 46;
`Petition, 31-32
`
`Petitioner has repeatedly
`proposed this interpretation
`of “reactance” without
`Patent Owner asserting an
`alternative interpretation
`
`EX-1003, 43-44
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`35
`
`35
`
`
`
`Ground 2
`
`The arguments made with respect to Ground 1
`also hold for Ground 2
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`36
`36
`
`36
`
`
`
`The circuits of Jeon 412 and Yoshimasu have substantially similar topology and
`functionality
`
`Jeon 412 circuit
`
`Yoshimasu circuit
`Input transmission
`Transistor
`line
`
`Transistor
`
`Input
`terminal
`
`EX-1005, FIG. 5;
`Petition, 12
`
`Diode
`
`Cathode of diode
`connected to gate
`of transistor
`
`EX-1008, FIG. 2;
`Petition, 46
`
`Diode
`
`[ ].
`
`EX-1008, 4;
`Petition, 49
`
`37
`
`EX-1008, 3;
`Petition, 47
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`37
`
`
`
`Patent Owner generally makes few separate arguments
`with respect to Ground 2
`
`POR, 24-25;
`Surreply, 20-21
`
`38
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`38
`
`
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`Additional Slides
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`3939
`
`39
`
`
`
`T1 and T2 in FIG. 9 of the ’343 Patent correspond to different gate voltages
`
`Deposition of Dr. Herniter
`
`EX-1022, 63
`
`EX-1001, FIG. 4;
`Petition, 7
`
`Declaration of Dr. Kiaei
`
`EX-1003, 50
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`40
`
`40
`
`
`
`Patent Owner’s interpretation of “reactance” is consistent with Petitioner’s
`treatment of the term
`
`Declaration of Dr. Kiaei
`
`Declaration of Dr. Kiaei
`
`EX-1003, 44;
`EX-1001, col. 3-6
`
`Prosecution Record
`
`Patent Owner’s Preliminary Infringement Contentions
`
`EX-1003, 45;
`EX-1001, col. 5
`
`EX-1003, 47;
`EX-1002, 4;
`
`Patent Owner has provided no
`alternative interpretation in
`disagreement with these clear
`statements in the record
`
`EX-1003, 47;
`EX-1007, 7, 10
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`41
`
`41
`
`
`
`However “reactance” is interpreted consistent with the ’343 Patent, the
`references meet the limitation
`Institution Decision
`
`’343 Patent FIG. 1 circuit
`Diode with cathode connected to gate
`of transistor and anode connected to
`voltage terminal
`
`Institution Decision, 30-31
`Jeon 412 FIG. 5 circuit
`Diode with cathode
`connected to gate of
`transistor and anode
`connected to voltage
`terminal
`
`EX-1001, FIG. 1;
`Petition, 15
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`EX-1005, FIG. 5;
`Petition, 15
`
`42
`
`42
`
`
`
`Yoshimasu and Jeon IEEE render obvious the challenged claims
`
`Even if “phase correction” is limiting, Yoshimasu teaches the limitation
`
`EX-1003, 120;
`Petition, 55
`Yoshimasu teaches a voltage control circuit including a “control voltage applying terminal” 15
`and a “capacitance 14” that “together determine a voltage applied to the anode of the diode”
`
`Yoshimasu, FIG. 2;
`Petition, 59-61;
`EX-1003, 129-130
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`43
`
`43
`
`
`
`Yoshimasu and Jeon IEEE render obvious the challenged claims
`
`Patent Owner concedes the interpretations of Yoshimasu for which Jeon
`IEEE was cited
`Jeon IEEE cited to demonstrate that Yoshimasu’s “gate capacitance” is a “gate-source
`capacitance [or reactance]”
`
`•
`
`Declaration of Dr. Herniter
`
`EX-2023, 168;
`Petitioner’s Reply, 20-21
`Jeon IEEE cited to demonstrate that Yoshimasu’s diode is reverse-biased
`
`•
`
`EX-2023, 168;
`Petitioner’s Reply, 21-22
`
`44
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`44
`
`
`
`Patent Owner’s arguments against the combination of Yoshimasu and Jeon
`IEEE are fatally flawed
`
`Declaration of Dr. Herniter
`
`Deposition of Dr. Herniter
`
`EX-2023, 72, 77;
`Petitioner’s Reply, 22
`
`EX-1022, 142;
`Petitioner’s Reply, 22-24
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`45
`
`45
`
`
`
`It would have been obvious to include the ’343 Patent’s temperature
`compensation circuit in the circuits of Jeon 412 and Yoshimasu
`
`Declaration of Dr. Kiaei
`
`EX-1001, FIG. 14;
`Petition, 69;
`EX-1003, 141-143
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`Petition, 69;
`EX-1003, 141-143
`
`46
`
`46
`
`
`
`It would have been obvious to use Jeon IEEE’s voltage control circuit to
`supply Vdiode in Jeon 412’s circuit
`
`EX-1005, FIG. 5;
`Petition, 35-36
`
`Diode
`
`“Constant voltage”
`is “set”
`
`EX-1006, FIG. 3;
`Petition, 36
`
`EX-1003, 84-85;
`Petition, 35-36
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`47
`
`47
`
`
`
`Jeon 412 teaches a “control signal line” connected to a gate of a
`transistor
`
`Control signal
`line connected
`to gate of
`transistor
`
`EX-1005, FIG. 2;
`Petition, 26-27;
`EX-1003, 89-91
`
`Transistor
`
`Output terminal
`connected to gate
`of transistor
`
`EX-1005, FIG. 5;
`Petition, 26-28;
`EX-1003, 89-91
`
`Circuit element
`
`Input terminal
`
`DEMONSTRATIVE(cid:3)EXHIBIT(cid:3)– NOT(cid:3)EVIDENCE
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`48
`
`48
`
`