as) United States
`a2) Patent Application Publication 10) Pub. No.: US 2009/0109035 Al
`(43) Pub. Date: Apr. 30, 2009
`
`SUBRAMANIANetal.
`
`US 20090109035A1
`
`(54) HIGH RELIABILITY SURVEILLANCE
`AND/OR IDENTIFICATION TAG/DEVICES
`AND METHODS OF MAKING AND USING
`THE SAME
`
`(76)
`
`Inventors:
`
`Vivek SUBRAMANIAN,Orinda,
`CA (US); Patrick Smith, San Jose,
`CA (US); Vikram Pavate, San
`Mateo, CA (US); Arvind Kamath,
`Mountain View, CA (US); Criswell
`Choi, Menlo Park, CA (US); Aditi
`Chandra, Los Gatos, CA (US);
`James Montague Cleeves,
`Redwood City, CA (US)
`
`Correspondence Address:
`THE LAW OFFICES OF ANDREW D. FORT-
`NEY, PH.D., P.C.
`401 W FALLBROOKAVESTE 204
`FRESNO,CA 93711-5835 (US)
`
`(21) Appl. No.:
`
`12/249,754
`
`(22)
`
`Filed:
`
`Oct. 10, 2008
`
`Related U.S. Application Data
`
`(60) Provisional application No. 60/998,553, filed on Oct.
`10, 2007, provisional application No. 60/998,554,
`filed on Oct. 10, 2007.
`
`Publication Classification
`
`(51)
`
`Int. Cl.
`(2006.01)
`GO8B 13/14
`(52) US. CMe cccccccscssssssssssseseeseeesesesssssstsssnnneeees 340/572.8
`
`(57)
`
`ABSTRACT
`
`The present invention relates to methods of making capaci-
`tors for use in surveillance/identification tags or devices, and
`methods of using such surveillance/identification devices.
`The capacitors manufactured according to the methodsofthe
`present invention and used in the surveillance/identification
`devices described herein comprise printed conductive and
`dielectric layers. The methods and devices of the present
`invention improve the manufacturing tolerances associated
`with conventional metal-plastic-metal capacitor, as well as
`the deactivation reliability of the capacitor used in a surveil-
`lance/identification tag or device.
`
`
`
`Infineon Exhibit 1032
`Infineon Exhibit 1032
`Infineon v. AmaTech
`Infineon v. AmaTech
`
`

`

`Patent Application Publication
`
`Apr. 30,2009 Sheet 1 of 6
`
`US 2009/0109035 Al
`
`FIG. 1A
`
`
`
`
`FIG. 1B
`
`FIG. 2
`
`120
`
`- 112
`/
`
`100
`
`
`
`

`

`Patent Application Publication
`
`Apr. 30,2009 Sheet 2 of 6
`
`US 2009/0109035 Al
`
`FIG. 3B
`
`130
`
`100
`
`FIG. 4A
`
`
`
`FIG. 4B
`
`130
`
`100
`
`

`

`Patent Application Publication
`
`Apr. 30,2009 Sheet 3 of 6
`
`US 2009/0109035 Al
`
`FIG. 5
`
`
`
`- 100
`
`FIG. 6A
`
`130
`
`<
`
`140
`
`
`dQ
`dL
`)
`» yD
`106a
`106b 106c
`104
`106d
`106e
`102
`
`112
`
`FIG. 6B
`
`102
`
`y
`]
`Y om
`Z|
`
`yGE
`
`Zyi
`
`106a
`106c
`106b
`
`

`

`Patent Application Publication
`
`Apr. 30,2009 Sheet 4 of 6
`
`US 2009/0109035 Al
`
`FIG. 7A
`
`210
`
`FIG. 7B
`
`210
`
`FIG. 8
`
`210
`
`220
`
`200
`
`200
`
`200
`
`

`

`Patent Application Publication
`
`Apr. 30,2009 Sheet 5 of 6
`
`US 2009/0109035 Al
`
`FIG. 9A
`
`230
`
`210
`
`FIG. 9B
`
`230
`
`220
`
`200
`
`200
`
`FIG. 10
`
`
`
`

`

`Patent Application Publication
`
`Apr. 30,2009 Sheet 6 of 6
`
`US 2009/0109035 Al
`
`FIG, 11
`
`
`
`

`

`US 2009/0109035 Al
`
`Apr. 30, 2009
`
`HIGH RELIABILITY SURVEILLANCE
`AND/OR IDENTIFICATION TAG/DEVICES
`AND METHODS OF MAKING AND USING
`THE SAME
`
`RELATED APPLICATIONS
`
`capacitor by coupling and/or connecting an antenna and/or
`inductorto thefirst (semi)conductive layer and the top capaci-
`tor electrode.
`
`[0006] A second aspect of the present invention concerns
`surveillance and/or identification devices, such as EAS, RF,
`and/or RFID devices or tags. According to one general
`embodiment, the surveillance and/or identification device
`generally comprises (a) a unitary conductive structure com-
`prising a bottom capacitor electrode and an inductor, (b) a first
`dielectric layer on the bottom capacitor electrode and induc-
`tor, (c) atop capacitor electrode having a dome-shapedprofile
`onthefirst dielectric layer, (d) a second dielectric layer on the
`top capacitor electrode, and the conductive structure, and (e)
`an electrically conducting feature on the second dielectric,
`having one portion contacting the top capacitor electrode and
`a second portion contacting the conductive structure.
`[0007] According to a second general embodiment, a sur-
`veillance and/or identification device comprises (a) a bottom
`capacitor electrode having a dome-shapedprofile on a sub-
`[0002] The present invention generallyrelates to the field of
`strate, (b) a first dielectric layer on the bottom capacitor
`surveillance and/or identification tags and devices. More spe-
`electrode, (c) top capacitor electrode having a dome-shaped
`cifically, embodiments of the present invention pertain to
`profile on thefirst dielectric layer, (d) a seconddielectric layer
`EAS, RF and/or RFID tags/devices, structures and methods
`on the substrate having first and second contact holes therein
`for their manufacturing and/or production, and methods of
`to expose the bottom capacitor electrode andthe top capacitor
`using such tags and/or devices.
`electrode, and (e) and antenna and/or inductor havingafirst
`SUMMARYOF THE INVENTION
`end coupled to the bottom capacitor electrode and a second
`end coupled to the top capacitor electrode.
`[0008] A third aspect of the present invention concerns a
`method of detecting items with the surveillance and/or iden-
`tification devices of the present invention. In general a sur-
`veillance/identification device can be detected by causing or
`inducing a current sufficientfor the deviceto radiate,reflect,
`or backscatter detectable electromagnetic radiation and
`detecting the detectable electromagnetic radiation. Option-
`ally, a device that is detected can be selectively deactivated, or
`in the alternative, a detected device may be instructed to
`perform an action.
`[0009] The present invention solves knownproblemsasso-
`ciated with conventional surveillance and/or identification
`
`[0001] This application claims the benefit of U.S. Provi-
`sional Application No. 60/998,553, filed Oct. 10, 2007 (Attor-
`ney Docket No. IDR1411), which is incorporated herein by
`referencein its entirety, and U.S. Provisional Application No.
`60/998,554,
`filed Oct. 10, 2007 (Attorney Docket No.
`IDR1461). Furthermore, this application may be related to
`US. Pat. No. 7,286,053 and co-pending U.S. patent applica-
`tion Ser. No. 11/243,460 (Attorney Docket No. IDR0272),
`filed Oct. 3, 2005, the relevant portions of which are incor-
`porated herein by reference.
`
`FIELD OF THE INVENTION
`
`[0003] Embodiments of the present inventionrelate to sur-
`veillance/identification tags and devices, the structures com-
`prising such devices, and methods of manufacturing and
`using the same. More specifically, embodiments of the
`present invention pertain to EAS, RF and/or RFID devices,
`structures thereof, and methods for their manufacture and
`use.
`
`[0004] A first aspect of the present invention concerns
`methods of making capacitors and/or surveillance/identifica-
`tion devices. In one general method, a capacitor can be made
`by forming a dielectric layer on an electrically conductive
`substrate, and then printing a (semi)conductive layer on at
`least a portion of the printed dielectric layer. The dielectric
`layer is then etched using the (semi)conductive layer as a
`mask to form a capacitor dielectric on the electrically con-
`ductive substrate. A second dielectric layer is then formed in
`a pattern on the conductive substrate and/or the (semi)con-
`ductorlayer (e.g., the top capacitor electrode). An electrically
`conducting “feature” is then formed on the seconddielectric
`layer. A first portion of the feature is in contact with the
`(semi)conductive layer (e.g., top capacitor electrode) and a
`second portion ofthe conducting feature is in contact with the
`conductive substrate. A bottom capacitor electrode is then
`formed from the conductive substrate. In various embodi-
`
`ments, an inductor and/or antenna may be formed from the
`conductive substrate to manufacture a surveillance/identifi-
`cation device.
`
`Inasecond general embodiment, a capacitor can be
`[0005]
`made byprinting a first (semi)conductive layer, including a
`bottom capacitor electrode on a substrate, forming a first
`dielectric layer in a pattern onthefirst (semi)conductive layer,
`and printing a top/upper capacitor electrode/plate on the first
`dielectric layer. A second dielectric layer is formed on the
`substrate. The seconddielectric layer has a first contact hole
`therein exposing the first (semi)conductive layer, and a sec-
`ond contact hole exposing the top/upper capacitor electrode.
`A surveillance/identification device may be made usingthis
`
`devices including (1) unreliable breakdown of the capacitor
`dielectric due to large manufacturing tolerances associated
`with the thickness and quality of the capacitor dielectric used
`in conventional surveillance/identification devices(e.g., plas-
`tic dielectric), and (2) recovery of the device due to a refor-
`mation of “healing” of the capacitor dielectric layer after it
`has broken downin the deactivation process. Using a capaci-
`tor formed with a printed metal-oxide-semiconductor device
`and/or using thin film materials as described herein, ensures
`improved manufacturing tolerances, and also ensuresthat the
`healing problems associated with conventional capacitors are
`eliminated or dramatically reduced. These and other advan-
`tages of the present invention will becomereadily apparent
`from the detailed description of preferred embodiments
`below.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIGS. 1A and 1B show cross-sectional and top
`[0010]
`views, respectively, of a conductive substrate having a dielec-
`tric layer and (semi)conductive layer printed thereon.
`[0011]
`FIG. 2 shows a cross-sectional view ofthe structure
`of FIGS. 1A and 1B with the dielectric layer etched using the
`(semi)conductive layer as a mask.
`
`

`

`US 2009/0109035 Al
`
`Apr. 30, 2009
`
`FIGS. 3A and 3B show cross-sectional and top
`[0012]
`views, respectively, of the structure of FIG. 2 with a second
`dielectric layer on the (semi)conductive layer.
`[0013]
`FIGS. 4A and 4B show cross-sectional and top
`views, respectively, of the structure of FIGS. 3A-3B with an
`electrically conducting feature on the seconddielectric layer.
`[0014]
`FIG. 5 shows a cross-sectional view ofthe structure
`of FIGS. 4A-4B with a passivation layer formed thereon.
`[0015]
`FIG. 6A showsa cross-sectional view of the struc-
`ture of FIG. 5 with a bottom electrode and an inductor formed
`from the conductive substrate.
`
`[0016]
`FIG.6A.
`
`FIG. 6B shows a bottom up view ofthe structure of
`
`tions of a device and/or tag, and the term “EAStag” or “EAS
`device” may be used herein to refer to any EAS and/or sur-
`veillance tag and/or device. In addition, the terms “item,”
`“object” and “article” are used interchangeably, and wherever
`one such term is used, it also encompasses the other terms.
`Furthermore, the terms “capacitor electrode” and “capacitor
`plate” may be used interchangeably, and also the terms
`“shape,” “feature,” “line,” and “pattern” may be used inter-
`changeably. The term “(semi)conductor,’ “(semi)conduc-
`tive” and grammatical equivalents thereof refer to materials,
`precursors, layers, features or other species or structures that
`are conductive and/or semiconductive.
`
`FIGS. 7A and 7B show cross-sectional and top
`[0017]
`views, respectively, ofa substrate and a first (semi)conductive
`layer
`formed thereon, according to another exemplary
`embodimentof the present invention.
`[0018]
`FIG. 8 showsa cross-sectional view of the structure
`of FIGS. 7A-7B with a first dielectric layer printed thereon.
`[0019]
`FIGS. 9A and 9B show cross-sectional and top
`views, respectively, of the structure of FIG. 8 with an upper
`capacitor plate printed on thefirst dielectric layer.
`[0020]
`FIG. 10 shows a cross-sectional view of the struc-
`ture ofFIGS. 9A and 9B with a seconddielectric layer formed
`on the uppercapacitorplate, the second dielectric layer hav-
`ing first and second contact holes formedtherein.
`[0021]
`FIG. 11 shows an exemplary method of forming a
`surveillance and/or identification device according to the
`present invention by attaching an inductor/antenna to the
`structure of FIG. 10.
`
`DETAILED DESCRIPTION OF THE PREFERRED
`EMBODIMENTS
`
`[0022] Reference will now be made in detail to the pre-
`ferred embodiments of the invention, examples of which are
`illustrated in the accompanying drawings. While the inven-
`tion will be described in conjunction with the preferred
`embodiments, it will be understoodthat they are not intended
`to limit the invention to these embodiments. On the contrary,
`the invention is intended to cover alternatives, modifications
`and equivalents, which may be included within the spirit and
`scope of the invention as defined by the appended claims.
`Furthermore,
`in the following detailed description of the
`present invention, numerous specific details are set forth in
`order to provide a thorough understanding of the present
`invention. However,it will be readily apparent to one skilled
`in theart that the present invention may be practiced without
`these specific details. In other instances, well-known meth-
`ods, procedures, components, and circuits have not been
`described in detail so as not to unnecessarily obscure aspects
`of the present invention. In addition, it should be understood
`that the possible permutations and combinations described
`herein are not meantto limit the invention. Specifically, varia-
`tions that are not inconsistent may be mixed and matched as
`desired.
`
`In the present application, the term “deposit” (and
`[0024]
`grammatical variations thereof) is intended to encompassall
`formsof deposition, including blanket deposition (e.g., CVD
`and PVD), (spin)coating, and printing. In various embodi-
`ments of the methodofprinting a metal-containing ink on a
`substrate, printing may comprise inkjetting, gravure printing,
`offset printing, flexographic printing, spray-coating,slit coat-
`ing, extrusion coating, meniscus coating, microspotting and/
`or pen-coating the metal formulation onto the substrate. Also,
`for convenience and simplicity, the terms “part,” “portion,”
`and “region” may be used interchangeably but these terms are
`also generally given their art-recognized meanings. Also,
`unless indicated otherwise from the context of its use herein,
`the terms“known,”“fixed,” “given,” “certain” and “predeter-
`mined” generally refer to a value, quantity, parameter, con-
`straint, condition,state, process, procedure, method,practice,
`or combination thereof that is, in theory, variable, but is
`typically set in advance andnotvaried thereafter whenin use.
`In addition, the term “doped”refers to a material that is doped
`with any substantially controllable dose of any dopant(e.g.,
`lightly doped, heavily doped, or doped at any dopinglevel in
`between).
`[0025]
`In the present disclosure, the phrase “consisting
`essentially of a Group IVA element” does not exclude inten-
`tionally added dopants, which may give the Group IVA ele-
`mentcertain desired (and potentially quite different) electri-
`cal properties. The term “(poly)silane” refers to compounds
`or mixtures of compoundsthat consistessentially of (1) sili-
`con and/or germanium and (2) hydrogen, and that predomi-
`nantly contain species having at least 15 silicon and/or ger-
`manium atoms. Such species may contain one or more cyclic
`rings. The term “(cyclo)silane” refers to compounds or mix-
`tures of compounds that consist essentially of (1) silicon
`and/or germanium and (2) hydrogen, and that may contain
`one or more cyclic rings and less than 15 silicon and/or
`germanium atoms. In a preferred embodimentthe silane has
`a formula Si,H,, wherex is from 3 to about 200, and y is from
`x to (2x+2), where x maybe derived from an average number
`molecular weight of the silane. The term “hetero(cyclo)si-
`lane” refers to compounds or mixtures of compoundsthat
`consist essentially of (1) silicon and/or germanium,
`(2)
`hydrogen, and (3) dopant atoms such as B, P, As or Sb that
`maybe substituted by a conventional hydrocarbon,silane or
`germane substituent and that may contain one or more cyclic
`the
`For the sake of convenience and simplicity,
`[0023]
`rings. Also, a “major surface” of a structure or feature is a
`terms “coupled to,” “connected to,” and “in communication
`surface defined at least in part by the largest axis of the
`with” mean direct or indirect coupling, connection or com-
`munication unless the context indicates otherwise. These
`structure or feature (e.g., if the structure is round and has a
`radius greater than its thickness, the radial surface[s] is/are
`termsare generally used interchangeably herein,but are gen-
`the major surface of the structure).
`erally given their art-recognized meanings. Also, for conve-
`[0026] One embodimentofthe present invention concerns
`nience and simplicity,
`the terms “surveillance;’ “EAS,”
`a method of making a capacitor and/or surveillance/identifi-
`“wireless,” “RF. “RFID,” and “identification” may be used
`
`interchangeably with respect to intended uses and/or func- cation device comprising the steps of (a) formingafirst
`
`

`

`US 2009/0109035 Al
`
`Apr. 30, 2009
`
`dielectric layer on a conductive substrate, (b) printing a (semi)
`conductive layer on at least a portion of the first dielectric
`layer, (c) etching the first dielectric layer using the (semi)
`conductive layer as a mask, (d) forming a second dielectric
`layer in a pattern on the conductive substrate and/or the (semi)
`conductive layer, (e) forming an electrically conducting fea-
`ture on the seconddielectric layer, one portion oftheelectri-
`cally conducting feature contacting the (semi)conductive
`layer and a secondportion of the conducting feature contact-
`ing the conductive substrate, (f) forming a bottom capacitor
`electrode from the conductive substrate, and if making a
`surveillance/identification device (g) forming an inductor
`from the conductive substrate.
`
`dielectric layer on a conductive (e.g., electrically functional)
`substrate; (b) printing a (semi)conductive layer on at least a
`portion of the first dielectric layer; (c) etching the dielectric
`layer using the (semi)conductive layer as a mask; (d) forming
`a second dielectric layer in a pattern on the conductive sub-
`strate and/or the (semi)conductive layer; (e) forming an elec-
`trically conducting feature (e.g., pattern, line, shape, etc.) on
`the second dielectric layer, one portion of the electrically
`conducting feature contacting the (sem1)conductive layer and
`a second portion of the conducting feature contacting the
`conductive substrate; and (f) if necessary or desired, forming
`a bottom capacitor electrode from the conductive substrate.
`An exemplary surveillance/identification tag and/or device
`can be madeby further forming an inductor from the conduc-
`tive substrate or from the electrically conducting “feature.”
`The capacitor maybeeitherlinear or non-linear. In preferred
`embodiments, an EAS, RF, or RFID tag/device is formed
`according to the above-described method(s).
`[0034]
`In a preferred embodiment, the (semi)conductive
`layer (e.g., the top capacitor electrode) is formed by printing
`a liquid-phase(e.g., Group IVA elementprecursor) ink on the
`dielectric layer. Printing an ink, as opposedto blanket depo-
`sition, photolithography and etching, saves on the number of
`processing steps, the length of time for the manufacturing
`process, and/or on the cost of materials used to manufacture
`the capacitor and/or surveillance/identification device.
`[0035] The first exemplary method for manufacturing the
`present capacitor and/or surveillance/identification device is
`described in detail below with reference to FIGS. 1A-6B.
`
`[0036] The Substrate
`[0037]
`FIGS. 1A-1Brespectively show cross-sectional and
`top-down viewsof a conductive(e.g., electrically functional)
`substrate 100 having a dielectric layer 110 and (semi)conduc-
`tive layer 120 formed thereon. In various embodiments, the
`conductive substrate comprises a metallic substrate, metal
`film, metal foil, or metal sheet. Specifically, the metal sub-
`strate may comprise aluminum,titanium, copper,silver, chro-
`mium, molybdenum,tungsten, nickel, gold, palladium,plati-
`num, zinc,
`iron, steel (e.g., stainless steel) or any alloy
`thereof. Other suitable conductive materials are described
`
`[0027] Asecond embodimentof the present invention con-
`cerns a second method of making a capacitor and/or surveil-
`lance/identification device comprising the steps of (a) print-
`ing a first
`(semi)conductive layer,
`including a bottom
`capacitor electrode on a substrate, (b) forminga first dielec-
`tric layer in a pattern on thefirst (semi)conductive layer, (c)
`printing a top capacitor electrode onthe first dielectric layer,
`(d) forming a second dielectric layer on the substrate, the
`second dielectric layer having a first contact hole therein
`exposing the first (semi)conductive layer and a second con-
`tact hole exposing the top capacitor electrode, and if making
`a surveillance/identification device (e) coupling and/or con-
`necting an antenna and/or inductorto the first (semi)conduc-
`tive layer and the upper capacitor plate.
`[0028]
`Ina further embodiment, the present invention con-
`cerns a surveillance and/or identification device comprising
`(a) a unitary conductive structure comprising a bottom
`capacitor electrode and an inductor, (b) a first dielectric layer
`on the bottom capacitor electrode and inductor, (c) a top
`capacitor electrode having a dome-shapedprofile on the first
`dielectric layer, (d) a seconddielectric layer on the top capaci-
`tor electrode and the conductive structure, and (e) an electri-
`cally conducting feature on the seconddielectric, having one
`portion contacting the top capacitor electrode and a second
`portion contacting the conductive structure.
`[0029]
`In an alternative embodiment, a surveillance and/or
`identification device may comprise (a) a bottom capacitor
`below with regard to exemplary surveillance/identification
`electrode having a dome-shapedprofile on a substrate, (b) a
`devices (see, e.g., the bottom capacitor electrode).
`first dielectric layer on the bottom capacitorelectrode, (c) top
`capacitor electrode having a dome-shapedprofile on the first
`[0038]
`For some implementations, the metal for the con-
`dielectric layer, (d) a second dielectric layer on the substrate
`ductive substrate may be chosenatleast in part based on its
`having first and second contact holes therein to expose the
`ability to be anodized into an effective dielectric. In exem-
`bottom capacitor electrode and the top capacitor electrode,
`plary embodiments, the conductive substrate may have a
`and (e) an antenna and/or inductor havingafirst end coupled
`nominal thickness of from 5-200 «um (preferably 20-100 um)
`to the bottom capacitor electrode and a second end coupled to
`and/or a resistivity of 0.1-10 uohm-cm (preferably 0.5-5
`the top capacitor electrode.
`uwohm-cm).
`[0030]
`Ina further aspect, the present invention concerns a
`[0039]
`Prior to subsequent processing, the conductive sub-
`methodof detecting an item or object, generally comprising
`strate 100 may be conventionally cleaned and smoothed. This
`the steps of (a) causing or inducing a current in a surveillance
`surface preparation may be achieved by chemicalpolishing,
`and/or identification device affixed to or associated with the
`electropolishing and/or oxide stripping to reduce surface
`roughness and remove low quality native oxides. A descrip-
`tion of such processesis given in, “The Surface Treatment and
`Finishing ofAluminum andIts Alloys,” by P. G. Sheasby and
`R. Pinner, sixth edition, ASM International, 2001, the rel-
`evant portions of which are incorporated herein by reference.
`[0040]
`Forming the First Dielectric Layer/Film
`[0041] As shownin FIGS. 1A-1B,the method further com-
`prises forminga first dielectric layer 110 on the conductive
`substrate 100. The first dielectric layer may be formed by
`oxidizing and/or nitriding the conductive substrate (or a liq-
`uid oxide/nitride precursor formed thereon), in an oxidizing
`
`item or object, sufficient for the device to radiate detectable
`electromagnetic radiation; (b) detecting the detectable elec-
`tromagnetic radiation; and optionally, (c) selectively deacti-
`vating the device or causing the device to perform an action.
`[0031] The invention,
`in its various aspects, will be
`explained in greater detail below with regard to exemplary
`embodiments.
`
`[0032] Exemplary Methods of Making a Capacitor and/or a
`Surveillance/Identification Device
`
`In one exemplary implementation, the method for
`[0033]
`making a capacitor comprises the steps of: (a) forminga first
`
`

`

`US 2009/0109035 Al
`
`Apr. 30, 2009
`
`and/or nitriding atmosphere. For example, the dielectric can
`be formed by oxidizing a liquid silane printed onto a metal
`substrate (e.g., steel), or by coating the substrate with another
`conductive material that can be oxidized or nitrided (e.g.,
`silicon, aluminum, chromium, hafnium etc.). In the alterna-
`tive, the dielectric may be formed by depositing (e.g., by
`printing liquid phase or chemical bath deposition processes)
`a dielectric precursor material (e.g., a SiO, precursor such as
`tetraalkylsiloxane or tetraalkoxysilane) and subsequently
`converting the precursorto a dielectric film (e.g., by drying,
`curing, and/or annealing). However, if the conductive sub-
`strate is one that cannot be processed at high temperatures
`(e.g., aluminum), methods such as printing or vapor deposi-
`tion are preferred. After converting the precursor material to
`a dielectric film, additional metal oxides (e.g., Ti0,, ZrO,
`HfO,, etc.) may be deposited on the film. Thus, in various
`embodiments, the dielectric may comprise a plurality of lay-
`ers.
`
`Inother embodiments, the dielectric may be coated/
`[0042]
`deposited by blanket deposition techniques. In general, coat-
`ing refers to a process where substantially the entire surface of
`a substrate is covered with the formulation. Coating may
`comprise methods such as spray coating, dip coating, blade
`coating, meniscus coating, slit coating, extrusion coating,
`pen-coating, microspotting,
`inkjetting, gravure printing,
`flexographic printing, or spin-coating. In such embodiments,
`areas of the substrate may be patterned and/or exposed as
`desired by etching techniques knownin theart.
`[0043]
`In some embodiments,the first dielectric layer can
`be deposited by vacuum deposition methods (e.g., CVD,
`PECVD, LPCVD,sputter deposition, etc.). Another method
`of formingthe dielectric employs anodization to form a MOS
`dielectric and/or a deactivation dielectric. A detailed descrip-
`tion of forming the dielectric by anodization is found in U.S.
`Pat. No. 7,286,053, the relevant portions of which are incor-
`porated herein by reference.
`[0044]
`Insome implementations, the dielectric (or suitable
`dielectric precursor) can be printed onto the conductive sub-
`strate. During the printing process, a liquid-based composi-
`tion (e.g., a solution, suspension, emulsion,etc.) is selectively
`deposited in a predetermined pattern, and with a characteris-
`tic resolution (e.g., minimum layout dimension, spacing,
`alignment margin of error, or any combination thereof). Suit-
`able printing processes may include inkjet printing, gravure
`printing, screen printing, offset printing, flexography, syringe
`dispensing, microspotting, stenciling, stamping, pump dis-
`pensing, laser forward transfer, local laser CVD and/or pen-
`coating. Preferably, the dielectric is printed by inkjet printing.
`For example, materials such as spin-on-glasses, and/or boron
`nitride can be printed on the conductive substrate. The dielec-
`tric layer may be printed such that areas of the conductive
`substrate are exposed.In the alternative, the dielectric layer
`maybe printed to cover the entire substrate, and then etched
`using subsequently formedstructures as a mask,as illustrated
`in FIG.2.
`
`Thedielectric layer may comprise any suitable elec-
`[0045]
`trically insulating dielectric material. Exemplary dielectric
`materials are discussed below with regard to exemplary sur-
`veillance devices (see, e.g., the sections herein entitled, “The
`First and Second Dielectric Layers’). For example,
`the
`dielectric insulator of the capacitor may comprise or consist
`essentially of an organic or an inorganic insulator. In pre-
`ferred embodiments, the dielectric comprises an oxide and/or
`nitride of the metal of the conductive/metallic substrate. In
`
`various embodiments, the dielectric layer(e.g., structure 110
`of FIGS. 1A and 1B)is formed having a thickness of from 50
`to 500 A and/or a breakdownvoltageoffrom about5 V to less
`than 50 V, preferably from 10 V to 20 V. However,the dielec-
`tric thickness may be adjusted as needed to control capaci-
`tance, and to control the voltage at which the dielectric is
`intendedto rupture.
`[0046]
`Forming the (Semi)Conductive Layer
`[0047] As shown in FIGS. 1A and 1B, the method further
`comprises the step of depositing a (semi)conductive layer
`(1.e., top capacitor electrode) 120 onthe first dielectric layer
`110. The (semi)conductive layer may be formed by deposit-
`ing a metal and/or a semiconductorlayer(e.g., lightly doped,
`heavily doped, or undoped) on the dielectric. In general, any
`method for depositing the metal and/or semiconductor mate-
`rial may be used, such as printing, or conventional blanket
`deposition (e.g., by chemical vapor deposition [CVD], low
`pressure CVD,sputtering, electroplating, spin coating, spray
`coating, etc.), photolithography and etching. However,print-
`ing is preferred.
`[0048] According to the present method(s), printing may
`comprise inkjet printing, gravure printing, screen printing,
`offset printing, flexography, syringe dispensing, microspot-
`ting, stenciling, stamping, pump dispensing, laser forward
`transfer, local laser CVD and/or pen-coating. Printing allows
`for greater control ofthe thickness ofthe printed metal/(semi)
`conductive layer. For example, if a thicker (semi)conductive
`layer is desired, the numberof drops, the drop volume,or the
`ink volumecan be increased. A thicker metal layer may also
`be achieved by decreasing the pitch between drops in an area
`wherein a thicker (semi)conductive layer (e.g., having lower
`resistance) is desired. Furthermore, printing processes allow
`the contact angle of the printed ink to be varied locally. To
`illustrate, a preprinting step adapted to locally vary the sur-
`face energy ofthe substrate can be performedso that different
`metal heights/thicknesses and/or line widths can be achieved
`with a single printingstep.
`[0049]
`In exemplary embodiments, a metal-containing ink
`is deposited on the dielectric by coating or printing tech-
`niques. In various implementations,
`the metal
`is blanket
`deposited by spin-coating an ink (e.g., a metal precursor ink)
`containing the metal-containing material (e.g., metal, orga-
`nometallic precursor(s), and/or metal nanoparticles), and
`subsequently curing or annealing the metal. In preferred
`embodiments, the metal ink is selectively deposited by print-
`ing an ink comprising a precursor of a desired metal (e.g., a
`silicide-forming metal) in a solvent, and subsequently curing,
`drying, and/or annealing the metal.
`[0050] The metal-containing ink may comprise or consist
`essentially of the metal precursor (e.g., metal-containing
`material) in an amountof from 1 to 50 wt. % ofthe ink (or any
`range of values therein), and a solvent in which the metal-
`containing material is soluble. Such metal-containing inks/
`precursors, as well as exemplary metals and/or other metal-
`containing ink formulations, are discussed in greater detail
`below with regard to exemplary surveillance/identification
`devices. Furthermore, metal-containing inks, and methods of
`forming conductive structures/layers (e.g., semiconductor
`layers) from such inks are described in co-pending U.S.
`patent application Ser. Nos. 10/616,147, 10/949,013, 11/246,
`014,
`11/249,167,
`11/452,108,
`11/888,949, 11/867,587,
`12/131,002, and 12/175,450 (Attorney Docket Nos. KOV-
`004, IDR0302, IDR0422, IDR0423, and IDR0502, IDR0742,
`IDR0884, IDR1263, IDR1052), respectively filed on Jul. 8,
`
`

`

`US 2009/0109035 Al
`
`Apr. 30, 2009
`
`2003, Sep. 24, 2004, Oct. 6, 2005, Oct. 11, 2005, Jun. 12,
`2006, Aug. 3, 2007, Oct. 4, 2007, May 30, 2008, and Jul. 17,
`2008, the relevant portions of each of which are incorporated
`herein by reference.
`[0051]
`In some embodiments, the (semi)conductive layer
`maybeprinted as a mixture of two or more metal precursors,
`or alternatively, of one or more metal precursors, and one or
`more semiconductor precursors. In other embodiments, two
`or more metal inks may be successively printed and dried as
`laminated layers. The mixtures and/or laminates can be
`optionally heated or otherwise reacted during or after forma-
`tion to form the (semi)conductive layer.
`[0052] The printed metal-containing/precursor ink may be
`dried by heating the substrate at a temperature andfor a length
`of time sufficient to remove any solvent in the ink. Tempera-
`tures for removing solvents range from about 80° C. to about
`150° C., or any range of temperatures therein (e.g., from
`about 100° C. to about 120° C.). The lengths of time for
`removing solvents from a printed ink within these tempera-
`ture ranges are from about 1 second to about 10 minutes, 10
`seconds to about 5 minutes, or any range