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`US 20040218406Al
`
`(19) United States
`(12) Patent Application Publication
`Jang et al.
`
`(10) Pub. No.: US 2004/0218406 Al
`Nov. 4, 2004
`( 43) Pub. Date:
`
`(54) CONTACTLESS ELECTRICAL ENERGY
`TRANSMISSION SYSTEM HAVING A
`PRIMARY SIDE CURRENT FEEDBACK
`CONTROLAND SOFT-SWITCHED
`SECONDARY SIDE RECTIFIER
`
`(76)
`
`Inventors: Yungtaek Jang, Cary, NC (US); Milan
`M. Jovanovic, Cary, NC (US)
`
`Correspondence Address:
`VENABLE, BAETJER, HOWARD AND
`CIVILETTI, LLP
`P.O. BOX 34385
`WASHINGTON, DC 20043-9998 (US)
`
`(21) Appl. No.:
`
`10/426,721
`
`(22) Filed:
`
`May 1, 2003
`
`Publication Classification
`
`(51)
`
`Int. CI.7 ...................................................... H02M 5/45
`
`(52) U.S. Cl. ................................................................ 363/37
`
`(57)
`
`ABSTRACT
`
`A con tactless electrical energy transmission system includes
`a transformer having a primary winding that is coupled to a
`power source through a primary resonant circuit and a
`secondary winding that is coupled to a load through a
`secondary resonant circuit. The primary and secondary
`resonant circuits are inductively coupled to each other. A
`primary control circuit detects current changes through the
`primary resonant circuit to control the switching frequency
`of a controllable switching device for maintaining a sub(cid:173)
`stantially constant energy transfer between the primary
`winding and secondary winding in response to at least one
`of a power source voltage change and a load change. As a
`result, excessive circulating energy of the CEET system is
`minimized providing a tight regulation of the output voltage
`over the entire load and input voltage ranges without any
`feedback connection between the primary side and the
`secondary side .
`
`Variable Frequency
`Resonant Inverter
`
`.
`.
`.........................................................................................
`i
`i
`Controlled ZVS
`Fu 11-Brid ge ;Rectifier
`
`INDUCTIVE
`COUPLIN G
`
`n
`
`Variable(cid:173)
`Frequency
`Resonant
`Inverter
`
`+
`
`J_
`L
`0
`A
`D
`
`Controlled
`zvs
`Rectifier
`
`•
`d
`
`n
`\.)
`
`,.
`
`Primary-Current
`Feedback
`Frequency
`Control
`
`Secondary-
`Current
`Zero-Cross
`Detection
`
`PWM
`Output Voltage
`Feedback +-
`Control
`
`Synchronized
`- Ramp Signal
`Generator
`
`Ex.1010
`APPLE INC. / Page 1 of 14
`
`

`

`Patent Application Publication Nov. 4, 2004 Sheet 1 of 8
`
`US 2004/0218406 Al
`
`L
`0
`A
`D
`
`T
`
`Controlled
`Rectifier
`
`'
`
`d
`
`PWM
`Output Voltage
`Feedback +--
`Control
`
`Variable(cid:173)
`Frequency
`Resonant
`Inverter
`
`Input-Voltage
`Feedforward
`Frequency
`Control
`
`INDUCTIVE
`COUPLING
`
`(PRIOR ART)
`Fig. 1
`
`Ex.1010
`APPLE INC. / Page 2 of 14
`
`

`

`Patent Application Publication Nov. 4, 2004 Sheet 2 of 8
`
`US 2004/0218406 Al
`
`Variable Frequency
`Resonant Inverter
`
`.
`.
`·····-··· ............................... .
`:
`:
`Controlled
`:
`:
`!
`Rectifier
`.
`.
`:
`:
`:
`
`T
`
`+Vcs -
`
`C
`
`L
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`A Vo
`D
`
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`.
`.
`.
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`d
`
`PWM
`
`Output
`Voltage
`Divider
`
`Vo(SENSE)
`
`VEA--------,
`V REF
`Error Amplifier
`with Compensator .___
`
`Driver
`
`Differential
`Voltage Sensing,
`Scaling, and
`Level Shifting
`
`Variable-Gain
`Input Voltage
`Sensing
`
`Voltage
`Controlled
`Oscillator (VCO)
`
`(PRIOR ART)
`Fig. 2
`
`Ex.1010
`APPLE INC. / Page 3 of 14
`
`

`

`Patent Application Publication Nov. 4, 2004 Sheet 3 of 8
`
`US 2004/0218406 Al
`
`Variable Frequency
`Resonant Inverter
`
`Controlled ZVS
`Full-Bridge,Rectifier
`
`Variable(cid:173)
`Frequency
`Resonant
`Inverter
`
`Primary-Current
`Feedback
`Frequency
`Control
`
`INDUCTIVE
`COUPLIN G
`
`n
`
`r\
`
`L +
`0
`A
`D
`
`I
`
`Controlled
`zvs
`Rectifier
`
`d
`
`'
`Secondary-
`Current
`Zero-Cross
`Detection
`
`PWM
`Output Voltage
`Feedback
`Control
`
`f4---
`
`Synchronized
`. Ramp Signal
`Generator
`
`:
`
`Fig. 3
`
`Ex.1010
`APPLE INC. / Page 4 of 14
`
`

`

`Patent Application Publication Nov. 4, 2004 Sheet 4 of 8
`
`US 2004/0218406 Al
`
`Variable Frequency
`Resonant Inverter
`
`Controlled
`ZVS Full-Bridge
`Rectifier
`
`SH
`
`D1
`
`D2
`
`Cp
`
`Cs
`
`Vs +
`
`C
`
`L +
`0
`Vo
`A
`D
`
`d
`
`Primary-Current
`Feedback
`Frequency
`Control
`
`Secondary(cid:173)
`Current
`Zero-Cross
`Detection
`
`PWM
`Output Voltage
`Feedback ____ _,
`
`Control
`
`Synchronized
`Ramp Signal
`Generator
`
`Fig. 4
`
`Ex.1010
`APPLE INC. / Page 5 of 14
`
`

`

`Patent Application Publication Nov. 4, 2004 Sheet 5 of 8
`
`US 2004/0218406 Al
`
`--..
`+
`+
`io
`D1 Vo1 D2 Vo2
`Ls + vcs -
`i is1
`
`iLS
`
`Cs
`
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`
`t is2
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`
`Vs +
`
`SH
`
`isl t
`
`SL
`
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`
`TR
`
`+
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`
`jLP
`
`ip{
`•
`LM Np
`jMt
`
`•
`Ns
`
`N
`n=-P-
`Ns
`
`Fig. 5
`
`Ex.1010
`APPLE INC. / Page 6 of 14
`
`

`

`Patent Application Publication Nov. 4, 2004 Sheet 6 of 8
`
`US 2004/0218406 Al
`
`lJ
`
`(k) I T10 - T 11 I
`
`(I)
`
`( T,, - T,2 l
`
`Fig. 6
`
`Ex.1010
`APPLE INC. / Page 7 of 14
`
`

`

`Patent Application Publication Nov. 4, 2004 Sheet 7 of 8
`
`US 2004/0218406 Al
`
`ON
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`Fig. 7
`
`t
`
`Ex.1010
`APPLE INC. / Page 8 of 14
`
`

`

`Patent Application Publication Nov. 4, 2004 Sheet 8 of 8
`
`US 2004/0218406 Al
`................................................................................................. :
`Controlled Z.VS
`Full-Bridge Rectifier
`
`D1 -~
`
`D2 ~
`
`Cs
`I I
`ti
`
`C -~ -~
`
`+ Vcs - y K1
`
`·1
`·---- ··················· .................. ...................................
`I Sec(SENSE)
`
`..
`
`+
`
`L
`0
`A
`D -
`
`ir
`
`Output
`Voltage
`Divider
`
`Variable Frequency
`Resonant Inverter
`
`T
`
`Vo(SE NSE)
`
`Error Amplifier
`with Compensator
`
`.__
`V REF
`
`Driver
`
`'
`
`Zero-Cross
`Detection
`
`I Pri(SENS E)
`
`Vs
`
`PWM
`Modulator
`and Driver
`1
`
`·~ ' ~ VEA
`
`PWM
`Modulator
`and Driver
`2
`
`'~ ' ~
`
`VEA
`
`Voltage
`Controlled
`Oscillator (VC0)
`
`Error Amplifier
`with Compensator
`
`REF
`
`VRJ\MP1
`
`._. Ramp Signal
`
`Synchronized
`
`Generator 1
`
`Synchronized VRAMP2
`
`----. Ramp Signal
`
`Generator 2
`
`Fig. 8
`
`Ex.1010
`APPLE INC. / Page 9 of 14
`
`

`

`US 2004/0218406 Al
`
`Nov. 4, 2004
`
`1
`
`CONTACTLESS ELECTRICAL ENERGY
`TRANSMISSION SYSTEM HAVING A PRIMARY
`SIDE CURRENT FEEDBACK CONTROL AND
`SOFT-SWITCHED SECONDARY SIDE RECTIFIER
`
`FIELD OF THE INVENTION
`
`[0001] Generally, the present invention relates to the field
`of contactless electrical energy transmission (CEET) sys(cid:173)
`tems, more particularly, to CEET systems that provide
`highly regulated power to a load.
`
`BACKGROUND OF THE INVENTION
`
`[0002] Contactless electrical energy transmissions are
`known for the convenience by which they deliver power to
`a load. Generally, CEET systems transfer power via an
`air-gap inductive coupling without there being any direct
`electric connection between a primary side and a secondary
`side. As such, in some applications, CEET systems offer
`distinct advantages over energy transmission systems that
`use wires and connectors. For example, CEET systems are
`preferred in hazardous applications such as mining and
`underwater environments due to the elimination of the
`sparking and the risk of electrical shocks. Other exemplary
`applications that use CEET systems include charging
`devices that safely and reliably transfer power to consumer
`electronic devices and medical devices.
`[0003] A typical CEET system consists of a transmitter in
`the primary side, a transformer, and a receiver in the
`secondary side. Such CEET system employs a primary
`inverter at the transmitter and a secondary rectifier at the
`receiver. The inverter and rectifier are coupled to each other
`via the primary and secondary windings of the transformer.
`Since the primary winding and the secondary winding are
`inductively coupled through the air-gap, electric power is
`transferred from the primary side to the secondary side as
`magnetic energy obviating the need for any physical elec(cid:173)
`trical interconnections.
`[0004] However, power transmission via the inductive
`coupling of the CEET transformer has certain drawbacks in
`terms of low efficiency and unregulated delivery of power to
`the load. This is because the leakage inductance of the CEET
`transformer with air-separated primary and secondary wind(cid:173)
`ings is much larger than the leakage inductance of a con(cid:173)
`ventional transformer that uses well interleaved primary and
`secondary windings. The CEET primary and secondary
`windings can store high amounts of leakage inductance
`energy that can cause high parasitic ringing and losses.
`Moreover, in CEET systems, it is very difficult to regulate
`power transmission mainly because there is no physical
`connection between the primary side and the secondary side
`that would provide feedback information for regulating the
`power transmission.
`[0005] FIG. 1 shows one CEET system that achieves high
`efficiency by recovering the energy stored in the leakage
`inductance of the transformer. This system, which is more
`fully described in U.S. Pat. No. 6,301,128 Bl, issued to
`Delta Electronics, Inc., the assignee of the present invention,
`incorporates the leakage inductance of each one of the
`primary and secondary sides in its power stage. The primary
`side includes a variable-frequency resonant inverter and the
`secondary side includes a controlled rectifier. An input(cid:173)
`voltage feed forward control block controls the output
`
`frequency of the variable-frequency resonant inverte~ in
`response to source voltage variations, while a pulse width
`modulated (PWM) output voltage feedback control block
`controls the controlled rectifier output in response to load
`variations. Under this arrangement, the PWM output voltage
`feedback control block and the input-voltage feed forward
`control block act as independent controls for regulating the
`output voltage without any feedback connection between_the
`primary and secondary sides. FIG. 2 shows a more detailed
`schematic block diagram of the power stage and the con(cid:173)
`trollers shown in FIG. 1.
`
`[0006]
`In conventional CEET systems, lack of any feed(cid:173)
`back information from the secondary side to the primary
`side prevents adjusting energy transfer from the primary side
`in response to load variations that occur on the secondary
`side. Thus, the maximum transferable power through the
`inductive coupling of the primary and secondary sides can
`vary under a range of light-load to high-load conditions.
`Such variations can create extra circulating energy and
`conduction losses. Moreover, for pulse width modulated
`control of energy transfer on the secondary side, the ratio of
`the duty cycle variations can be very large at high-load and
`light-load conditions. As a result, guaranteeing reliable
`operation over the entire load range requires complex cir(cid:173)
`cuitry for implementing a suitable feedback control.
`
`[0007] Finally, switch Ss of the controlled rectifier in FIG.
`2 turns on with hand switching, i.e., when the MOSFET
`switch turns on when the voltage across the switch is equal
`to the output voltage. The hard switching is not desirable,
`because it increases conductive noise and energy loss in the
`CEET system.
`
`[0008] Therefore, there exists a need for a simple CEET
`solution that provides a highly regulated power transfer
`between the primary and secondary sides and avoids harm(cid:173)
`ful hard switching conditions.
`
`SUMMARY OF THE INVENTION
`
`[0009] Briefly, according to the present invention, a con(cid:173)
`tactless electrical energy transmission system couples a
`power source to a load. The system includes a transformer
`having a primary winding that is coupled to the power
`source through a primary resonant circuit of an inverter and
`a secondary winding that is coupled to the load through a
`secondary resonant circuit of a rectifier. The primary and
`secondary resonant circuits are inductively coupled to each
`other. A primary control circuit is responsive to a current
`change through the primary resonant circuit to control the
`switching frequency of a controllable switching device for
`maintaining a substantially constant energy transfer between
`the primary winding and secondary winding in response to
`either one or both of a power source voltage change and a
`load change.
`
`[0010] According to another aspect, a secondary control
`circuit generates one or more pulse width modulated control
`signals for controlling the amount of energy delivered to the
`load under varying load conditions. The pulse width modu(cid:173)
`lated signals are generated in response to a voltage variation
`across the load and a zero current crossing through the
`secondary resonant circuit.
`
`[0011] According to yet another aspect of the present
`invention, a secondary controllable switching circuit is
`
`Ex.1010
`APPLE INC. / Page 10 of 14
`
`

`

`US 2004/0218406 Al
`
`Nov. 4, 2004
`
`2
`
`responsive to one or more pulse width modulated control
`signals. The secondary controllable switching circuit has
`one or more switches that are activated at substantially zero
`voltage to avoid hard switching conditions.
`[0012] According to some of the more detailed features of
`the present invention, the secondary control circuit detects a
`zero current crossing through the secondary resonant circuit
`to generate synchronized ramp signals for controlling the
`pulse width modulated control signals. In an exemplary
`embodiment, the synchronized ramp signals are 180° out of
`phase from each other.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0013] FIG. 1 shows a block diagram of a known CEET
`system;
`[0014] FIG. 2 shows a more detailed block diagram of the
`CEET system of FIG. 1;
`[0015] FIG. 3 shows a block diagram of a CEET system
`according to the present invention;
`[0016] FIG. 4 shows a more detailed block diagram of the
`CEET system of FIG. 3;
`[0017] FIG. 5 shows an equivalent circuit diagram of the
`CEET system of the present invention;
`[0018] FIG. 6(a)-(l) show various topological stages for
`the equivalent circuit of FIG. 5;
`[0019] FIG. 7(a)-(q) show some of the waveforms for the
`equivalent circuit of FIG. 5; and
`[0020] FIG. 8 shows a more detailed block diagram of the
`CEET system of FIG. 3.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`
`[0021] FIG. 3 shows an exemplary block diagram of the
`CEET system in accordance with the present invention. The
`system of FIG. 3 includes a variable frequency resonant
`inverter at a primary side and a controlled rectifier at a
`secondary side that includes a load. The primary side and
`secondary side are inductively coupled through the primary
`and secondary windings of a transformer. As shown, the
`inverter couples a power source having a power voltage Vs
`to the primary winding through a primary resonant circuit
`comprising inductive and capacitive elements in the primary
`side. As described later in detail, a primary-current feed back
`frequency control block controls a primary switching fre(cid:173)
`quency for regulating the power transfer between the pri(cid:173)
`mary and secondary sides. On the secondary side, the
`rectifier, which is a controlled zero-voltage switching (ZVS)
`rectifier, couples the secondary winding to a load through a
`secondary resonant circuit comprising inductive and capaci(cid:173)
`tive elements in the secondary side. The primary resonant
`circuit and the secondary resonant circuit are inductively
`coupled each other through the primary and secondary
`windings of the transformer.
`[0022]
`In accordance with one aspect of the present inven(cid:173)
`tion, current through the primary winding is controlled in
`response to a sensed current change that is caused by a
`power voltage Vs or a load change. As such either one of a
`power voltage change or load change or both regulate the
`power transfer between the primary and secondary sides.
`
`More specifically, a primary controllable switching device
`has a switching frequency that controls the current flow
`through the primary winding. This aspect of the present
`invention senses primary resonant current changes for con(cid:173)
`trolling the switching frequency of the primary controllable
`switching device so that the transferred power through the
`transformer is automatically maintained constant relative to
`power voltage Vs and load changes. Also, as described later
`in detail, in accordance with another aspect of the present
`invention, a secondary current zero-cross detection block is
`used with a synchronized ramp signal generator to control a
`pulse width modulated (PWM) feedback control block that
`provides tightly regulated control over a wide range of load
`conditions.
`[0023] FIG. 4 shows a more detailed block diagram of the
`CEET system of FIG. 3 with a series resonant inverter in the
`primary side. The primary side is comprised of a pair of
`primary switches SH and Su which are shown with their
`antiparallel diodes. These switches form a primary con(cid:173)
`trolled switching circuit. The inverter also includes a reso(cid:173)
`nant capacitor Cp, which is part of the primary resonant
`circuit. The secondary side is comprised of resonant capaci(cid:173)
`tor Cs, diodes D1 and 02 , and filter capacitor C. Secondary
`switches S 1 and S2 , which are also shown with their anti(cid:173)
`parallel diodes, form a secondary controlled switching cir(cid:173)
`cuit.
`[0024] FIG. 5 shows an equivalent circuit to the CEET
`system of the invention with leakage Lp, Ls, and magnetiz(cid:173)
`ing LM inductances of the transformer. To simplify the
`analysis, it is assumed that the input- and output-ripple
`voltages are negligible so that the voltages across the input
`and output filter capacitors can be represented by constant(cid:173)
`voltage sources Vs and V 0 , respectively. As such, inductive
`and capacitive elements shown on the primary and second(cid:173)
`ary sides create respective primary and secondary resonant
`circuits that are inductively coupled to each other.
`[0025] To further facilitate the explanation of the opera(cid:173)
`tion, FIGS. 6(a)-(l) show topological stages of the circuit in
`FIG. 5 during a switching cycle, whereas FIGS. 7(a)(-(q)
`show the power-stage key waveforms for operation. To
`further simplify the analysis, the following analysis of
`operation assumes that all semiconductor components in the
`circuit are ideal. i.e., that they exhibit zero resistance when
`in the on state and infinite resistance in the off state.
`Moreover, the magnetizing current iM in FIG. 5 is in phase
`with resonant current iLs· Nevertheless, these assumptions
`do not have any significant effect on the explanation of the
`principle of operation of the proposed circuit.
`[0026] Before secondary switch S1 , is turned on at t=T0 ,
`negative primary side resonant current iLP=iM+ip=iM+iLs/n
`flows through leakage inductance Lp, resonant capacitor Cp,
`and low-side switch Su whereas, negative secondary-side
`resonant current iLs flows through leakage inductance Ls,
`resonant capacitor Cs, output diode D2 , and the antiparallel
`diode of secondary switch S1 , as shown in FIG. 6(!). At the
`same time, output diode D1 and secondary switch S2 are off
`blocking output voltage V0 , whereas, high-side switch SH is
`off blocking input voltage Vs· As a result, secondary switch
`S1 turns on with ZVS at t=T0 , as shown in FIG. 6(a).
`[0027] After secondary switch S1 is turned on, the direc(cid:173)
`tion of the resonant current is not changed until low-side
`switch SL is turned off at t= T 1 . After low-side switch SL is
`
`Ex.1010
`APPLE INC. / Page 11 of 14
`
`

`

`US 2004/0218406 Al
`
`Nov. 4, 2004
`
`3
`
`turned off at t= T 1 , resonant current iLP flowing through
`switch SL is diverted from the switch to its output capaci(cid:173)
`tance Cossu as shown in FIG. 6(b). As a result, the voltage
`across switch SL starts increasing, whereas the voltage
`across high-side switch SH starts decreasing, as illustrated in
`FIGS. 7(c) and 7(d.), since the sum of the voltage across
`switches SL and SH is equal to input voltage Vs· When the
`voltage across high-side switch SH reaches zero at t=T2 , i.e.,
`when output capacitance CossH of high-side switch SH fully
`discharged, the antiparallel diode of high-side switch SH
`begins to conduct, as shown in FIG. 6(c). At the same time,
`low-side switch SL is off blocking input voltage Vs· Because
`after t= T 2 input voltage Vs is connected to the resonant
`circuit, the resonant current starts increasing. This topologi(cid:173)
`cal stage ends at t=T4 when iLP reaches zero and the
`antiparallel diode of high-side switch SH stops conducting.
`As can be seen from FIG. 7(e), to achieve ZVS of Sm it is
`necessary to turn on SH while its antiparallel diode is
`conducting.
`
`(
`
`5
`
`In FIG. 7(a), high-side switch SH is turned on at
`[0028]
`t=T with ZVS. As a result, after t=T4 resonant current iLP
`continues to flow through closed switch SH, as shown in
`FIG. 6(e). Because of the assumption that currents iM and
`are in phase with current iLP, when the direction of current
`iLP is reversed at t= T 4 , the direction of iM and iLs is also
`reversed, as illustrated in FIGS. 7(e)-7(g). Consequently, at
`t= T 4 current iLs which was flowing through output diode D2
`and the antiparallel diode of switch S1 , is diverted to the
`antiparallel diode of switch S2 and switch S1 , as shown in
`FIG. 6(e). This topological stage ends at t=T5 , when sec(cid:173)
`ondary switch S1 is turned off.
`[0029] After secondary switch S1 is turned off at t=T5 ,
`primary side resonant current iLP flows through leakage
`inductance Lp, resonant capacitor Cp, and high-side switch
`SH, whereas, secondary-side resonant current iLs flows
`through leakage inductance Ls, resonant capacitor Cs, out(cid:173)
`put diode D1 , and the antiparallel diode of secondary switch
`S2 , as shown in FIG. 6(j). As a result, secondary switch S2
`can be turned on with ZVS at t=T6 , as shown in FIG. 6(g).
`This topological stage ends at t=T7 , when high-side switch
`SH is turned off. After high-side switch SH is turned off at
`t= T 7 , resonant current iLP flowing through switch SH is
`diverted from the switch to its output capacitance Cossm as
`shown in FIG. 6(h). As a result, output capacitance CossH
`is being charged, whereas output capacitance CossL is being
`discharged. When output capacitance CossL is fully dis(cid:173)
`charged at t= T 8, the antiparallel diode of low-side switch SL
`begins to conduct, as shown in FIG. 6(i). At the same time,
`high-side switch SH is off blocking input voltage Vs· This
`topological stage ends at t= T 10 when iLP reaches zero and the
`antiparallel diode of low-side switch SL stops conducting. To
`achieve ZVS of Su it is necessary to turn on SL while its
`antiparallel diode is conducting. In FIG. 7, low-side switch
`SL is turned on at t=Tg with ZVS. As a result, after t=T10
`resonant current iLP continues to flow through closed switch
`Su as shown in FIG. 60). As shown in FIGS. 6(k) and 7,
`after t=T10 , the direction of currents iLP, iM, and iLs are
`reversed so that current iLP flows through Su whereas,
`current iLs flows through switch S2 and the antiparallel diode
`of switch S1 , as shown in FIG. 6(k). The circuit stays in this
`topological stage until the next switching cycle is initiated at
`t=T12.
`
`[0030] As can be seen, the voltage stress of switches SH
`and SL is always limited to input voltage Vs while the
`voltage stress of S1 , S2 , D1 , and D2 are always limited to the
`output voltage V 0 .
`[0031] FIG. 8 shows an exemplary implementation of the
`CEET system of the present invention. The primary side
`includes a primary control block that uses current feed back
`for frequency control. The primary control block comprises
`an error amplifier with compensator that receives a sensed
`primary current IPR(SENSE) and a reference current signal
`IREF· Because of the primary and secondary resonant circuits
`are inductively coupled to each other, the sensed primary
`current IPR(SENSE) varies relative to the power voltage Vs
`changes as well as load changes. Based on the inputted
`sensed primary current IPR(SENSE) and reference current
`signal IREF• the error amplifier circuit generates an error
`signal V c, which is applied to a voltage controlled oscillator
`(VCO). The VCO output sets the primary switching fre(cid:173)
`quency fs used to control the primary controlled switching
`circuit, which includes primary switches SH and SL. A driver
`controls the switching states of the primary switches SH and
`SL by turning them on and off in accordance with the
`primary switching frequency fs.
`
`[0032] Because the primary switching frequency fs con(cid:173)
`trols the current flow through the primary winding, the
`disclosed arrangement maintains a constant energy transfer
`between the primary and secondary sides over the entire
`range of power voltage Vs and load variations. Conse(cid:173)
`quently, the CEET system of the invention provides a tight
`regulation of delivered power over the entire load and power
`source voltage ranges without a physical feedback connec(cid:173)
`tion between the primary side and secondary side. As sated
`above, the primary switching frequency fs is controlled to
`keep the magnitude of the primary current constant, so that
`the maximum transferable power through the inductive
`coupling is automatically kept constant without an excessive
`circulating energy.
`
`[0033] Preferably, the range of the primary switching
`frequency fs is set to be higher than the primary resonant
`frequency to provide a Zero Voltage Switching (ZVS)
`arrangement for the primary switches SH and Su thereby
`avoiding hard switching conditions. Alternatively, the pri(cid:173)
`mary switching frequency fs can be set to be lower than the
`primary resonant frequency primary to operate the primary
`switches SH and SL with a zero current switching (ZCS)
`arrangement.
`
`[0034]
`In accordance with another aspect of the present
`invention, the CEET system provides the output voltage
`feedback controller with a constant PWM gain over the
`entire load range using synchronized ramp signals. The
`diodes D1 and 02 , which form the secondary rectifier, are
`controlled by a secondary control block. The secondary
`control block uses a ZVS PWM control to maintain a tight
`regulation of the output voltage in the presence of a varying
`load. The secondary control block includes two PWM
`modulators that are responsive to the output voltage varia(cid:173)
`tions and the synchronized ramp signals for controlling the
`secondary switches S1 and S2 during various load conditions
`including light load and high load conditions. Under this
`Arrangement, a sensed output voltage V o(sENSE) is com(cid:173)
`pared with a reference voltage V REF at the input of an error
`with compensation amplifier. A generated error signal VEA at
`
`Ex.1010
`APPLE INC. / Page 12 of 14
`
`

`

`US 2004/0218406 Al
`
`Nov. 4, 2004
`
`4
`
`the output of the error amplifier is compared with ramp
`signals V RAMPl and V RAMP2 • Ramp signals V RAMPl and
`V
`are synchronized to the zero crossing of the secondary
`re~~~~nt current and 180° out of phase each other as shown
`in FIGS. 7(h) and 7(i). By the comparisons between error
`signal VEA and ramp signals VRAMPl• and VRAMP2 , gate
`signals S1 and S2 are generated as shown in FIGS. 7(j) and
`7(n).
`
`[0035] According to another aspect of the present inven(cid:173)
`tion, the gate signals are generated such that the secondary
`switches Sl and S2 turn on when their antiparallel diodes are
`conducting. As a result, the CEET system of the present
`invention not only provides ZVS for the primary switches
`SH and SL but also for the secondary switches S1 and S2 .
`
`[0036] When S1 and S2 are shorted, i.e., turned on, the load
`is separated from the secondary resonant circuit, causing less
`damped resonance and thereby increasing the secondary
`resonant current. This is because the secondary resonant
`current does not go through the load and is bypassed through
`the S1 and S2 causing a short circuit with no damping that
`results in the secondary resonant current to
`increase.
`Because of the inductive coupling provided by the primary
`and secondary windings, the increased current is sensed at
`the primary side. Based on the increased sensed current, the
`primary control block Increases the switching frequency to
`maintain constant current through the primary winding.
`
`[0037]
`In case of above resonant frequency operation,
`when the switching frequency is reduced, higher current and
`thus more energy is delivered to the load. Conversely, when
`the switching frequency is increased, lower current and thus
`less energy is delivered to the load. This can happen when
`S 1 and S2 are opened, i.e., turned off. As a result, the load is
`connected in series to the secondary resonant circuit increas(cid:173)
`ing resonance damping, which reduces secondary resonant
`current flow. As a result, sensed resonant current at the
`primary side is reduced, thereby reducing the primary
`switching frequency to maintain constant current through
`the primary winding. It should be noted that S1 and S2
`operate at the same frequency as the primary side switches
`SL and SH.
`
`[0038]
`In an exemplary implementation, the performance
`of the CEET system of the invention was evaluated on a
`36-W (12 V/3 A), universal-line-range (90-265 V Ac) pro(cid:173)
`totype circuit operating over a switching frequency range
`from 125 kHz to 328 kHz. The experimental circuit was
`implemented with the following components: switches SH
`and SL -IRF840; secondary switch S1 and S2-SI4810DY;
`and output diode D1 and D2 =MBR2045CT. Inductive cou(cid:173)
`pling transformer Twas built using a pair of modified ferrite
`cores (EER28-3F3) with the primary winding (80 turns of
`AWG#44/75 strands Litz wire) and the secondary winding
`(18 turns of AWG#42/150 strands Litz wire). The control
`circuit was implemented with controllers UC3863, LM319,
`AD817, and LM393. A TL431 voltage-reference I Cs is used
`for an output voltage reference for the locally controlled
`rectifier. An IR2110 driver is used to generate the required
`gate-drive signals for switches SH and SL. Two TC4420
`drivers are used to generate the required gate-drive signals
`for switches S1 and S2 • The output voltage of the experi(cid:173)
`mental circuit is well regulated with a voltage ripple less
`than 2% over the entire input-voltage range. The measured
`
`efficiencies are approximately 84.4% at full load and mini(cid:173)
`mum input voltage and approximately 78.5% at full load and
`maximum input voltage.
`1. A contactless electrical energy transmission system for
`coupling a power source to a load, comprising:
`
`a transformer having a primary winding and a secondary
`winding;
`
`an inverter coupling said power source to said primary
`winding through a primary resonant circuit;
`
`a primary controllable switching device responsive to a
`switching frequency that controls the flow of current
`through said primary winding;
`
`a rectifier coupling said secondary winding to said load
`through a secondary resonant circuit that is inductively
`coupled to the primary resonant circuit; and
`
`a primary control circuit responsive to a current change
`through said primary resonant circuit to control the
`switching frequency for maintaining a substantially
`constant energy transfer between the primary winding
`and secondary winding in response to at least one of a
`power source voltage change and a load change.
`2. The system of claim 1 further including a secondary
`controllable switching device that is responsive to a load
`change for controlling the amount of energy delivered to the
`load.
`3. The system of claim

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