Secure Dual Interface PKI Smart Card Controller
`
`
`Rev. 1.3 — 4 October 2004 Short Form Specification||
`
`1. General description
`
`1.1 Family description
`
`Philips Semiconductors SmartMX (Memory eXtension) multiple interface option platform
`features a significantly enhanced smart card IC architecture. New powerful opcodes are
`available beyond the compatible classic 80C51 instruction set. The SmartMX family
`manufactured in most advanced CMOS 0.18 um 5 metal layer technology is positioned to
`service high volume, mono- and multi-application markets such as eGovernment(e.g.
`Smart Passport), banking/finance, mobile communications, public transportation, pay TV,
`conditional access and network access.
`
`SmartMX enables the easy implementation of state-of-the-art operating systems and
`openplatform solutions including Java Card Global Platform and MULTOSbyoffering
`optimized featureslike linear addressing and an enhancedinstruction set together with
`the highestlevels of security. Within its targeted segments, the new platform is the most
`advancedsolution available, combining exceptionally powerful co-processorsfor public
`and secret key encryption supporting RSA, ECC, DES and AES,with the high security,
`ultra low power, performance optimized design conceptof Philips Semiconductors’
`handshaking technology. Forfurther details on general SmartMX platform features please
`refer to the “SmartMXplatform features” short form specification.
`
`1.2 Description P5CT072 device
`
`@ 72 Kbytes EEPROM
`
`@ 160 Kbytes User ROM
`
`@ 4608 bytes RAM
`
`@ Dual/Triple key DES-3 co-processor
`
`@ PKI (Public Key Infrastructure) co-processor (RSA, ECC)
`
`@ AES co-processor
`
`@ ISO/IEC 7816 contact interface
`
`@ ISO/IEC 14443A contactless interface
`
`@ USB 2.0 Low Speedcontact Interface
`
`@ EEPROM data retention time: 20 years minimum
`
`The P5CT072 is a Secure PKI Smart Card Controller of the SmartMX platform featuring
`160 Kbytes of ROM, 4608 bytes of RAM and 72 Kbytes of EEPROM, which can be used
`as data memoryand as program memory. Additionally a USB 2.0 (Low Speed) interface is
`available thus the device is called a “SecureTriple Interface Smart Card Controller’. The
`non-volatile memoryconsists of high reliability memorycells to guarantee dataintegrity,
`whichis especially important when the EEPROMis used as program memory.
`
`PHILIPS
`
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`

`
`
`Philips Semiconductors P5CT072
`SecureTriple Interface PKI Smart Card Controller
`
`Operatedboth in contact mode (ISO/IEC 7816) and in contactless mode (ISO/IEC 14443)
`the user defines the final function of the chip with his chip operating system (COS). This
`allows the samelevel of security, functionality and flexibility for the contact interface as
`well as for the contactless interface.
`
`Thefield proven RF interface technology (according ISO/IEC 14443-2) is well established
`in all products of the MIFARE®interface platform and providesreliable communication
`and secure processing, even in electro-magnetically harsh environmentslike in buses or
`train stations. Compatibility with existing MIFARE® readerinfrastructure and the optional
`free of charge emulation modes of MIFARE® 1K and MIFARE® 4K enablefast system
`integration and backward compatibility of standard MIFARE® and ProX family based
`cards.
`
`Bi-directional communication with the contact interface of the device can be performed
`through three serial |Os. These IOs are under full control of the application software in
`order to allow conditional controlled accessto the different internal memories.
`
`The On-chip hardwareis software controlled via Special Function Registers (SFRs). Their
`function and usage is described in the respective sections of this specification as the
`SFRsare correlated to the activities of the CPU, Interrupt, |O, EEPROM, Timers, etc.
`
`The P5CT072 provides two powersaving modes with reduced activity: the IDLE and the
`SLEEP or CLOCKSTOP Mode. These two modesare activated by software.
`
`The device operates either with a single 1.8V, 3 V or 5 V power supply at a maximum
`external clock frequency of 10 MHz supplied by the contact pads(internally up to 30 MHz)
`or with a power supply generated from the RF-field emitted by an RF-reader.
`
`1.2.1
`
`The Contact Interface
`
`Operating in accordance with ISO/IEC 7816, the SmartMX contact interface is supported
`by a built in UART, which enables data rates of up to 1Mbit/s allowing for the automatic
`generation ofall typical baud rates and supports transmission protocols T=0 and T=1.
`
`1.2.2
`
`The USB 2.0 (Low Speed)Interface
`
`SmartMxXis thefirst product platform ofits kind to provide a fully integrated USB interface
`based on the USB 2.0 (Low Speed) standardSmartMX making SmartMX basedIC cards
`“Plug and Play” compatible with the whole PC world without the use of complex reader
`devices or extra external components. The USBinterface uses the ISO contact module
`and worksvia a 4-wire connection to any PC supporting “hot Plug and Play”. The card
`automatically recognizes an ISO or USB environmentandis able to work with external
`frequencyof up to 6 MHZorinternal clock generation. The use of USB interfaces on smart
`cardsis currently in the process of becoming standardized within ISO/IEC 7816-12.
`
`9397 750 XXXXX
`
`Short Form Specification
`
`Rev. 1.3 — 4 October 2004
`
`2 of 12
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
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`
`
`Philips Semiconductors P5CT072
`SecureTriple Interface PKI Smart Card Controller
`
`1.2.3
`
`Different Configurations of the P5CT072
`
`Depending on the application requirements the PSCT072 can be configured according to
`options described in the data sheet chapter “ORDER ENTRY FORM”.
`
`There are three different configurations (A, B1 and B4) possible as shownin Table |]. The
`MIFARE®option configuration has impact on the access conditions for the EEPROM and
`influences the User OS development.
`
`Note that the contactless interface can be usedin anyofthe following configurations to
`communicate via any protocol (T=CL asspecified in ISO/IEC 14443-4 or a self defined
`protocol), also concurrently to the MIFARE® protocolavailable in configuration B1 and B4.
`
`1.2.3.1
`
`Configuration A
`
`1.2.3.2
`
`1.2.3.3
`
`In configuration A all memory resourcesare available and underfull control of the dual
`interface User OS. No MIFARE®functionality is available.
`
`Configuration B1
`In configuration B1 the contactless MIFARE® Classic OS provided by Philipsis
`implemented on the P5CT072. 1 Kbyte of the EEPROM canbe accessed by the MIFARE®
`Classic OSoffering the same command setand functionality as a MIFARE® 1K hardwired
`logic chip. The accessconditions for the user OS to the MIFARE® memory area can be
`configured via the so called ACM (Accesscondition matrix). The MIFARE® Classic OS
`offers a backward compatibility to support existing infrastructure based on the MIFARE®
`Classic functionality.
`
`Configuration B4
`In configuration B4 the MIFARE® Classic OS provided by Philips Semiconductors offers
`the samefunctionality and commandset as the MIFARE® 4K hardwired chip. This
`emulation offers the possibility to access 4 Kbytes of EEPROM memoryusing the
`MIFARE® commandset. Accessrights for the user OS and the MIFARE® 4K emulation on
`accessing the EEPROM memorycan be configured via the so called ACM (Access
`Condition Matrix).
`
`For secure separation of the user OS and the MIFARE® OSa dedicatedbuilt in hardware
`protection controls the access to the EEPROM, RAM and ROM.
`
`For detailed explanation of MIFARE® 1K and MIFARE®4Kfunctionality please refer also
`to the following documents:
`
`¢ MIFARE® MF CM500 Product Specification
`¢ MIFARE® Standard IC MF1 ICS50 Functional Specification
`¢ MIFARE® Standard 4 Kbytes Card IC MF1 ICS70
`
`9397 750 XXXXX
`
`Short Form Specification
`
`Rev. 1.3 — 4 October 2004
`
`3 of 12
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
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`

`P5CT072
`Philips Semiconductors
`
`SecureTriple Interface PKI Smart Card Controller
`a
`
`Table 1:
`
`Configurations of the P5CT072
`
`Configuration
`
`EEPROM
`
`A
`72 Kbytes for access with user OS
`
`B1
`71 Kbytes for access with user OS via EEPROM SFR
`
`1 Kbyte for access with MIFARE® Classic OS and user OS [1]
`
`B4
`68 Kbytes for access with user OS via EEPROM SFR
`4 Kbytes for access with MMIFARE® Classic OS and user OS !1]
`
`[1]
`
`In configuration B1 and B4 the MIFARE®OSallocates 128 bytes of the RAM.
`
`CONFIGURATION A
`
`CONFIGURATION B
`
`CONFIGURATION B4
`
`160 Kbytes Configurations of the P5CT072.
`
`RAM
`
`4608 bytes
`
`EEPROM
`72 Kbytes
`
`ROM
`
`160 Kbytes
`
`RAM
`
`4480 bytes
`
`RAM
`
`4480 bytes
`
`128 bytes MIFARE® OS
`
`128 bytes MIFARE® OS
`
`EEPROM
`
`71 Kbytes
`
`1 Kbytes
`MIFARE® OS
`
`ROM
`
`160 Kbytes
`
`EEPROM
`
`68 Kbytes
`
`4 Kbytes
`MIFARE® OS
`
`ROM
`
`9397 750 XXXXX
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
`Short Form Specification
`
`Rev. 1.3 — 4 October 2004
`
`4 of 12
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`

`
`
`Philips Semiconductors P5CT072
`SecureTriple Interface PKI Smart Card Controller
`
`2. Features
`
`2.1 Product Specific Features
`
`72 Kbytes EEPROM(including 192 bytes reserved manufacturer/security area)
`160 Kbytes User ROM
`4608 bytes RAM
`@ 256 bytes IRAM + 3 Kbytes CKRAM
`@ 1280 bytes FXRAM usable for FameXE
`Memory Managementand Protection Unit
`@ for more details see 2.2. Security Features
`USB 2.0 (Low Speed) contactinterface acc. ISO/IEC7816-12
`Contactless Interface Unit (CIU) fully compatible with ISO/IEC14443A
`@ fully supports the T=CLprotocol acc. ISO/IEC14443-4
`@ Data Transfer rates supported (106/212/424 kbit/s)
`MIFARE®RFcontactless interface acc. ISO/IEC14443-2
`
`@ 13.56 MHz operating frequency
`@ Reliable communication due to 100% ASK
`
`@ High speed (106/212/424 kbit/s, efficient frame support)
`@ True anticollision
`
`@ High speed CRC co-processor according to CCITT
`MIFARE® readerinfrastructure compatibility
`High speed DES-3 co-processor(64 bit parallel processing DES engine)
`High speed AES co-processor(128 bit parallel processing AES engine)
`PKI Co-processor FameXE
`@ The major Public Key Cryptosystems like RSA, El’Gamal, DSS, Diffie-Hellmann,
`Guillou-Quisquater, Fiat-Shamir and Elliptic Curve are supported
`@ 4096 bits maximum key length for RSA with randomly chosen modulus
`@ 32-bit interface
`
`@ Boolean operations for acceleration of standard, symmetric cipher algorithms
`@ Performance example:©RSA Modular Exponentation (Straight forward) < 35 ms
`(2048bit key length and 17 bit exponent)
`Optional free of charge MIFARE®1K and MIFARE® 4K functionality
`
`2 additional IO ports 102 and 103for full-duplex serial data communication
`
`9397 750 XXXXX
`
`Short Form Specification
`
`Rev. 1.3 — 4 October 2004
`
`5 of 12
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
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`

`
`
`Philips Semiconductors P5CT072
`SecureTriple Interface PKI Smart Card Controller
`
`2.2 Security Features
`
`Enhanced Security Sensors
`@ Low / high clock frequency sensor
`@ Low / high temperature sensor
`@ Single Fault Injection (SFI) attack detection
`@ Light sensors
`Electronic fuses for safeguarded modecontrol
`UniqueID for each die
`Clock InputFilter for protection against spikes
`Power-up / Power-downreset
`Optional programmable “Card Disable” feature
`Memory Security (encryption and physical measures) for RAM, EEPROM and ROM
`Memory Managementand Protection Unit (MMU)
`@ Secure multi application operating systemsvia two different operation modes
`- System Mode and Application Mode
`@ OS controlled accessrestriction mechanism to pheripherals in Application Mode
`@ Memory mapping up to 8 Mbytes Code memory
`@ Memory mapping up to 8 Mbytes (-64K) Data memory
`Optional disabling of ROM read instructions by code executed in EEPROM
`Optional disabling of any code execution out of RAM
`EEPROM programming:
`@ No external clock
`
`@ Hardware sequencercontrolled
`@ On-chip high voltage generation
`@ Enhanced error correction mechanism
`
`64 or 128 EEPROM bytesfor customer-defined Security FabKey. Featuring batch-,
`wafer- or die-individual security data, incl. encrypted diversification features on request
`14 bytes User Write Protected Security area in EEPROM(byte access, inhibit
`functionality per byte)
`32 bytes Write Once Security area in EEPROM (bit access)
`32 bytes User Read Only area in EEPROM (byte access)
`Customerspecific EEPROMinitialization optional
`
`9397 750 XXXXX
`
`Short Form Specification
`
`Rev. 1.3 — 4 October 2004
`
`6 of 12
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
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`

`
`
`Philips Semiconductors P5CT072
`SecureTriple Interface PKI Smart Card Controller
`
`2.3 Family Standard Features
`
`Dedicated Secure_MX51 Smart Card CPU (Memory eXtended / enhanced 80C51)
`@ 0.18 np 5 metal layer CMOS technology
`@ operating in contact and contactless mode (dependent on family type option)
`@ featuring a 24 bit universal memory space, 24 bit program counter
`@ combined universal program/data linear address range up to 16 Mbyte
`@ additional instructions to improve
`- pointer operations
`- performance
`- code density of both C and Java source code
`Low power / low voltage design using Philips handshaking technology
`Developmentand portation support of existing P8WE / P8RF family masks
`Multiple source vectorized interrupt system with four priority levels
`Watch exception provides for software debugging facility
`Multiple source RESET system
`Two 16-bit timers
`
`High reliable EEPROM for both data storage and program execution
`@ Bytewise EEPROM programming and read access
`@ EEPROM endurance: up to 500 k programming cycles per byte
`@ EEPROMdata retention time: 20 years minimum
`Versatile EEPROM programming of 1 to 64 byte at a time
`Typical EEPROM pageerasing time: 2.5 ms
`Typical EEPROM page programming time: 1.5 ms
`Power-saving IDLE Mode
`@ Wake-up from IDLE Mode by RESETorany activated interrupt
`Power-saving SLEEP (power down) Mode or CLOCKSTOP Mode
`@ Wake-up from SLEEP or CLOCKSTOP Mode by RESETor External Interrupt
`Contact configuration and serial interface according to ISO/IEC 7816: GND, VCC,
`CLK, RST, 101
`ISO/IEC 7816 UART supporting standard protocols T=0 and T=1 as well as high
`speed personalization at 1Mbit/s
`Externalor internally generated configurable CPU clock
`1 MHz to 10 MHz operating external clock frequency range
`Internal CPU clock up to 30 MHz with synchronous operation
`@ Internal clocking independent of externally applied frequency
`High speed Triple-DES co-processor(twoor three keys loadable)
`DES3 performance < 50 us
`High speed 16 bit CRC Engine according to CCITT polynom definition
`Low power Random NumberGenerator (RNG) in hardware, FIPS140-2 compliant
`1.62V to 5.5V extended operating voltage range for class C, B andA
`-25 to +85°C operating ambient temperature range
`
`9397 750 XXXXX
`
`Short Form Specification
`
`Rev. 1.3 — 4 October 2004
`
`7 of 12
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
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`

`Philips Semiconductors
`a
`
`P5CT072
`SecureTriple Interface PKI Smart Card Controller
`
`2.4 Design-in Support
`
`@ Approved Development Tool Chain
`@ Keil PK51 developmenttool packageincl. Vision2/dScopeC51 simulator, additional
`specific hardwaredriversincl. simulation of contactless interface and ISO/IEC 7816
`card interface board. A “SmartMX DBox’ allows software debugging and
`integration tests. (www.keil.com)
`@ Ashling Ultra-Emulator platform, stand alone ROM prototyping boards and
`ISO/IEC 7816 and ISO/IEC14443 card interface board. Code coverage and
`performance measurementsoftwaretools for real time software testing.
`(www.ashling.com)
`@ Dual Interface dummy modules OM6711 (PDM 1.1 - SOT658) with special antenna
`bonding on C4 and Cé8fortesting the implanting process and antenna connection.
`@ Software Libraries
`
`@ Libraries supporting contactless communication according to ISO/IEC 14443, Part
`3 and 4
`
`@ USB 2.0 (Low Speed) Basic Library Support
`@ EEPROM Read/ Write routines
`
`3. Ordering information
`
`Table 2:
`
`Ordering information
`
`Type number
`
`Package
`
`Name
`| Description
`|Version
`P5CT072EW1/Tvsrrffo FFC
`sawnwafer 150 u onfilm frame carrier
`-
`
`P5CT072EVO/Tvsrrffo Module
`Dual Interface Modules on super 35 mm format (8-contact)
`SOT658 BA3
`
`P5CT072EV1/Tvsrrffo Module
`Dual Interface Modules on super 35 mm format(8-contact) with
`SOT658 BA3
`Antenna connected to C4/C8
`
`P5CT072EV3/Tvsrrffo Module
`pure contactless module MOB2 on super 35 mm format
`SOT500 AA3
`
`9397 750 XXXXX
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
`Short Form Specification
`
`Rev. 1.3 — 4 October 2004
`
`8 of 12
`
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`

`

`P5CT072
`Philips Semiconductors
`SecureTriple Interface PKI Smart Card Controller
`
`4. Block diagram
`
`
`
`
`
`
`
`72 Kbytes
`RF
`Clu
`INTERFACE k= ISO 14443
`160 Kbytes
`OMe
`4608bytes
`
`LB L}4
`Tava
`PROGRAM
`MEMORY ‘
`.
`FameXE
`MEMORY
`
`enhanced PUBLIC.
`KEY CO-
`
`PROCESSORe.g.
`RSA EOC 9g
`:
`
`1o1 [4
`
`O20}
`103 C4
`
`UART
`PROGRAMM-
`ABLE
`o453 KY Iso 7e16
`™_
`
`DPC}
`
`DML}
`
`USBD+, D-
`
`‘
`
`s
`
`USB2.0
`(Low Speed)
`
`CLKEI-]
`
`CLOCK
`ruter
`
`CLOCK
`FGENERATION
`
`Memory ManagementUnit (MMU)
`
`SECURE_MX51 CPU
`
` Fig 2. Block diagram P5CT072.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`vss
`
` ISO 7816
`
`
`
`
`AES
`TRIPLE-DES
`
`
`
`TIMERS|_|CO-PROCESSORCO-PROCESSOR
`
`
`
`
`SECURTIY SENSORS
`RESET GENERATION
`
`RST TI
`
`VOLTAGE REGULATOR
`
`u
`VDD
`
`4
`
`
`P5CT072
`
`
`
`(“Standard”)
`
`
`Description
`CONTACTS
`
`
`
`C1
`VDD
`Powersupply voltage input
`C2
`RST
`Resetinput, active LOW
`C3
`CLK
`Clock input
`C4
`N.C.
`not connected
`
`vcc
`RST
`CLK
`-
`
`
`
`* Antenna contacts are placed on module backside
`
`C5
`C6
`
`GND
`VPP
`
`VSS
`N.C.
`
`Ground(reference voltage) input
`not connected
`
`Input/Output #1 for serial data
`101
`lo
`C7
`c8
`-
`N.C.
`not connected
`
`-
`-
`LA
`antennacoil connection
`-
`-
`LB
`antennacoil connection
`
`Note: 102, 103 and assignments on request.
`
`
`
`9397 750 XXXXX
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
`Short Form Specification
`
`Rev. 1.3 — 4 October 2004
`
`9 of 12
`
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`

`Philips Semiconductors
`P5CT072
`
`a
`SecureTriple Interface PKI Smart Card Controller
`
`5. Limiting values
`
`Absolute maximum ratings ‘1
`Table 3:
`In accordance with the Absolute Maximum Rating System (IEC 60134).
`Symbol
`Parameter
`Conditions
`Min
`Max
`Unit
`
`Vpp
`Supply voltage
`-0.5
`+6.0
`V
`
`Vi
`Input voltage on anysignal pad
`-0.5
`Vpp +0.5
`V
`
`li lo
`DC input or output current on 101, 102 or 103
`-
`+ 15.0
`mA
`
`pad
`
`llatchup
`Latch up current
`Vi <OorV) > Vpp
`-
`100
`mA
`
`Vesp
`Electrostatic discharge voltage /2!
`
`on pads VDD,VSS, CLK, RST, 101, 102, 103,
`DP, DM
`
`on all other pads
`-
`+2.0
`kV
`
`Prot
`Total powerdissipation per package |]
`-
`1
`Ww
`Tstg
`Storage temperature range
`Table note [4] Table note [4
`
`-
`+4.0
`kV
`
`
`[1] Stresses beyond those listed may cause permanent damageto the device. These are stress ratings only and functional operation of the
`device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
`absolute-maximum-rated conditions for extended periods may affect device reliability.
`
`[2] MIL Standard 883-D method 3015; Human body model; C = 100 pF, R = 1.5 kQ; Tamb = -25 to +85 °C.
`
`[3] Depending on appropriate thermal resistance of the package.
`
`[4] Depending on delivery type, refer to “Philips General Specification for 8” Wafers” and to “Philips Contact & Dual Interface Chip Card
`Module Specification”.
`
`Table 4:|Recommendedoperating conditions
`Symbol
`Parameter
`Conditions
`Min
`Typ.
`Max
`Unit
`
`5 V operation
`4.5
`5.0
`5.5
`V
`
`Vpp(3.0)
`3 V operation
`2.7
`3.0
`3.3
`V
`
`Vpp (1.8)
`1.8 V operation
`1.62
`1.8
`1.98
`Vv
`
`Supply voltage
`
`Vpp (5.0)
`
`Vi
`DC input voltage on digital inputs and
`0
`Vpp
`V
`
`digital |O pads
`Viailo)
`DC input voltage on analog USB IO pads
`0
`3.6
`V
`
`(DP/DM)
`Tamb °c Operating ambient temperature [“] -25 +85
`
`
`
`
`
`
`
`
`[1] Operation ambient temperature whenusing the Universal Serial Bus interface with internally generated USB clock: Tamp = 0 to +50 °C.
`
`9397 750 XXXXX
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
`Short Form Specification
`
`Rev. 1.2 — 4 October 2004
`
`10 of 12
`
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`

`

`P5CT072
`Philips Semiconductors
`
`SecureTriple Interface PKI Smart Card Controller
`
`6. Data sheet status
`
`
`
`Level Data sheet status!'] Product status!2I!5]_Definition
`
`|
`Objective data
`Development
`This data sheet contains data from the objective specification for product development. Philips
`
`Semiconductors reserves the right to change the specification in any mannerwithout notice.
`This data sheet contains data from the preliminary specification. Supplementary data will be published
`at a later date. Philips Semiconductors reserves the right to change the specification without notice,in
`
`order to improve the design and supply the best possible product.
`
`Qualification
`
`Il
`
`Preliminary data
`
`Ill
`
`Product data
`
`Production
`
`This data sheet contains data from the product specification. Philips Semiconductors reserves the
`right to make changesat anytime in order to improve the design, manufacturing and supply. Relevant
`changeswill be communicated via a Customer Product/Process Change Notification (CPCN).
`
`Please consult the most recently issued data sheetbeforeinitiating or completing a design.
`[1]
`[2]|The product status of the device(s) describedin this data sheet may have changedsincethis data sheet was published. The latest information is available on the Internet at
`URLhttp://www.semiconductors.philips.com.
`For data sheets describing multiple type numbers, the highest-level product status determines the data sheetstatus.
`
`[3]
`
`
`
`7. Definitions 8. Disclaimers
`
`Short-form specification — The data in a short-form specificationis
`extracted from a full data sheet with the same type numberandtitle. For
`detailed information see the relevant data sheet or data handbook.
`
`Limiting values definition — Limiting values given are in accordance with
`the Absolute Maximum Rating System (IEC 60134). Stress above one or
`moreofthe limiting values may cause permanent damageto the device.
`Theseare stress ratings only and operation of the device at these or at any
`other conditions above those given in the Characteristics sections of the
`specification is not implied. Exposure tolimiting values for extended periods
`mayaffect devicereliability.
`Application information — Applications that are described herein for any
`of these productsareforillustrative purposes only. Philips Semiconductors
`make no representation or warranty that such applications will be suitable for
`the specified use without further testing or modification.
`
`Life support — These products are not designedfor usein life support
`appliances, devices, or systems where malfunction of these products can
`reasonably be expectedto result in personal injury. Philips Semiconductors
`customersusing orselling these products for use in such applications do so
`at their own risk and agreeto fully indemnify Philips Semiconductors for any
`damagesresulting from such application.
`Right to make changes — Philips Semiconductors reservestheright to
`make changesin the products - including circuits, standard cells, and/or
`software - described or contained herein in order to improve design and/or
`performance. Whenthe productis in full production (status ‘Production’),
`relevant changeswill be communicated via a Customer Product/Process
`ChangeNotification (CPCN). Philips Semiconductors assumes no
`responsibility orliability for the use of any of these products, conveys no
`licenceortitle under any patent, copyright, or mask work right to these
`products, and makesnorepresentations or warranties that these products are
`free from patent, copyright, or mask workright infringement, unless otherwise
`specified.
`
`9. Contact information
`
`For additional information, please visit http://www.semiconductors.philips.com
`For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
`
`9397 750 XXXXX
`
`Short Form Specification
`
`Rev. 1.2 — 4 October 2004
`
`11 of 12
`
`© Koninklijke Philips Electronics N.V. 2003.All rights reserved.
`
`IPR2022-00413
`Apple EX1012 Page 11
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`IPR2022-00413
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`

`

`Philips Semiconductors P5CT072
`
`a
`SecureTriple Interface PKI Smart Card Controller
`
`10. Tables
`
`Table 1: Configurations of the PSCT072 .............4
`Table 2: Ordering information...................04. 8
`
`Table 3: Absolute maximum ratings 1] ............. 10
`Table 4: Recommendedoperating conditions ........ 10
`
`11. Figures
`
`Fig 1. Configurations of the P5CT072................ 4
`
`Fig2.
`
`Block diagram P5CT072................2.00- 9
`
`12. Contents
`
`General description...............0.0000+ 1
`1
`Family description...................0000- 1
`1.1
`Description PSCT072 device .............. 1
`1.2
`The Contact Interface ...............-... 2
`1.2.1
`The USB 2.0 (Low Speed) Interface......... 2
`1.2.2
`Different Configurations of the PSCT072 ..... 3
`1.2.3
`1.2.3.1 ConfigurationA................2.0000 eee 3
`1.2.3.2
`Configuration B1....................000. 3
`1.2.3.3
`Configuration B4....................000. 3
`2
`Features .... 0.0.00. cece eee eee eee 5
`
`2.1
`2.2
`2.3
`2.4
`3
`4
`5
`6
`7
`8
`
`9
`
`Product Specific Features................. 5
`Security Features .............0.0.000000. 6
`Family Standard Features................. 7
`Design-in Support...............-00.000- 8
`Ordering information..............0.0006: 8
`Block diagram .........-...0002e eee eens 9
`Limiting values. .......... 0.0.0 cee eee 10
`Data sheet status...............2 eee eee 11
`Definitions ......... 00... cee eee eee 11
`Disclaimers. .........0 0c eee eee eee 11
`
`Contact information ..............0.000s 11
`
`PHILIPS
`
`© Koninklijke Philips Electronics N.V. 2003
`All rights are reserved. Reproduction in whole or in part is prohibited without the prior
`written consent of the copyright owner. The information presented in this document does
`not form part of any quotation or contract, is believed to be accurate andreliable and may
`be changed without notice. No liability will be accepted by the publisher for any
`consequenceofits use. Publication thereof does not convey nor imply any license under
`patent- or other industrial or intellectual property rights.
`
`Date of release: 4 October 2004
`Document order number: 9397 750 XXXXX
`
`Published in The Netherlands
`
`IPR2022-00413
`Apple EX1012 Page 12
`
`IPR2022-00413
`Apple EX1012 Page 12
`
`