`Unified Patents, LLC
`v.
`Arigna Tech. Ltd.
`U.S. Patent 7,049,850
`
`Petitioner’s Demonstratives
`March 24, 2023
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Petitioner, Slide 1
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`
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Petitioner, Slide 2
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`
`
`Agenda
`
`• Introduction & Claim Overview
`• Disputed Limitations
`1.
`Limitation 7.2 – Majumdar Teaches a Reverse Level Shift Part Under Any
`Reasonable Construction
`
`2.
`
`Limitation 7.3.1 – Majumdar’s Voltage Detecting Device Is in the High
`Potential Part
`
`3.
`
`Limitation 7.3.1 – Majumdar’s Voltage Detecting Device Detects a Potential at
`an Output Line of Said Reverse Level Shift Part
`• Motivation to Combine
`4. A POSITA Would Have Combined the Teachings of Majumdar and Cowles
`
`5. Cowles is Analogous to the ‘850 Patent
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Petitioner, Slide 3
`
`
`
`Claim 7
`
`(7.2)
`
`(7.3.1)
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Petitioner, Slide 4
`
`
`
`Claim 7
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Pet., 8
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`Petitioner, Slide 5
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`
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Petitioner, Slide 6
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`
`
`Reverse Level Shift Part
`
`Majumdar is Explicit
`
`Majumdar, 11:3-15
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Pet., 30-31, 33-34, 36, 41; Reply, 2-6
`
`Pet., 29
`Petitioner, Slide 7
`
`
`
`Reverse Level Shift Part
`
`• Majumdar’s Teaching is Consistent with All Proffered Constructions
`
`Petition
`Plain and ordinary meaning
`(including a circuit, i.e., part
`of the device, that carries
`out a level shift in a reverse
`direction)
`
`District Court
`“a section of the
`semiconductor device
`comprising one or more
`components for reverse level
`shifting.”
`
`Patent Owner
`No construction
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Pet., 28-31; Reply 2-6; EX1003, ¶¶ 126-128
`
`Petitioner, Slide 8
`
`
`
`Reverse Level Shift Part
`
`• Patent Owner argues:
`o Reverse level shift part limited only to transistors (within circuit I1)
`responsible for reverse level shifting
`o Circuit I1 must be broken apart and only components not involved in the
`forward level shifting can be considered as the reverse level shift part.
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`POR, 45; Reply, 4-8, 11; Sur-Reply, 4.
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`Petitioner, Slide 9
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`
`
`Reverse Level Shift Part
`
`According to the Intrinsic Record:
`Part ≠ Transistor
`Language used by patentee was intentional
`Chosen Claim Language
`
`Specification Language
`
`’850 patent, 8:49-57
`
`’850 patent, claim 7
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Reply, 6-8
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`’850 patent, 3:52-62
`
`Petitioner, Slide 10
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`
`
`Reverse Level Shift Part
`
`Majumdar teaches different embodiments
`
`…
`
`…
`
`Majumdar, 9:30-35
`
`Majumdar, 11:4-15
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Reply, 6-8
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`Petitioner, Slide 11
`
`
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`Reverse Level Shift Part
`
`• The teaching of the reference is controlling
`o Majumdar teaches a circuit that meets limitation 7.2
`o Patent Owner wishes to re-design Majumdar
`
`Majumdar, 11:3-15
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Pet., 30-31, 33-34, 36, 41; Reply, 2-6
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`Petitioner, Slide 12
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`
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Petitioner, Slide 13
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`
`
`Limitation 7.3.1 - Voltage Detecting Device
`
`‘850 Patent, claim 7
`
`Limitation 7.3.1 recites a voltage detecting device:
`a) provided in said high potential part and
`b) Configured to detect a potential at an output line of said reverse level
`shift part
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Petitioner, Slide 14
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`
`
`Voltage Detecting Device Provided in Said High Potential Part
`
`High Potential Part = Variable Reference (bn
`0 and EE+PP)
`
`EE power
`(e.g., 15V)
`
`Low Potential Part = Fixed Reference (EE or NN)
`
`HV Power
`Supply
`(e.g., 600V)
`
`High Potential Power
`Line (PP)
`
`Inductive Load (Motor)
`
`Low Potential Power
`Line/GND (NN)
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Pet., 39-43; Reply, 13-15; EX1003, ¶¶ 90, 133-34
`
`Petitioner, Slide 15
`
`
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`Voltage Detecting Device Provided in Said High Potential Part
`
`• Patent Owner’s Manufactured Diagram is Incorrect and unsupported
`
`• Only Two Sections Exist:
`1. One section of the circuit always referenced to ground (NN) or EE
`POR, 60-61
`2.
`The other section is not fixed and can be referenced to a higher potential
`(PP + NN/EE)
`• Both Patent Owner’s “MID_P” and “HI_P” will reach the same high
`voltage
`• Majumdar only discloses two power supplies (EE and PP)
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Pet., 39-43; Reply, 13-15; EX1003, ¶¶ 90, 133-34
`
`Petitioner, Slide 16
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`
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`Voltage Detecting Device Provided in Said High Potential Part
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Pet., 39-43; Reply, 13-15; EX1003, ¶¶ 90, 133-34
`
`Majumdar, Fig. 1
`Petitioner, Slide 17
`
`
`
`Configured to Detect at an Output Line of Said Reverse Level
`Shift Part
`
`‘850 Patent, Claim 7
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Pet., 40-43
`
`Petitioner, Slide 18
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`
`
`POSITA Would Have Been Motivated to
`Use Majumdar’s Buffer as a Voltage
`Detecting Device
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Petitioner, Slide 19
`
`
`
`A POSITA Would Have Used Majumdar’s Buffer as a Voltage
`Detecting Device
`
`• Cowles explicitly teaches it was well-known to configure a buffer to
`detect a voltage and supply a corresponding logic value
`
`Cowles, 1:18-20
`
`• Several supported motivations to combine:
`1.
`Explicit teaching, suggestion, motivation
`2.
`To provide implementation details of a long-used function
`3. Combination of prior art elements according to known methods to yield
`predictable results
`4. Use of a known technique to improve similar device in the same way
`5.
`Reasonable expectation of success
`6.
`To ensure proper operation, as stated in Orita
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Pet., 50-56; Reply 16-22; EX1003, ¶¶ 106, 136-52.
`
`Petitioner, Slide 20
`
`
`
`A POSITA Would Have Used Majumdar’s Buffer as a Voltage
`Detecting Device
`
`• Cowles explicitly teaches it was well-known to configure a buffer to
`detect a voltage and supply a corresponding logic value
`
`Cowles, 1:18-20
`
`Cowles, 1:61-67
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Pet., 50-56; Reply 16-22; EX1003, ¶¶ 106, 136-52
`
`Petitioner, Slide 21
`
`
`
`A POSITA Would Have Used Majumdar’s Buffer as a Voltage
`Detecting Device
`
`Examples of motivations and advantages to the Majumdar-Cowles
`combination:
`1. Driving other circuit components (ceasing/initiating system function)
`2. Optimizing voltage detection
`3. Determining whether a threshold has been reached
`4. Prohibiting operation if outside a specified voltage range
`5. Ensuring proper operation
`6. Promoting accuracy in turning on the high-side switching element
`7. Detecting an abnormal condition
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Pet., 50-56; Reply 16-22; EX1003, ¶¶ 106, 136-52
`
`Petitioner, Slide 22
`
`
`
`A POSITA Would Have Used Majumdar’s Buffer as a Voltage
`Detecting Device
`
`• Patent Owner attacks the references individually and ignores the
`combined teachings
`o The Majumdar-Cowles combination explicitly teaches the claimed voltage
`detecting device
`o Patent Owner ignores the numerous motivations and express reasons
`provided to use Majumdar’s buffer as a voltage detecting device
`o Patent Owner ignores 18+ pages of expert testimony and documentary
`evidence
`
`• Patent Owner’s purported design differences, even if accurate, are
`irrelevant to the present inquiry
`o See In re Fulton, 391 F.3d 1195, 1201 (Fed. Cir. 2004) (a reference does
`not teach away if it merely expresses a general preference for an
`alternative invention but does not “criticize, discredit, or otherwise
`discourage” the invention claimed)
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Pet., 44-58; Reply, 16-23
`
`Petitioner, Slide 23
`
`
`
`Cowles is Analogous Art
`
`• Field of Endeavor = Semiconductor Devices (performing drive control)
`
`‘850 Patent, 1:55-67
`
`‘850 Patent, claim 7
`
`Cowles, 1:12-28
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Pet., 19; Reply, 23-25
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`Petitioner, Slide 24
`
`
`
`Cowles is Analogous Art
`
`• Problem to be Solved = Detecting and optimizing voltages in
`semiconductor devices to prevent damage
`
`‘850 Patent, 1:1-16
`
`‘850 Patent, 1:55-60
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Pet., 19, 44-46; Reply, 23-25
`
`Cowles, 1:1-28
`
`Petitioner, Slide 25
`
`
`
`IPR2022-00285
`Unified Patents, LLC
`v.
`Arigna Tech. Ltd.
`U.S. Patent 7,049,850
`
`Petitioner’s Demonstratives
`March 24, 2023
`
`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`Petitioner, Slide 26
`
`
`
`IPR2022-00285
`U.S. PATENT 7,049,850
`CERTIFICATE OF SERVICE
`Pursuant to 37 C.F.R. §§ 42.6(e) and 42.105, the undersigned certifies that on
`this PETITIONER’S
`March 17, 2023, a complete and entire copy of
`DEMONSTRATIVE’S, was filed on P-TACTS and provided to the following
`counsel of record for Patent Owner:
`Michael F. Heim
`mheim@hpcllp.com
`Christopher L. Limbacher
`climbacher@hpcllp.com
`Heim, Payne & Chorush, LLP
`1111 Bagby Street, Suite 2100
`Houston, TX 77002
`
`By: /Ashraf A. Fawzy/
`
`Ashraf A. Fawzy
`
`
`Counsel for Petitioner
`
`
`
`Dated: March 17, 2023
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