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`as) United States
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`a2) Patent Application Publication 0) Pub. No.: US 2003/0012040 Al
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`(43) Pub. Date: Jan. 16, 2003
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`Orita et al.
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`US 20030012040A1
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`(54) REVERSE LEVEL SHIFT CIRCUIT AND
`POWER SEMICONDUCTORDEVICE
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`(75)
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`Inventors: Shoichi Orita, Tokyo (JP); Yoshikazu
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`Tanaka, Fukuoka (JP)
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`Correspondence Address:
`OBLON SPIVAK MCCLELLAND MAIER &
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`NEUSTADT PC
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`FOURTH FLOOR
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`1755 JEFFERSON DAVIS HIGHWAY
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`ARLINGTON, VA 22202 (US)
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`(73) Assignee: MITSUBISHI DENKI KABUSHIKI
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`KAISHA,Tokyo (JP)
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`10/118,252
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`(22)
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`Filed:
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`(30)
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`Apr. 9, 2002
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`Foreign Application Priority Data
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`(21) Appl. No.:
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`Jul. 12, 2001
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`(SP) eeeeeseseseseecseeneeneees 2001-212022
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`Publication Classification
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`(ST)
`Ente C07 cacecccsscssssssssnsssssetistnntsnssstve H02M 7/00
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`(52) US. Ch.
`cecesessssssssnsssesnssnstnassesnesnntnesvesnee 363/73
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`(57)
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`ABSTRACT
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`A reverse level shift circuit that is low in cost and excellent
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`in reliability is provided by employing no Pch-DMOS
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`transistor and formingit together with a level shift circuit on
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`one semiconductor substrate. An input voltage signal (VIN)
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`on high side is converted to a current signal by a voltage-
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`current conversion circuit (CV1) and a current source (CS1).
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`Using a Nch-DMOStransistor (ND1) of common gate
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`construction as a high breakdown voltage resistance, the
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`current signal is then transferred to low side, on which the
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`current signal is converted to a voltage signal by a current
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`source (CS2) and a current-voltage conversion circuit
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`(CV2). Thereby, the signal change of the signal (VIN) using
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`potential (HGND)as a reference potential can be outputted
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`as a signal change of signal (VOUT) that uses potential
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`(GND)as a reference potential.
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`CURRENT
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`CONVERSION
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`SOURCE
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`CIRCUIT
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`HGND »
`pote HIGH SIDE---~--~ ~"
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`DC
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`CURRENT
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`VOLTAGE
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`SOURCE
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`BIAS MEANS
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`Page 1 of 17
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`Volkswagen Exhibit 1006
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`Patent Application Publication
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`Jan. 16, 2003 Sheet 1 of 7
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`US 2003/0012040 Al
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`oN
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`LNOA
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`{N3YYNO
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`JOUNOS
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`Jan. 16, 2003 Sheet 2 of 7
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`US 2003/0012040 Al
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`Patent Application Publication
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`CcD/A
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`US 2003/0012040 Al
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`cA
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`Patent Application Publication
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`E&D/A
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`Patent Application Publication
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`Jan. 16, 2003 Sheet 4 of 7
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`US 2003/0012040 Al
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`oN
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`LAOA
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`anneeeISHOIH--------.30'SHOIONO©)
`JOUNOSaNOISHSANODKO)
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`INSYYNO
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`PO/A
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`us
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`N3
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`IV4 IVS
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`Patent Application Publication
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`Jan. 16, 2003 Sheet 5 of 7
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`US 2003/0012040 Al
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`FG, S
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`Patent Application Publication
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`Jan. 16,2003 Sheet 6 of 7
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`US 2003/0012040 Al
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`FIG. 6
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`Ou
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`OUTPUT
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`SW
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`Di-Z
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`V1y
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`LEVEL SHIFT
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`LS
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`ery CIRCUIT
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`HGNO!—ciRCUIT
`ne
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`D2 >bo
`GND
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`AD
`VIN
`REVERSE
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`| CONVERSION
`LEVEL SHIFT
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`HEND||S24} CIRCUIT
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`MP
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`vec
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`V2
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`ABNORMALITY
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`DETECTION/STOP
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`SIGNAL OUTPUT
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`CIRCUIT
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`Patent Application Publication
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`Jan. 16,2003 Sheet 7 of 7
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`US 2003/0012040 Al
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`FIG. 7
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` HIGH-SIDE
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`SIGNAL
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`DETECTION
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`CIRCUIT
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`VOUT
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`US 2003/0012040 Al
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`Jan. 16, 2003
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`REVERSE LEVEL SHIFT CIRCUIT AND POWER
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`SEMICONDUCTOR DEVICE
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`BACKGROUND OF THE INVENTION
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`[0001]
`1. Field of the Invention
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`[0002] The present invention relates to a reverse level shift
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`circuit for converting a voltage signal on high-voltage side
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`to a voltage signal on low-voltage side, which is used in a
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`power semiconductor device.
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`[0003]
`2. Description of the Background Art
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`[0004]
`In a HVIC (high voltage integrated circuit) on
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`which, for example, an inverter, its driving circuit and its
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`protection circuit are contained in a single chip, there is
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`generally a detector for detecting voltage signals. This
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`detector detects whether an abnormal voltage upsurge
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`occurs in the respective switching elements on high-voltage
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`side and low-voltage side of the half bridge of each phase.
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`[0005] FIG. 6 is a diagram illustrating an exemplary
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`configuration of a power semiconductor device containing a
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`circuit to detect whether an abnormalvoltage upsurge occurs
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`in a switching element on high-voltage side of a single-
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`phase half bridge. On this circuit, for example, switching
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`elements SW1 and SW2 such as IGBT (insulated gate
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`bipolar transistor) are connected in series, and free wheel
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`diodes D1 and D2 are subjected to inverse-parallel connec-
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`tion with the switching elements SW1 and SW2, respec-
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`tively. These parts form a half bridge for one phase. The
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`switching element SW1 on high-voltage side serves as a
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`multi-emitter, to one output terminal of which one terminal
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`of a shunt resistance SH is connected. By monitoring the
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`value of voltage drop in the shunt resistance SH,
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`is
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`detectable whether an abnormal voltage upsurge occurs in
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`the switching element SW1. The other terminal of the shunt
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`resistance SH is connected to a connection point MPof the
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`switching elements SW1 and SW2.
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`[0006] An output signal of voltage drop in the shunt
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`resistance SH is, for example, converted to a digital signal
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`through an AD (from analog to digital) conversion circuit
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`AD, and then inputted to a reverse level shift circuit IS.
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`Hereat, the reverse level shift circuit IS functions to transfer
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`a signal change of voltage drop (i.e., VIN-HGND)in the
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`shunt resistance SH, while lowering its reference potential
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`from potential HGND in the connection point MP to
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`groundedpotential GNDthat is a reference potential of other
`circuit.
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`[0007] The potential HGNDat the connection point MPis
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`high and in a float condition. For detecting output signals,it
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`is therefore desirable that the reference potential is lowered
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`to the grounded potential GND. Especially in the case of
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`polyphase circuits such as three-phase circuit, one micro-
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`processor in a HVIC detects an output signal of each phase
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`and judges whetherit is abnormalornot (e.g., it is judged
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`abnormal when voltage upsurges in the shunt resistance
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`exist in two phases). Hence, all the reference potentials of
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`output signals should be lowered to the grounded potential
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`GND, and it is for this reason that the reverse level shift
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`circuit IS is present.
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`[0008] An output signalof the reverse level shift circuit IS
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`(VOUT-GND)is inputted to an abnormality detection/stop
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`signal output circuit DT equivalent to the above-mentioned
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`microprocessor. On this circuit DT, it is detected whether
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`there is an abnormalvoltage drop at the shunt resistance SH
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`in each phase,and if an abnormality is detected, a stop signal
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`Sc for stopping the operation of the switching element SW1
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`[0009] The stop signal Sc is applied to a control electrode
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`of the switching element SW1via a level shift circuit LS and
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`an output circuit OU. The level shift circuit LS functions to
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`transfer the stop signal Sc while increasing its reference
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`potential from the grounded potential GND to the potential
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`HGNDof the connection point MP. The output circuit OU
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`functions to amplify the output of the level shift circuit LS.
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`[0010]
`In the forgoing description, it is not essential that
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`an output signal of voltage drop at the shunt resistance SH
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`be converted to a digital signal by the AD conversion circuit
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`AD. For instance, if the reverse level shift circuit IS or
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`abnormality detection/stop signal output circuit DT can
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`process signals of analog input, the AD conversion circuit
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`AD may be omitted so as to directly input a signal change
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`of voltage drop to the reverse level shift circuit IS.
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`{0011] FIG. 7 is a diagram illustrating a conventional
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`configuration of a reverse level shift circuit IS. On a reverse
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`level shift circuit IS4, a high-side signal detecting circuit HD
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`comprising a comparator etc. receives an input signal VIN
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`and judges whether the value of voltage drop at a shunt
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`resistance SH is greater than a predetermined value. When
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`the former is larger than the latter,
`the high-side signal
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`detecting circuit HD activates output.
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`[0012] The output of the high-side signal detecting circuit
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`HDis applied via an inverter IV6 to the gate electrode of a
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`Pch-DMOS(P-channel double diffusion metal oxide semi-
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`conductor) transistor PD1. Whenthe outputof the high-side
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`signal detecting circuit HD is activated,
`the Pch-DMOS
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`transistor PD1 enters operating state to flow current between
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`its source and drain. Each circuit on the high-side is driven
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`by a higher potential HVCC that a power source V1 gen-
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`erates from the potential HGND.
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`[0013] Since the Pch-DMOStransistor PD1 has high
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`breakdownvoltage and breakdownvoltage characteristic of
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`several hundredsvolt level, it functions as a high-breakdown
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`voltage resistance to perform reverse level shift of signals
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`between the potential HVCCthat is high and the grounded
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`potential GND that
`is low. Current passing through the
`Pch-DMOStransistor PD1 flows to a resistance R5 on the
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`low side, at which the current is converted to a voltage
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`signal. A voltage drop at the resistance R5 is transferred to
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`an inverter IV7 and an output circuit OT comprising an
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`amplifier etc., and then outputted as an output signal VOUT.
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`Each circuit on the low side is driven by a higher potential
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`VCCthat a power source V2 generates from the grounded
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`potential GND.
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`[0014] Thus, the Pch-DMOStransistor PD1 is employed
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`on the reverse level shift circuit IS4. From the viewpoint of
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`voltage control between source and gate,
`in general, a
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`Pch-transistor is employed on a reverse level shift circuit
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`and a Nch-transistor is employed on a level shift circuit.
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`Accordingly, when a level shift circuit and a reverse level
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`shift circuit are allowed to coexist, it is necessary to form
`Nch- and Pch-DMOStransistors in a HVIC.
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`[0015]
`In manufacturing the DMOStransistors, however,
`it is difficult
`to form both of the Nch- and Pch-DMOS
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`Page 9 of 17
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`US 2003/0012040 Al
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`Jan. 16, 2003
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`and a positive input terminal to which the input voltage
`transistors in the HVIC, while adjusting characteristics, such
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`signal is applied, and a first transistor having (a) a first
`as the threshold valuesof bothtransistors, to their respective
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`current electrode, (b) a second current electrode connected
`desired values.It is especially difficult to form a Pech-DMOS
`transistor in a substrate at which a Nch-DMOS transistor is
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`in commonto the negative input terminal of the operational
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`amplifier and one terminal of the first resistance, and (c) a
`present. Hence, it is desired to configure a reverse level shift
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`control electrode to which output of the operational ampli-
`circuit without employing any Pch-DMOStransistor.
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`fier is applied,
`the first potential is applied to the other
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`[0016]
`It can also be considered to configure a reverse
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`terminal of the first resistance; that in the current-voltage
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`level shift circuit using photocouplers, without using any
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`conversion part, a third potential higher than the second
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`DMOStransistor. However,
`the use of photocouplers
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`potential by a fixed value is applied to one terminal of the
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`second resistance; that the first current mirror circuit com-
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`and results in poorreliability at high temperatures. From the
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`prises a second transistor having (d) a first current electrode
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`standpointof the entire arrangement, the configuration pref-
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`connectedto the first current electrode of the first transistor,
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`erably contains a transistor that operates electrically.
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`(e) a second current electrode to which a fourth potential
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`higher than the first potential by a fixed value, and (f) a
`SUMMARYOF THE INVENTION
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`control electrode connected to the first current electrode, and
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`a third transistor having (g) a first current electrode con-
`[0017] According to a first aspect of the invention, a
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`nected to the drain of the Nch-MOStransistor, (h) a second
`reverse level shift circuit that converts an input voltage
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`current electrode to which the fourth potential is applied, and
`signal using a first potential as a reference potential to an
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`(i) a control electrode connected to the control electrode of
`output voltage signal using a second potential lower than the
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`the second transistor; and that the second current mirror
`first potential, as a reference potential, and then outputs the
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`circuit comprises a fourth transistor having (j) a first current
`output voltage signal, comprises: a voltage-current conver-
`electrode connected to the source of the Nch-MOStransis-
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`sion part operating based on the first potential, which
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`tor, (k) a second current electrode to which the second
`converts the input voltage signal to a current signal corre-
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`potential is applied, and(1) a control electrode connected to
`spondingto a value of the input voltage signal, then outputs
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`the first current electrode, anda fifth transistor having (m) a
`the current signal; a Nch-MOStransistor having a source to
`first current electrode connected to the other terminalof the
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`which the second potential is applied via a load, a drain
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`second resistance, (n) a second current electrode to which
`responsive to the current signal from the voltage-current
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`the second potential is applied, and (0) a control electrode
`conversion part, and a gate to which a fixed potential is
`connected to the control electrode of the fourth transistor.
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`applied; and a current-voltage conversion part operating
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`based on the second potential, which converts current from
`[0021] According to a fifth aspect of the invention, the
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`the source of the Nch-MOStransistor to a voltage signal
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`reverse level shift circuit of the third aspect is characterized
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`in: that the second current source further contains a third
`corresponding to a value of the current, and then outputs the
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`voltage signal as the output voltage signal.
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`current mirror circuit operating based on a third potential
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`that is higher than the second potential by a fixed value,
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`[0018] According to a second aspect of the invention, the
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`which receives a current signal from the second current
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`reverse level shift circuit of the first aspect further com-
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`mirror circuit and then outputs a current signal correspond-
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`prises: a first current source operating based on the first
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`ing to the current signal,
`to one terminal of the second
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`potential, which outputs current correspondingto the current
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`resistance of the current-voltage conversion part; and that
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`signal from the voltage-current conversion part, to the drain
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`the second potential is applied to the other terminal of the
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`of the Nch-DMOStransistor; and a second current source
`second resistance.
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`operating based on the second potential, which contains the
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`[0022] According to a sixth aspect of the invention, the
`load and outputs a current signal corresponding to the
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`current from the source of the Nch-MOStransistor, to the
`reverse level shift circuit of the fifth aspect is characterized
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`in that the voltage-current conversion part further contains
`current-voltage conversion part.
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`an operational amplifier having a negative input terminal
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`[0019] According to a third aspect of the invention, the
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`and a positive input terminal to which the input voltage
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`reverse level shift circuit of the second aspect is character-
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`signal is applied, and a first transistor having (a) a first
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`ized in that the voltage-current conversion part contains a
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`current electrode, (b) a second current electrode connected
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`first resistance to which the input voltage signal is applied to
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`in commonto the negative input terminal of the operational
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`generate the current signal;
`that
`the first current source
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`amplifier and one terminal of the first resistance, and (c) a
`containsafirst current mirror circuit that receives the current
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`control electrode to which output of the operational ampli-
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`signal from the voltage-current conversion part and outputs
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`fier is applied,
`the first potential is applied to the other
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`current corresponding to the current signal; that the second
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`terminal of the first resistance; that the first current mirror
`current source contains a second current mirror circuit
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`circuit comprises a second transistor having (d) a first
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`serving as the load, which receives the current from the
`current electrode connected to the first current electrode of
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`source of the Nch-MOStransistor and outputs a current
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`the first transistor, (e) a second current electrode to which a
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`signal corresponding to the current; and that the current-
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`fourth potential higher than the first potential by a fixed
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`voltage conversion part contains a second resistance that
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`value, and (f) a control electrode connected to the first
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`receives the current signal from the second current source to
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`current electrode, and a third transistor having (g) a first
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`cause a voltage drop for generating the output voltage signal.
`current electrode connected to the drain of the Nch-MOS
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`transistor, (h) a second current electrode to which the fourth
`[0020] According to a fourth aspect of the invention, the
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`potential is applied, and(i) a control electrode connected to
`reverse level shift circuit of the third aspect is characterized
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`the control electrode of the secondtransistor; that the second
`in that the voltage-current conversion part further contains
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`current mirror circuit comprises a fourth transistor having (j)
`an operational amplifier having a negative input terminal
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`Page 10 of 17
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`Page 10 of 17
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`

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`US 2003/0012040 Al
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`Jan. 16, 2003
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`a first current electrode connected to the source of the
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`Nch-MOStransistor,(k) a second current electrode to which
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`the second potential is applied, and (1) a control electrode
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`connected to the first current electrode, and a fifth transistor
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`having (m) a first current electrode, (n) a second current
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`electrode to which the second potential is applied, and (0) a
`control electrode connected to the control electrode of the
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`fourth transistor; that the third current mirror circuit com-
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`prises a sixth transistor having (p) a first current electrode
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`connectedto the first current electrode of the fifth transistor,
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`(q) a second current electrode to which the third potential is
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`applied, and (r) a control electrode connected to the first
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`current electrode, and a seventh transistor having (s) a first
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`current electrode,(t) a second current electrode to which the
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`third potential is applied, and (uw) a control electrode con-
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`nected to the control electrode of the sixth transistor; and
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`that in the current-voltage conversion part, the first current
`electrode of the seventh transistor is connected one terminal
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`of the second resistance, and the second potential is applied
`to the other terminal of the second resistance.
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`[0023] According to a seventh aspect of the invention, the
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`reverse level shift circuit of the first aspect is characterized
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`in that the input voltage signal is PWM signal, and further
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`comprising an integrating circuit that integrates the voltage
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`signal from the current-voltage conversion part and outputs
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`the result as the output voltage signal.
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`[0024] According to an eighth aspect of the invention, the
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`reverse level shift circuit of the first aspect further comprises
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`a signal output part that based on the input voltage signal,
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`generates and outputs other output voltage signal using the
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`first potential as a reference potential.
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`[0025] According to a ninth aspect of the invention, the
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`reverse level shift circuit of the eighth aspect is character-
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`ized in that the signal output part contains an RS flip-flop
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`that receivesat its set input terminal the input voltage signal
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`and outputs the mentioned other output voltage signal.
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`[0026] According to a tenth aspect of the invention, the
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`reverse level shift circuit of the first aspect further comprises
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`a control part that stops operation of the Nch-MOStransistor
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`in accordance with a change in the output voltage signal
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`from the current-voltage conversion part.
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`[0027] According to an eleventh aspect of the invention,
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`the reverse level shift circuit of the tenth aspect is charac-
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`terized in that the control part contains an RSflip-flop that
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`receives at its set input terminal the output voltage signal
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`from the current-voltage conversion part, and a switch that
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`applies the second potential to the gate of the Nch-MOS
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`transistor when output of the RSflip-flop is activated.
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`[0028] According to a twelfth aspect of the invention, a
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`power semiconductor device comprises: a reverse level shift
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`circuit according to the first aspect; switching elements on a
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`high-voltage side and a low-voltage side connected in series;
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`and a stop signal output circuit that receives the output
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`voltage signal of the reverse level shift circuit and outputs a
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`stop signal to stop operation of the switching element on
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`high-voltage side, an output voltage of the switching ele-
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`menton the high-voltage side being usedas the input voltage
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`signal applied to the reverse level shift circuit.
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`[0029]
`In the first aspect of the invention, there is the
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`Nch-MOStransistor having the source to which the second
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`potential is applied via the load, the drain responsive to the
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`Page 11 of 17
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`current signal from the voltage-current conversion part, and
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`the gate to which the fixed potential is applied. Since the
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`Nch-MOStransistor is used in common gate construction,
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`the value of the current gain between the drain and source is
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`1, so that the current signal from the voltage-current con-
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`version part on the high side can be directly transferred to
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`the current-voltage conversion part on the low side. This
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`enables to configure a reverse level shift circuit by employ-
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`ing no Pch-DMOStransistor. Therefore, even when a level
`shift circuit and a reverse level shift circuit are allowed to
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`coexist in a single HVIC,
`it is unnecessary to form any
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`Pch-DMOStransistor in addition to a Nch-DMOStransistor,
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`thereby making it easy to manufacture the HVIC.
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`[0030]
`In the second aspect of the invention, by the
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`presence of the first and second power sources, the adverse
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`effect on the output impedance of the voltage-current con-
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`version part and the input impedance of the current-voltage
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`conversion part can be lessened than the case of directly
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`connecting the voltage-current conversion part and current-
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`voltage conversion part to the Nch-MOStransistor. This
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`results in the output voltage signal that faithfully reflects the
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`change of input voltage signal.
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`In the third or fourth aspect of the invention, the
`[0031]
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`voltage-current conversion part and current-voltage conver-
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`sion part contain the resistances, and the first and second
`current sources contain the current mirror circuits. There-
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`fore, a reverse level shift circuit can be configured easily by
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`using these transistors and resistances.
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`[0032]
`In the fifth or sixth aspect of the invention, the
`second current source further contains the third current
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`mirror circuit. The output of the third current mirror circuit
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`is applied to one terminal of the second resistance of the
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`current-voltage conversion part, and the second potential is
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`applied to the other terminal of the second resistance. This
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`provides an output voltage signal using the second potential
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`as a reference potential.
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`[0033]
`In the seventh aspect of the invention, the input
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`voltage signal is PWM signal, and the integrating circuit is
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`added. Since the input voltage signal is a pulse string of
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`which amplitude is constant,
`it is less susceptible to the
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`influence of the channel length modulation effect of the
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`Nch-MOStransistor. Therefore, it 1s possible to output an
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`output voltage signal reflecting more faithfully the signal
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`change prior to the PWM signal (the input voltage signal)
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`modulation, by integrating on the integrating circuit a volt-
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`age signal from the current-voltage conversion part.
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`[0034]
`In the eighth or ninth aspect of the invention, the
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`signal output part generates and outputs other output voltage
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`signal using the first potential as a reference potential.
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`Thereby, such other output voltage signal can be applied, as
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`a control signal, to the circuit that operates using the first
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`potential as a reference potential.
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`In the tenth or eleventh aspect of the invention, the
`[0035]
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`control part stops the operation of the Nch-MOStransistor
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`in accordance with a change of the output voltage signal
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`from the current-voltage conversion part. Therefore, power
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`consumption can be reduced by arranging such that the
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`control part stops the current passing through the Nch-MOS
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`transistor whenit receives the change of the output voltage
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`signal.
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`[0036]
`the stop
`In the twelfth aspect of the invention,
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`signal output circuit stops the operation of the switching
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`Page 11 of 17
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`US 2003/0012040 Al
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`Jan. 16, 2003
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`element on high-voltage side when it receives the output
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`voltage signal of the reverse level shift circuit. This permits
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`a power semiconductor device that is low in manufacturing
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`cost and excellent in reliability.
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`[0037]
`It is an object of the present invention to provide a
`reverse level shift circuit that is low in cost and excellent in
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`reliability by incorporating it into a driver IC (HVIC con-
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`taining a level shift circuit), without using any Pch-DMOS
`transistor.
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`features, aspects and
`[0038] These and other objects,
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`invention will become more
`advantages of the present
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`apparent from the following detailed description of the
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`invention when taken in conjunction with the
`present
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`accompanying drawings.
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`[0049] Both of the voltage-current conversion circuit CV1
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`and curre