115
`United States Patent
`4,342,227
`[11]
`
`[45] Aug. 3, 1982
`Petersen et al.
`
`[54] PLANAR SEMICONDUCTOR THREE
`DIRECTION ACCELERATION DETECTING
`DEVICE AND METHODOF FABRICATION
`
`[75]
`
`Inventors:
`
`Kurt E. Petersen; Anne C, Shartel,
`both of San Jose, Calif.
`
`[73] Assignee:
`
`International Business Machines
`Corporation, Armonk, N.Y.
`
`[21] Appl. No.: 219,685
`
`[22] Filed:
`
`Dec. 24, 1980
`
`[SL] Wit. CLF es seeessesceeeseeseesneneeneees GOIP 15/125
`
`[52] U.S. Ch. ieee ceseereceenteneeee 73/510; 73/517 R
`
`(58] Field of Search............. 73/514, 510, 515, 516 R,
`73/517 R, 517 B, 862.48
`
`[56]
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`4/1963 Wilcox et al. .......eens 73/517
`3,084,558
`1/1966 Wilcox et al...
`ecceeeerees 73/517
`3,229,530
`
`3,478,604 11/1969 Evans.........0
`we 3/517
`3,513,711
`5/1970 Rogall et al.
`. 73/517
`3,572,109
`3/1971 Yermatt 20...
`escesesseneeneees 73/141
`3,877,313
`4/1975 Ferriss ....
`. 73/516 R
`3,911,738 10/1975 Fischer ...
`« B/AI4IR
`4,009,607
`3/1977 Ficken....
`« 73/141 R
`4,071,838
`1/1978 Block oe
`ecceesceteneeeeeee 338/47
`6/1978 Holdrenetal.
`... 73/517 B
`4,094,199
`
`4,129,042 12/1978 Rosuold 00.0...
`eeeeseseeceeereeeee 73/727
`3/1979) Aime oc eessssesseeseeseensenensae 338/2
`4,144,516
`
`
`
`OTHER PUBLICATIONS
`
`Spectrum; 2-80 pp. 42-45 at p. 44 Col. 2, and Figs. [3]
`and [4] on p. 45.
`J. J. Fatula Jr., P. L. Garbarino & P. J. Tsang; “Acousti-
`cal Spectrum Analyzer on a Chip;” IBM TDB,vol. 22
`No. 11, Apr. 1980; p. 4906 and pp. 4907-4908.
`
`Primary Examiner—JamesJ. Gill
`Attorney, Agent, or Firm—George E. Roush
`
`ABSTRACT
`[57]
`This device comprises a v-shaped cavity in a planar
`semiconductor substrate having a substantially thin-
`walled v-shaped cantilever beam inset
`therein. The
`beam is movable in directions normalto andlaterally of
`the plane of the substrate, whereby acceleration is
`sensed in both of these directions. A planar substrate of
`n-type silicon is arranged with the major face oriented
`in the (100) plane. A v-shaped grooveis anisotropically
`etched in the substrate and capacitor electrode regions
`are diffused into the sloping walls. An epitaxial layer is
`grownoverthis substrate, and overthat a layer of insu-
`lation is added. A layer of conductive material is laid
`down onthe insulation to define an electrode. The sub-
`strate is again subjected to an anisotropic etchant for
`cutting the epitaxial layer from under the cantilever
`beam formed of the insulating layer and the conducting
`layer. The electrodes form two variable capacitors
`which are connectedin parallel or differentially to sim-
`ple circuitry Jaid down on the samesubstrate for resolv-
`ing the bidirectional movementof the beam. Three such
`devices appropriately oriented, and compatible elec-
`tronic circuitry, enable all three spatial coordinates to
`be probed with a single substrate assembly.
`
`—
`
`Simon Middelhoek, James B. Angell & D. J. W. Noor-
`lag “Microprocessors Get Integrated Sensors”; IEEE
`
`10 Claims, 8 Drawing Figures
`
`
`
`Align EX1032
`Align v. 3Shape
`IPR2022-00144
`
`Align EX1032
`Align v. 3Shape
`IPR2022-00144
`
`

`

`U.S. Patent
`
`4,342,227
`
`Sheet 1 of 4
`
`Aug. 3, 1982
`
`FIG.4
`
`

`

`Sheet 2 of 4
`
`4,342,227
`
`U.S. Patent
`
`Aug.3, 1982
`
`FIG. 3 FIG.2
`
`

`

`U.S. Patent
`
`Aug. 3, 1982
`
`Sheet 3 of 4
`
`4,342,227
`
`wr©re
`
` ©©Le
`
`
`

`

`U.S. Patent
`
`Sheet 4 of 4
`
`Aug.3, 1982
`
`4,342,227
`
`

`

`1
`
`4,342,227
`
`PLANAR SEMICONDUCTOR THREEDIRECTION
`ACCELERATION DETECTING DEVICE AND
`METHOD OF FABRICATION
`
`FIELD
`
`The invention relates to acceleration devices, and it
`particularly pertains to planar semiconductorstructures
`capable of all three degrees of freedom in detecting
`acceleration componentsofinterest.
`BACKGROUND
`
`Acceleration detecting devices are well known in
`intricate mechanical form. Formerly they were quite
`bulky and composed of a relatively large number of
`parts which made for complex fabrication processes at
`considerable expense. With the advent of semiconduc-
`tor devices, some of the intricate bulk, complexity and
`expense has been reduced. Semiconductoracceleration
`and/or pressure devices of the “leaf spring” type have
`been developed for sensing in a direction normal to the
`plane of the semiconductorchip. This limitation aloneis
`critical in a majority of applications, the most common
`of which is that of sensing in more than one degree of
`freedom. A numberof acceleration detection arrange-
`ments are based on sensing a capacitive componentthat
`varies with the degree of acceleration. Often these ar-
`rangements are too complex for use other than in cases
`of absolute necessity. The applications for these devices
`have increased considerably in the last
`few years
`whereby an inexpensive, compact, unitary, reliable and
`rugged acceleration detecting device is needed.
`SUMMARY
`
`The objects of the invention indirectly referred to
`hereinbefore, and those that will appear as the specifica-
`tion progresses, obtain in a unitary planar semiconduc-
`tor acceleration detecting device and electric circuit
`arrangements having a cantilever beam arranged in a
`substrate for movement in a direction parallel to the
`plane of the substrate, and having electrodes on the
`beam andin the substrate between which a capacitive
`reactanceis established thatis indicative of the accelera-
`tion at the time of sampling.
`By arranging two such beamsat a right angle with
`respect to each otherin a single substrate, two degrees
`of freedom are served. The third degree of freedom is
`served by adding an identical beam in the substrate and
`modifying the associated electric circuit to sense accel-
`eration in the direction normalto the plane of the sub-
`strate. Thus, according to the invention, accelerationis
`detected in all three spatial coordinates with a single
`semiconductor substrate device having three cantilever
`beams and the associated circuitry for each integrally
`formed therein.
`Further, in accordance with the invention, the accel-
`erometeris fabricated by a method entirely compatible
`with the fabrication of Metal Oxide Silicon (MOS)tran-
`sistors and like components whereby an integral struc-
`ture readily obtains.
`Essentially a planar substrate of n-type silicon is ar-
`ranged with the major face oriented in the (100) plane.
`For each device a v-shaped grooveis anisotropically
`etched in the substrate and capacitor componentelec-
`trodes are diffused into the sloping walls of the groove.
`An epitaxial layer is grown overthis substrate without
`substantially redefining the groove, and over that a
`layer of insulation is added. The insulationis first etched
`
`2
`away to define an electrode, and a layer of conductive
`material is laid down on the insulation that defines the
`electrode. The substrate is again subjected to an aniso-
`tropic etchantfor cutting the epitaxial layer from under
`the cantilever beam formed ofthe insulating layer and
`the conducting layer. The resultant beam is v-shaped
`and free to movelaterally in the v-shaped groove as
`well as into and out of the groove. The electrodes form
`two variable capacitors which are connectedin parallel
`or differentially for the acceleration sensing function.
`PRIORART
`
`_ 5
`
`Examples of prior art having some bearing on the
`development of the accelerometer of the invention as
`will be discussed, are to be found in the following U.S.
`Pat. Nos.:
`
`
`3,084,558
`4/1963
`Wilcox et al
`15/517
`3,229,530
`1/1966
`Wilcox et al
`73/517
`3,478,604
`11/1969
`Evans
`T/S1T
`3,513,711
`5/1970
`Rogall et al
`73/517
`3,572,109
`3/1971
`Yerman
`73/141
`3,877,313
`4/1975
`Ferriss
`73/516R
`3,911,738
`10/1975
`Fischer
`73/141R
`4,009,607
`3/1977
`Ficken
`73/141R
`4,071,838
`1/1978
`Block
`338/47
`4,094,199
`6/1978
`Holdrenetal
`73/S17B
`4,129,042
`12/1978
`Rosvold
`73/727
`4,144,516
`3/1979
`Aine
`338/2
`
`.
`
`Andin the literature:
`Simon Middelhoek, James B. Angell and Date J. W.
`Noorlag; “Microprocessors Get Integrated Sensors”;
`IEEE Spectrum; February 1980, pp 42-45 at page 44
`column 2, and FIGS.[3] and [4] on page 45.
`J. J. Fatula Jr., P. L.. Garbarino and P. J. Tsang;
`“Acoustical Spectrum Analyzer on a Chip”;
`IBM
`Technical Disclosure Bulletin, Vol. 22 Nr. 11, April
`1980; p. 4906 and pp. 4907-8.
`The patents to Wilcox and Robinson and to Wilcox
`and Mullins are directed to accelerometers having ca-
`pacitive sensing elements and electronic circuitry for
`resolving the output potentials of the sensing elements,
`but the arrangements differ greatly in detail from a
`cantilever beam arranged in a planar semiconductor
`substrate for lateral movement between associated elec-
`trodes according to the invention.
`The patents to Evans and to Yerman disclose semi-
`conductor beam accelerometers of the variable resis-
`tance type and bridgecircuitry for resolving the data,
`but the arrangements differ in detail from a cantilever
`beam arranged in a planar semiconductorsubstrate for
`lateral movement therein between associated electrodes
`in accordance with the invention.
`Rogall and Fennel disclose an accelerometer arrange-
`ment of a differential capacitive bridge type having a
`complex mechanical structure which differs greatly
`from. a cantilever beam arranged in a planar semicon-
`ductor substrate for lateral movement therein between
`associated electrodes.
`Ferriss and Fischer each disclose an accelerometer of
`the electrostatic or capacitive type which works on
`entirely different principles and which differs in struc-
`ture from a simple planar semiconductor body encom-
`passing a cantilever beam and associated capacitor elec-
`trodes.
`The patents to Fischer and to Holdron et al. each
`disclose a differential capacitive type accelerometer
`
`40
`
`55
`
`65
`
`

`

`4,342,227
`
`3
`having a weighted paddle beam moving betweenassoci-
`ated electrodes which otherwise differs greatly from a
`simple planar semiconductor body having a recess
`therein, and an integrally formed cantilever beam in the
`recess arranged for lateral movement between elec-
`trodes.Block and Aine each disclose a planarsemiconductor
`
`
`
`4
`longitudinal axis of the beam 24 of the device 21, while
`another of the devices, ‘say the device 22 is arranged in
`circuit for sensing acceleration in the plane of the sub-
`strate 20 in a direction normalto thatofthe first device
`21. The third device 23 is now arrangedin circuit in a
`different manner for sensing acceleration in a direction
`normal to the planeofthe substrate 20. The substrate 20
`also has other elements in the form of semiconductor
`body containing an integrally formed “leaf spring” can-
`tilever beam whichis capable only of sensing in a direc-
`device components, both active and passive, laid down
`tion normal to the plane of the body, which arrange-
`as indicated roughly by the dashedline rectangles 30. It
`ment is functionally different from a cantilever beam
`is also a feature of the invention that both the accelera-
`arranged for lateral movement within the body.
`tion detecting devices and the other circuit elements are
`- The patent to Rosvoldis directed to.a semiconductor
`laid down in the same semiconductor fabrication pro-
`chip accelerometer having a spring membranefor sens-
`cess as will be described hereinafter.
`ing acceleration, andaresistive bridge arrangement,all
`The substrate 20 is a wafer ofsilicon, preferably n-
`contained in a compact mechanical package, which
`type formed with the major face oriented in the (100)
`structure differs greatly from a planar solid state body
`plane. The wafer is first masked and anisotropically
`having an integrally formed: cantilever beam therein
`etched as by an etchant of the type such as éthylene
`moving laterally and coupled to a capacitance type
`diamine pyrocatechol and water to form an elongated
`bridge circuit.
`cavity for each acceleration sensing device desired.
`The IEEE publication is directed to accelerometers
`With the major surfaces lying substantially in the (100)
`ofthe piezoresistive type, and thusdiffer from the canti-
`plane, the semiconductorcrystalline structure then has
`lever beam accelerometer of the invention.
`internal (111) planes at.a convenient angle with respect
`The IBM publications are directed to pressure analy-
`to the (100) planes, for example, in crystalline silicon at
`zers arranged as a semiconductor chip having a v-
`an angle of 54.°7. A suitable anisotropic etchant is used
`shaped groove therein for forming a variable capaci-
`to etch pyramidal cavities in the semiconductor wafer.
`tance type sensor in common with the structure accord-
`An anisotropic etchant works much more normally to
`ing to the invention without any suggestion, however,
`the (100) plane than it does laterally or parallel to the
`of arranging a v-shaped cantilever beam in the groove
`(100) plane, and thus it works very much less at the
`for lateral movement therein as in the arrangement of
`(111) plane. Hence, the action of the etchant leaves
`the invention.
`pyramidal surfaces. In accordance with the process
`accordingto the invention, the waferis first coated with
`etchant masking material on the obverse major surface.
`The anisotropic etching results in elongated frustro-
`pyramidal cavities extending from the obverse for a
`depth of the order of 25 pm, and having a width of the
`order of 50 xm, and a length of 150 pm. A plan view of
`one cavity 40 is shown in FIG. 2 with a cross-section
`view ofthat cavity taken along the line 3—3 in FIG.2,
`in FIG.'3; it being understood that each device is sub-
`stantially identical except for orientation. FIG. 2 actu-
`ally showsthe structure in a stage advanced by ore step
`in the fabrication process. A pair of p+ doped regions
`42, 44 are laid down on the longer walls of the cavity.
`This doping is better seen in FIG. 3, which actually
`showsthestructure in a stage two steps further along.
`Here an epitaxial layer 46 is grown over the entire
`doped substrate and an insulating layer 48 is laid down.
`The v-shaped cavity 40 has notlost its definition to any
`appreciable extent and will not as fabrication pro-
`gresses. Referring to FIG.4, there is shown a cross-sec-
`tion view of the structure a further two steps along.
`First, the insulating layer 48 is etched away to define a
`beam within the cavity, which etching is also arranged
`to define an electrode on that beam,after which a layer
`50 of metal or other electrically conducting material is
`laid over the defined area to form the electrode. A plan
`DESCRIPTION
`view is shown in FIG. 5. Next, the wafer is again sub-
`An important advantage of the accelerometer of the 60 jected to an anisotropic etchant which will undercut the
`invention is that three identical embodiments of the
`metal coated insulating film combination (50-48) to
`form a thin-walled cantilever beam without attacking
`simple device can be arranged for sensing in all three
`the doped regions 42, 44. In someinstances the beam is
`degrees of freedom. For example, as generally shownin
`given greater flexibility in the lateral direction by etch-
`FIG.1, a substrate 20 of n-type silicon for example, has
`ing the insulation 48 and metal 50 away as shown by the
`three devices 21, 22, 23 according to the invention,
`fabricated therein as will be set forth hereinafter. One 21
`rectangular apertures 52. For sensing in the normal
`direction, this etching is better omitted. FIG. 6 is an
`of the devicesis arrangedin circuit for sensing accelera-
`isometricview of the completed structure.
`tion in the plane of the substrate 20 and normal to the
`
`In order that all of the advantages of the invention
`obtain in practice, the best mode embodimentthereof,
`given by way of example only, is described in detail
`hereinafter with reference to the accompanying draw-
`ing forming a part of the specification, and in which:
`FIG.1 is a plan view of three acceleration detecting
`devices as arranged for sensing acceleration in all three
`degrees of freedom;
`FIG.2 is a plan view of portions of one such device;
`FIG.3 is a cross-section view of the structure of the
`device according to the invention in the process of
`fabrication, taken along the line 3—3 inFIG.2;
`FIG.4 is a cross-section view of the one device as
`shown in FIG.2, at a later stage of fabrication;
`FIG.5 is a plan view of the one device as shown in
`FIG.4;
`FIG.6 is an isometric view of one such device at or
`near completion;.
`FIG.7 is a schematic diagram ofcircuitry for sensing
`acceleration in a direction parallel to the plane of the
`substrate; and
`. FIG.8 is a schematic diagram ofcircuitry for sensing
`acceleration in a direction normal to the plane of the
`substrate.
`:
`
`DRAWING
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
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`
`

`

`5
`The. process for fabricating the accelerometer struc-
`ture and associated integrated circuitry is outlined here.
`. Prepare an n-type monocrystalline silicon wafer
`with the major surface lying in the (100) plane;
`2. Anisotropically etch one groove or elongated cav-
`ity for each accelerometer beam desired. Twocavities
`are arranged at 90° to each other, if a plurality is de-
`sired;
`- 3. Dope sloping wall regions heavily with boron to a
`p+ concentration. of the order of 1020 cm—3;
`4. Grow an n-type silicon epitaxial layer over the
`surface to a thickness of the order of 5 xm;
`5.-Deposit aninsulating layer, of SiO2 for example,
`overthe epitaxial layer.
`. 6. Define other semiconductor devices and thelike as
`desired on the waferat this step, with sub-steps as neces-
`sary;
`7. Etch the insulating layer to define the accelerator
`beam(s) and as otherwise desired;
`8. Deposit a metal layer and delineate the pattern
`. photo-lithographically;
`9. Subject the wafer to the anisotropic etchant again;
`and
`10. Add a passivating coating if desired.
`While it may seem that there may bedifficulty in
`photolithographic processing in a depression 25 pm
`deep,it should be noted that the other dimensions of the
`_beamcavityare quite large as compared to the conven-
`tional dimensions. of transistors and like components.
`Actually the smallest feature to be resolved at the bot-
`tom ofthe cavity is a line 10 zm wide, which dimension
`is notatall critical in conventional lithographic process-
`ing.
`The acceleration detecting device according to the
`invention is centered about a v-shaped cavity in a planar
`substrate having a. substantially thin-walled v-shaped
`cantilever beam inset therein and having electrodes on
`the sloping walls of the cavity and the beam. Thelatter
`is movable not only in a direction normal to the plane of
`the substrate, but also laterally thereof, whereby accel-
`eration is sensed in a direction parallel to the plane of
`the substrate as well as.in.a direction normal thereto.
`Circuitry for resolving the bidirectional movement of
`the beam is shown in FIG. 7. A differential amplifying
`circuit 70 is connected across a bridge circuit in which
`two variable capacitors 72, 74 are arrangedin different
`armsofthe bridge. These capacitors 72, 74 are formed
`by the beam metalization as the rotor electrodes and the
`doped regions 42 and 44 respectively. Fixed capacitors
`16, 78 and four MOSFET devices 82, 84, 86 and 88
`completethe bridgecircuit essentials. When the beam
`of the acceleration detecting device moves normally to
`the plane of the substrate, the variable capacitors 72, 74
`vary substantially alike. The output potentials of FET
`82 and 84 vary substantially in the same manner. Since
`the variations being applied to the differential input
`terminals of the amplifying circuit 70 vary in the same
`manner, the output potential of the amplifier circuit 70
`remains unchanged. However, as the beam moves later-
`ally the capacity of one capacitor will increase and the
`capacity of the other capacitor will decrease, and con-
`versely. The output potentials of the transistors 82, 84
`will be in opposition and the output of the amplifying
`circuit 70 will change in response to the degree of accel-
`eration in the direction of the plane of the substrate.
`Calibration is a simple matter.
`in a
`For an accelerometer for sensing movement
`direction normal to the planeof the substrate, the circuit
`
`10
`
`20
`
`25
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`30
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`45
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`ou
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`65
`
`4,342,227
`
`6
`shown in FIG. 8 is used. Here substantially the same
`bridge circuit preferably is used. A fixed capacitor 94 is
`connected in circuit with the FET 84 and the variable
`capacitor 74 is connected in parallel with the variable
`capacitor 72 with a series capacitor 96 of value substan-
`tially that of the two capacitors 72, 74 at some reference
`or rest position. In this arrangement the negative input
`terminal of the amplifying circuit 70 is held to a refer-
`ence potential with correction for temperature and like
`variations as before. The positive input terminal is sub-
`jected to a varying potential indicative of the normal
`variation of capacity due to normal movement;lateral
`movement variations are substantially self compensat-
`ing. Theseries fixed capacitor 96 serves in two ways.It
`maintains the potential swing to the associated FET 82
`the same as with but one variable capacitor, and it tends
`to halve any errorarising from lateral movement when
`sensing the movementin the normal direction.
`Thesensitivity of accelerometers is easily estimated
`based on beam dimensions according to the invention.
`The fractional changes in capacitance is expressed:
`
`AC/C=k(8/2de)
`
`qa)
`
`where
`6 is the movement of the membranetip,
`k is a geometrical factor correcting for the angle
`54.°7, and
`dy is the equilibrium metal/p+ spacing.
`For a uniform acceleration:
`
`AC/C= (ph/Etd,)ak
`
`(2)
`
`where
`p is the insulator density,
`lis the membranelength,
`E is Young’s modulus,
`t is the membrane thickness, and
`a is the acceleration.
`For an SiO? cantilever beam 200 xm long, 0.5 pm
`thick, spaced 5 xm from the p+ layer:
`
`AC/C=4x 10-4/g.
`
`(3)
`
`With a 5 V supply in the circuits of FIG. 7 or8, this
`corresponds to 4 mV/g going directly to the differential
`amplifier on the same chip, adjacent to the acceleration
`detecting device.
`Beams according to the invention have proved to be
`reliable in tests of over 10!° deflections observed with
`no changein properties, to be operable at high resonant
`frequency over | kHz, and to be rugged in that 250 g
`will deflect the beam only about 0.5 um. Furthermore,
`linearity to 1% is assured as long as AC/C < 10-2. Since
`typical MOSoperational amplifiers are sensitive well
`into the microvolt range, accuracies of 1% obtain when
`on-chip operational amplifiers are integrated with sen-
`sors. Calibration of individual units is easily accom-
`plished during a test procedure by measuring the chip
`responseto a fixed acceleration, then adjusting the gain
`of the operational amplifier either by laser trimming or
`by writing a calibration code into a small on-chip pro-
`grammed reproducing store, which will allow the de-
`vice to calibrate the signal before it is transmitted.
`While the invention has been described in terms of an
`express embodiment, and alternatives have been sug-
`gested,it is clearly to be understood that those skilled in
`the art will effect further changes without departing
`
`

`

`7
`from the spirit and scope ofthe invention as defined in
`the appended claims concluding the specification:
`The invention claimed is:
`LA planar semiconductor acceleration detecting
`device comprising
`a substrate of semiconductor material having an elon-
`gated v-shaped cavity therein,
`a v-shape cantileverbeam arranged in said v-shaped
`cavity and depending from one end thereof for
`movement into and out of said cavity and move-
`ment from side to side in said cavity,
`electrodes of conductive material arranged on the
`sloping walls of ‘said cavity and on the sloping
`walls of said beam, and
`an electronic circuitry coupledto said electrodes and
`arranged for indicating the degree of acceleration
`to which said device is subjected in terms of the
`instantaneous capacity between said electrodes in
`said cavity and on said beam.
`:
`2. A planar semiconductor acceleration device as
`defined in claim 1, and wherein
`said electronic circuitry comprises
`an electric bridge circuit having four arms each com-
`prising a capacitor with two arms comprising vari-
`able capacitors formed by the electrodes on the
`sloping walls of. said cavity and on the sloping
`walls of said beam,
`an electric. energizing potential source connected
`across one diagonal of said bridge circuit,
`a differential amplifier circuit having output terminals
`at which an indication of acceleration is delivered
`and differential input terminals coupled across the
`other diagonal of said bridge circuit.
`3. A planar semiconductor acceleration device as
`defined in claim 2, and wherein
`said input terminals of said differential amplifier cir-
`cuit are coupled across said bridge circuit byfour
`field effect transistors connected to said capacitors
`as to vary. the resistance in accordance with the
`‘variable capacitor connected between the gate
`electrode and the drain electrode in said two arms,
`thereby to unbalance said amplifier circuit in accor-
`dance with the degree of acceleration to whichsaid
`device is subjected.
`4A planar semiconductor acceleration detecting
`‘device comprising
`an n-type silicon substrate having an elongated v-
`shaped cavity therein,
`electrodes of p+ boron diffused in the sloping walls
`of said circuitry,
`a v-shaped cantilever beam arranged in said v-shaped
`cavity and depending from one end thereof for
`movement into and out of said cavity and move-
`ment from side to side in said cavity,
`—
`metal. electrode material arranged on the sloping
`walls of said beam, and °
`an electronic circuitry coupled to said electrodes and
`arranged ‘for ‘indicating the degree of acceleration
`to which said device is subjected in terms of the
`instantaneous capacity between said electrodes in
`said cavity and on said beam.
`5. A’ planar semiconductor acceleration detecting
`device comprising
`- an n-type: silicon substrate having an elongated v-
`--
`shaped cavity therein,
`‘electrodes of p-+ boron diffused in the sloping walls
`of said circuitry,
`
`"+,
`
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`25
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`
`8
`a thin-walled v-shaped cantilever beam SiO? ar-
`ranged in said v-shaped cavity and depending from
`one end thereof for movementinto and out of said
`cavity and movement from sideto side in said cav-
`ity,
`- conductive electrode material arranged on the slop-
`ing walls of said beam, and
`an electronic circuitry coupled to said electrades and
`arranged for indicating the degree of acceleration
`to which said device is subjected in terms of the
`instantaneous capacity between said electrodes in
`said cavity and on said beam.
`mn
`6. A method of fabricating a planar semiconductor
`device having a cantilever beam arranged therein for
`movement in a direction parallel to the plane of said
`device, comprising the stepsof:
`‘
`preparing a monocrystalline silicon wafer with the
`major surface lying in the (100) plane,
`anisotropically etching an elongated pyramidal cav-
`ity in said wafer from said major surface,.
`doping sloping wall regions defining said cavity with
`a dopantof type opposite to the type of said wafer,
`growing an epitaxial layer over the major surface and
`the slopingwalls of said cavity,
`depositing an insulating layer over all ofsaid epitaxial
`layer,
`etchingsaid insulating layer to define said cantilever
`beam over said cavity with the beam depending
`from one narrow end ofthe cavity,
`depositing a layer of conductive material over said
`insulating layer ‘and delineating the pattern photo-
`lithographically, and
`anisotropically etching away the epitaxial layer from
`under said beam.
`35
`7. A method of fabricating a planar semiconductor
`device having a cantilever beam arranged therein for
`movementin a direction parallel to the plane of said
`device, comprising the stepsof:
`preparing an n-type monocrystalline silicon wafer
`with the major surface lying in the (100) plane,
`anisotropically etching an elongated pyramidal cav-
`ity in said‘ wafer from said major surface,
`doping slopingwall regions defining said cavity with
`a dopant of p+ boron,
`~
`growing an n-type epitaxial layer over the major
`surface and the sloping walls ofsaid cavity,
`depositing an insulating layer of SiOzoverall of‘said
`epitaxial layer,
`etching said insulating layer to define said cantilever
`beam over said cavity with the beam depending
`from one narrow end ofthe cavity,
`depositing a layer of aluminum oversaid insulating
`-
`layer and delineating the pattern photolithographi-
`cally, and
`anisotropically etching away the epitaxial layer from
`under said beam.
`8. A method of fabricatinga planar semiconductor
`device as defined in claim 7, and incorporating the step
`of:
`processing said wafer, after depositing said insulating
`layer, for defining field effect transistor, capacitors,
`resistors and the like for interconnection as elec-
`tronic circuitry for indicating the degree of accel-
`eration and thelike.
`9. A planar semiconductor acceleration detecting
`device, comprising
`a substrate of semiconductor material having two
`elongated v-shaped cavities therein arranged with
`
`’
`
`45
`
`

`

`9
`the longitudinal axes at 90° with respect to each
`other,
`a v-shaped cantilever beam arranged in each of said
`v-shaped cavities and depending from oie end
`thereof for movement from side to side in said
`cavity,
`electrodes of conductive material arranged on the
`sloping walls of said cavities and on the sloping
`walls of said beams, and
`an electronic circuitry coupled to said electrodes and
`arranged for indicating the degree of acceleration
`to which said device is subjected in terms of the
`
`10
`instantaneous capacity between said electrodes in
`said cavities and on the respective beams,
`thereby to indicate acceleration components in two
`directions substantially parallel to the plane of said
`substrate.
`10. A planar semiconductor acceleration detecting
`device as described in claim 9, and incorporating
`a third v-shaped cavity and v-shaped beam assembly
`and electrodes therefor, and
`electronic circuitry coupled to the electrodes for
`determining the acceleration in a direction normal
`to the plane of said substrate.
`*
`*
`*
`8
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`4,342,227
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`an
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`10
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`15
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`20
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`25
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`30
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`35
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`45
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`50
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`35
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`65
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`€
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