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Case 6:21-cv-00487-ADA Document 42 Filed 01/24/22 Page 1 of 7
`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE WESTERN DISTRICT OF TEXAS
`WACO DIVISION
`
`
`
`
`
`VERVAIN, LLC,
` Plaintiff
`
`-v-
`
`MICRON TECHNOLOGY, INC.,
`MICRON SEMICONDUCTOR
`PRODUCTS, INC., MICRON
`TECHNOLOGY TEXAS, LLC
` Defendants
`
`
`VERVAIN, LLC,
`
` Plaintiff
`
`-v-
`
`WESTERN DIGITAL
`CORPORATION, WESTERN
`DIGITAL TECHNOLOGIES, INC.,
`HGST, INC.
` Defendants
`
`























`
`
`
`W-21-CV-00487-ADA
`
`
`
`
`W-21-cv-00488-ADA
`
`CLAIM CONSTRUCTION ORDER
`
`The Court held a Markman hearing on January 24, 2022. During that hearing, the Court
`
`provided its final constructions. The Court now enters those claim constructions.
`
`
`
`SIGNED this 24th day of January, 2022.
`
`
`
`
`
`
`
`ALAN D ALBRIGHT
`UNITED STATES DISTRICT JUDGE
`
`Vervain Ex. 2012, p.1
`Micron v. Vervain
`IPR2021-01550
`
`

`

`Case 6:21-cv-00487-ADA Document 42 Filed 01/24/22 Page 2 of 7
`
`Plaintiff’s Proposed
`Construction
`Plain and ordinary meaning,
`where the plain and ordinary
`meaning is “nonvolatile
`memory that stores one bit of
`information per cell”
`
`
`Defendants’ Proposed
`Construction
`Western Digital: “non-volatile
`memory where each cell is
`capable of storing no more
`than one bit of information per
`cell”
`
`
`Court’s Final
`Construction
`Plain and ordinary meaning,
`where the plain and ordinary
`meaning is “nonvolatile
`memory that stores one bit of
`information per cell”
`
`
`Plain and ordinary meaning,
`where the plain and ordinary
`meaning is “nonvolatile
`memory that stores multiple
`bits of information per cell”
`
`
`Western Digital: “non-volatile
`memory where each cell is
`capable of storing multiple bits
`of information per cell”
`
`
`Plain and ordinary meaning,
`where the plain and ordinary
`meaning is “nonvolatile
`memory that stores multiple
`bits of information per cell”
`
`
`Term
`
`#1: “SLC non-volatile
`memory”
`
`U.S. Patent No. 8,891,298,
`Claims 1, 5; U.S. Patent No.
`9,196,385, Claims 1, 5; U.S.
`Patent No. 9,997,240, Claims
`1, 6;
`U.S. Patent No. 10,950,300,
`Claims 1, 3, 4, 7, 12
`
`Proposed by Western Digital
`
`#2: “MLC non-volatile
`memory”
`
`U.S. Patent No. 8,891,298,
`Claims 1, 4; U.S. Patent No.
`9,196,385, Claims 1, 4; U.S.
`Patent No. 9,997,240, Claims
`1, 6;
`U.S. Patent No. 10,950,300,
`Claims 1, 3, 4, 12
`
`Proposed by Western Digital
`
`
`Vervain Ex. 2012, p.2
`Micron v. Vervain
`IPR2021-01550
`
`

`

`Case 6:21-cv-00487-ADA Document 42 Filed 01/24/22 Page 3 of 7
`
`Term
`
`#3: “data integrity test”
`
`U.S. Patent No. 8,891,298,
`Claim 1;
`U.S. Patent No. 9,196,385,
`Claim 1;
`U.S. Patent No. 9,997,240,
`Claim 1;
`U.S. Patent No. 10,950,300,
`Claims 1, 7, 12
`
`Proposed by Micron
`
`#4: “comparing the stored data
`to the retained data in the
`random access volatile
`memory”
`
`U.S. Patent No. 10,950,300,
`Claims 1, 7, 12
`
`Proposed by Defendants
`
`#5: “to achieve enhanced
`endurance”
`
`U.S. Patent No. 10,950,300,
`Claims 1, 7, 12
`
`Proposed by Micron
`
`
`Plaintiff’s Proposed
`Construction
`Plain and ordinary meaning
`
`
`Defendants’ Proposed
`Construction
`Micron: Plain and ordinary
`meaning, which is “testing
`data for errors after the data
`has been written to flash”
`
`
`Court’s Final
`Construction
`Plain-and-ordinary meaning
`
`
`Plain and ordinary meaning
`
`
`“Plain and ordinary meaning”
`
`
`Plain-and-ordinary meaning
`
`
`Plain-and-ordinary meaning
`
`
`“comparing the data obtained
`by reading the nonvolatile
`memory space to the data
`retained as part of a Write
`access operation, wherein both
`sets of the data are in the same
`random access volatile
`memory”
`
`
`Micron: Plain and ordinary
`meaning, which is “to achieve
`endurance (i.e., lifetime)
`superior to that of the MLC
`nonvolatile memory element”
`
`
`Vervain Ex. 2012, p.3
`Micron v. Vervain
`IPR2021-01550
`
`

`

`Case 6:21-cv-00487-ADA Document 42 Filed 01/24/22 Page 4 of 7
`
`Plaintiff’s Proposed
`Construction
`Plain and ordinary meaning
`
`
`Defendants’ Proposed
`Construction
`Western Digital: Indefinite
`
`
`Court’s Final
`Construction
`Not indefinite. Plain-and-
`ordinary meaning.
`
`
`Term
`
`#6: “the list of logical address
`ranges having a minimum
`quanta of addresses”
`
`U.S. Patent No. 8,891,298,
`Claim 1;
`U.S. Patent No. 9,196,385,
`Claim 1;
`U.S. Patent No. 9,997,240,
`Claims 1, 6
`
`Proposed by Western Digital
`
`
`Vervain Ex. 2012, p.4
`Micron v. Vervain
`IPR2021-01550
`
`

`

`Case 6:21-cv-00487-ADA Document 42 Filed 01/24/22 Page 5 of 7
`
`Plain and ordinary meaning
`
`
`Not indefinite. Plain-and-
`ordinary meaning.
`
`
`Indefinite.
`
`Although it is possible for a
`person of ordinary skill
`(“POSA”) to identify some
`embodiments that fall within
`the scope of the claim, a POSA
`would not be reasonably
`certain of the full scope of the
`claim.
`
`
`#7: “wherein the controller is
`further adapted to determine
`which of the blocks of the
`plurality of the blocks in the
`MLC and SLC non-volatile
`memory modules are accessed
`most frequently and wherein
`the controller segregates those
`blocks that receive frequent
`writes into the at least one SLC
`non-volatile memory module
`and those blocks that receive
`infrequent writes into the at
`least one MLC nonvolatile
`module, and maintain a count
`value of the blocks in the MLC
`non-volatile memory module
`determined to have received
`frequent writes and that are
`accessed most frequently on a
`periodic basis when the count
`value is a predetermined count
`value, transfer the contents of
`the counted blocks in the MLC
`non-volatile memory module
`determined to have received
`frequent writes after reaching
`the predetermined count value
`to the SLC non-volatile
`memory module and which
`determined blocks in the SLC
`are determined in accordance
`with the next equivalent range
`
`Vervain Ex. 2012, p.5
`Micron v. Vervain
`IPR2021-01550
`
`

`

`Case 6:21-cv-00487-ADA Document 42 Filed 01/24/22 Page 6 of 7
`
`Term
`
`Plaintiff’s Proposed
`Construction
`
`Defendants’ Proposed
`Construction
`
`Court’s Final
`Construction
`
`Plain and ordinary meaning
`
`
`Not indefinite. Plain-and-
`ordinary meaning.
`
`
`Indefinite.
`
`Although it is possible for
`POSA to identify some
`embodiments that fall within
`the scope of the claim, a POSA
`would not be reasonably
`certain of the full scope of the
`claim.
`
`
`of physical addresses
`determined by the controller”
`
`U.S. Patent No. 9,997,240,
`Claims 1, 6
`
`Proposed by Defendants
`
`#8: “wherein the controller is
`further adapted to maintain a
`count value of those blocks
`that are accessed most
`frequently and, on a periodic
`basis when the count value is a
`predetermined count value,
`transfer the contents of those
`counted blocks into the SLC
`non-volatile memory module,
`wherein the counted blocks
`transferred to after reaching
`the predetermined count value
`are determined in accordance
`with the next equivalent range
`of physical addresses
`determined by the controller”
`
`U.S. Patent No. 9,997,240,
`Claims 1, 6
`
`Proposed by Defendants
`
`
`Vervain Ex. 2012, p.6
`Micron v. Vervain
`IPR2021-01550
`
`

`

`Case 6:21-cv-00487-ADA Document 42 Filed 01/24/22 Page 7 of 7
`
`Plaintiff’s Proposed
`Construction
`Plain and ordinary meaning
`
`
`Defendants’ Proposed
`Construction
`Western Digital: Indefinite
`
`
`Court’s Final
`Construction
`Not indefinite. Plain-and-
`ordinary meaning.
`
`
`Plain and ordinary meaning
`
`
`Micron: Indefinite under IPXL
`Holdings v.
`Amazon.com.
`
`
`Not indefinite. Plain-and-
`ordinary meaning.
`
`
`Term
`
`#9: “wherein the mapping is
`performed as necessitated by
`the system to maximize
`lifetime”
`
`U.S. Patent No. 10,950,300,
`Claims 1, 12
`
`Proposed by Western Digital
`
`#10: “wherein a failure of the
`data integrity test performed
`by the controller results in a
`remapping of the address space
`to a different physical range of
`addresses and transfer of data
`corresponding to the stored
`data to those remapped
`physical addresses”
`
`U.S. Patent No. 10,950,300,
`Claims 1, 12
`
`Proposed by Micron
`
`
`
`
`Vervain Ex. 2012, p.7
`Micron v. Vervain
`IPR2021-01550
`
`

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