1111111111111111 IIIIII IIIII 1111111111 11111 111111111111111 IIIII 11111 11111 1111111111 11111111
`US 20100172180Al
`
`c19) United States
`c12) Patent Application Publication
`Paley et al.
`
`c10) Pub. No.: US 2010/0172180 Al
`Jul. 8, 2010
`(43) Pub. Date:
`
`(54) NON-VOLATILE MEMORY AND METHOD
`WITH WRITE CACHE PARTITIONING
`
`(22) Filed:
`
`Jan.5,2009
`
`Publication Classification
`
`(76)
`
`Inventors:
`
`Alexander Paley, Kfar-Saba (IL);
`Sergey Anatolievich Gorobets,
`Edinburgh (GB); Eugene
`Zilberman, Richmond Hill (CA);
`Alan David Bennett, Edinburgh
`(GB); Shai Traister, San Jose, CA
`(US); Andrew Tomlin, San Jose,
`CA (US); William S. Wu,
`Cupertino, CA (US); Bum Suck So,
`San Jose, CA (US)
`
`Correspondence Address:
`DAVIS WRIGHT TREMAINE LLP - SANDISK
`CORPORATION
`505 MONTGOMERY STREET, SUITE 800
`SAN FRANCISCO, CA 94111 (US)
`
`(21) Appl. No.:
`
`12/348,891
`
`(51)
`
`Int. Cl.
`GllC 16104
`(2006.01)
`GllC 16106
`(2006.01)
`(52) U.S. Cl. ........... 365/185.12; 365/185.11; 365/185.18
`
`(57)
`
`ABSTRACT
`
`A portion of a nonvolatile memory is partitioned from a main
`multi-level memory array to operate as a cache. The cache
`memory is configured to store at less capacity per memory
`cell and finer granularity of write units compared to the main
`memory. In a block-oriented memory architecture, the cache
`has multiple functions, not merely to improve access speed,
`but is an integral part of a sequential update block system.
`Decisions to write data to the cache memory or directly to the
`main memory depend on the attributes and characteristics of
`the data to be written, the state of the blocks in the main
`memory portion and the state of the blocks in the cache
`portion.
`
`214
`
`212
`
`210
`
`Physical Page of Data Latches
`
`Physical Page of Sense Amps
`
`BLO BL1 BL2 BL3 BL4 BL5
`
`Blm-1 Blm
`
`44
`SGD
`
`Wln
`42
`
`WL3
`
`WL2
`
`WL1
`
`WLO
`
`SGS
`44
`
`Micron Ex. 1028, p. 1
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 1 of 64
`
`US 2010/0172180 Al
`
`HOST 80
`
`'"'
`
`,.,
`
`Controller 100
`
`MEMORY SYSTEM 90
`
`Interface 110
`
`I
`
`I
`
`.
`
`~
`
`.
`
`Processor 120
`
`Optional
`CoProcessor 121
`
`ROM 122
`
`Optional
`Programmable
`Nonvolatile Memory
`124
`
`RAMnf}_
`
`I
`
`I
`
`FIG. 1
`
`Flash Memory 200
`
`Micron Ex. 1028, p. 2
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`Patent Application Publication
`
`Jul. 8, 2010 Sheet 2 of 64
`
`US 2010/0172180 Al
`
`Control
`gate
`
`10
`✓
`
`20 130
`~------
`14 ') 1 __ c_ 16
`
`Source
`
`Drain
`
`FIG. 2
`
`11011
`
`u1 n
`
`"2"
`
`11311
`
`u411
`
`"5"
`
`ft6"
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`lo
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`2.5
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`
`VcG(V)
`
`FIG. 3
`
`Micron Ex. 1028, p. 3
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`Patent Application Publication
`
`Jul. 8, 2010 Sheet 3 of 64
`
`US 2010/0172180 Al
`
`NANO STRING
`50...._
`
`Drain
`Select
`
`J
`32
`
`Drain
`L---- 56
`
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`
`Control Gate n
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`
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`
`FIG. 4A
`
`Micron Ex. 1028, p. 4
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`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 4 of 64
`
`US 2010/0172180 Al
`
`s
`ource
`Line
`
`\
`
`34
`
`1 210
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`FIG~ 4B
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`
`. . . . .
`
`Micron Ex. 1028, p. 5
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`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 5 of 64
`
`US 2010/0172180 Al
`
`214
`
`212
`
`210
`
`Physical Page of Data Latches
`
`Physical Page of Sense Amps
`
`BLO BL 1 BL2 BL3 BL4 BL5
`
`Blm-1 Blm
`
`44
`SGD
`
`Wln
`42
`
`WL3
`
`WL2
`
`WL1
`
`WLO
`
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`44
`
`' ' '
`' · 60
`l_{
`/J
`
`:..:..:..::..;.,,
`
`34
`
`FIG. 5
`
`Micron Ex. 1028, p. 6
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`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 6 of 64
`
`US 2010/0172180 Al
`
`Threshold Window
`
`I
`
`I
`
`Erased I
`~I I
`I
`I
`I
`I
`
`(;j rV, Q rV2 g rV3 Q
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`
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`
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`
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`
`(1)
`
`(2)
`
`Upper Bit J ~ Lower Bil
`
`VTH
`
`...
`
`Programming into four states represented by a 2-bit code
`
`FIG. 6
`
`Micron Ex. 1028, p. 7
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`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 7 of 64
`
`US 2010/0172180 Al
`
`# of Cells
`
`Upper Bit ~ ~ Lower Bit
`"01"
`"1 O"
`
`"11"
`
`"00"
`
`,..__....._ _ _._ _ _ _ _ _ _._ _
`
`___.__ ......... ___._ _
`
`Ds
`
`De
`__,...._--1----1, _ _ ...1,,__~vr
`
`Threshold Voltage
`
`Multistate Memory
`FIG. 7A
`
`# of Cells ~
`"11"
`"XO"
`
`Lower Page Programming (2-bit Code)
`FIG. 7B
`
`~
`"Intermediate"
`# of Cells ~
`"11"
`"01"
`"1 O"
`
`"00"
`
`Upper Page Programming (2-bit Code)
`FIG. 7C
`
`Micron Ex. 1028, p. 8
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`IPR2021-01549
`
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`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 8 of 64
`
`US 2010/0172180 Al
`
`Upper Bit ~ r Lower Bit
`"1 O"
`"01"
`
`"11"
`
`"00"
`
`Lower Bit = "O"
`
`Lower Page Read (2-bit Code)
`
`FIG. 7D
`
`Upper Bit = "O"
`Os
`
`Upper Bit = "O"
`De
`
`"11"
`
`"01"
`
`"10"
`
`"00"
`
`Upper Page Read (2-bit Code)
`
`FIG. 7E
`
`Micron Ex. 1028, p. 9
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`IPR2021-01549
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`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 9 of 64
`
`US 2010/0172180 Al
`
`HOST 80
`
`Application
`
`~
`
`-
`
`,,..
`
`OSI
`File System
`
`Clusters(Logical sectors)
`
`'
`
`Host-side Memory Manager (Optional)
`
`'"
`
`Logical sectors
`
`MEMORY SYSTEM 90
`
`,1, Memory Manager 300
`
`Front-End System 310
`
`( Host Interface y12
`1
`
`Back-End System
`320
`
`Flash Memory
`200
`
`~
`
`~
`
`-
`
`,,..
`
`FIG. 8
`
`Micron Ex. 1028, p. 10
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`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 10 of 64
`
`US 2010/0172180 Al
`
`Host Interface
`...
`
`Back-End System 320
`
`340
`
`Media Management Layer
`
`Dataflow & Se1 uencing/Cayer
`
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`
`330
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`346
`
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`....
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`.
`7'
`
`FIG. 9
`
`Micron Ex. 1028, p. 11
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`IPR2021-01549
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`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 11 of 64
`
`US 2010/0172180 Al
`
`Logical Group
`
`(i)
`
`LGd 0 I 1 I ...
`
`k I k+1 I
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`FIG. 10A
`
`Logical Group
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`380 .-------.
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`Physical Group
`(Meta block)
`
`370
`
`MBo
`
`Logical to
`Physical
`Directories
`
`FIG. 10B
`
`Micron Ex. 1028, p. 12
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`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 12 of 64
`
`US 2010/0172180 Al
`
`H
`0
`s
`t
`
`D
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`Partition 0
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`LBAs
`
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`310
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`Partition Manager
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`Logical Groups
`
`# LG, Offset
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`380
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`
`Meta-blocks
`
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`Abstraction
`level
`
`370 6
`360 60
`
`DDD □ DD □ D
`
`Physical
`level
`
`FIG. 11
`
`Micron Ex. 1028, p. 13
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`IPR2021-01549
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`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 13 of 64
`
`US 2010/0172180 Al
`
`Bank 0
`
`Plane 1
`
`Block
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`__.,,.,
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`FIG. 12
`
`Micron Ex. 1028, p. 14
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`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 14 of 64
`
`US 2010/0172180 Al
`
`BankO
`Plane 1
`Plane 0
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`FIG. 13
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`Micron Ex. 1028, p. 15
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`IPR2021-01549
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`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 15 of 64
`
`US 2010/0172180 Al
`
`EEC Page 0
`(Subpage)
`
`EEC Page 1
`(Subpage)
`
`2062 + N Bytes
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`2062 + N Bytes
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`EEC Page 3
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`
`DATA PAGE
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`FIG. 14A
`
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`Data
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`14 Bytes
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`FIG. 14B
`
`Micron Ex. 1028, p. 16
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`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 16 of 64
`
`US 2010/0172180 Al
`
`0
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`Micron Ex. 1028, p. 17
`Micron v. Vervain
`IPR2021-01549
`
`

`

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`Micron Ex. 1028, p. 18
`Micron v. Vervain
`IPR2021-01549
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`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 18 of 64
`
`US 2010/0172180 Al
`
`Dataflow and Sequencing Module
`
`Media Management Module
`
`~
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`
`FIG. 17
`
`Micron Ex. 1028, p. 19
`Micron v. Vervain
`IPR2021-01549
`
`

`

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`MLC Update Blocks
`
`•< :.;<:){::Ila•\(::
`
`·· ··· · ··•··.•> •· .. ,<,. <.<I
`
`Logical Partition B
`
`./•.· ... ·•>•·· ·····
`
`l•h~A:o.'..: ·<><
`
`··•· ···· ···. · •· ... •.•·•\/<,i·••···•.·••••·i:--•\· :·•>·••·I
`
`.. ·.
`
`l•L13~Q:./ /!···<·. · ····
`
`Logical Partition A
`
`> 1 ·. :>t I>><
`MLC Intact Blocks
`
`FIG. 18
`•
`
`W,LJ
`
`I + Q
`
`I
`I
`I
`I
`
`I
`I
`I
`I
`
`I
`I
`t
`t
`
`, Bmary ln,act Blocks
`I
`I
`
`. I
`I
`
`1
`I
`I
`
`Binary Up~ate Blocks
`
`+-
`
`+-
`
`I
`
`I
`I
`
`t
`I
`I
`I
`
`1
`I
`I
`
`t
`t
`
`I
`I
`I
`
`~-1
`I
`I
`I
`t
`I
`I
`I
`J
`
`' m -G)
`
`:ii:
`
`.c
`.2
`.lo: u
`
`CJ)
`
`r
`r-1
`
`,--,
`
`~-1
`I
`I
`I
`I
`I
`I
`1 J: I
`1 O t
`I 1ij 1
`IC I
`J m I
`i,!!! I
`I
`I
`I
`I
`I
`I
`
`Micron Ex. 1028, p. 20
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 20 of 64
`
`US 2010/0172180 Al
`
`Host
`
`0
`
`Binary Cache
`
`204
`
`Meta-block 202
`
`Meta-block write from Binary Cache
`
`Q)
`Binary Cache write from host
`@ Meta-block write from host
`0
`©
`@
`Binary Cache block management
`@ Meta-block write management
`Ci) Meta-block management
`
`Binary Cache write management
`
`FIG. 19
`
`Micron Ex. 1028, p. 21
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 21 of 64
`
`US 2010/0172180 Al
`
`Start
`
`400
`
`Yes
`
`No
`
`421
`
`No
`
`To Binary
`Cache
`
`(Continued in FIG. 20B)
`
`FIG. 20A
`
`431
`
`To Main
`Memory
`
`Micron Ex. 1028, p. 22
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 22 of 64
`
`US 2010/0172180 Al
`
`To Binary
`Cache
`
`421
`
`(Continued from FIG. 20A)
`
`No
`
`Yes
`
`No
`
`To Main
`Memory
`
`431
`
`418
`
`ent and
`sequential
`
`Yes
`
`pdate blo
`in near Ii
`
`No
`
`No
`
`420
`
`Write to
`Binary
`Cache
`
`430
`
`Write to Update Block
`in Main Memory
`
`FIG. 20B
`
`Micron Ex. 1028, p. 23
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`CIO
`
`-...J
`
`FIG. 21B
`
`FIG. 21A
`
`CJ New data
`
`[ill New data
`
`~
`N
`.....
`rJJ =(cid:173)
`
`('D
`('D
`
`0 ....
`
`.i;...
`O'I
`
`0 ....
`
`N
`~CIO
`
`0
`
`~ .....
`
`(')
`
`2' :--
`.... 0 =
`.... 0 = ""O = O" -....
`('D = ..... t "e -....
`
`~ .....
`
`(')
`
`~ .....
`""O
`
`28 29 2A .:.:.:.~
`
`~ 15.~: :~A :l:O:~:rnE
`48 49 4A
`
`8 9 A ... F
`
`... . . . . . .
`150: 5:1: :52: ... 5l
`40 41 42
`... 47
`20 21 22 ... 27
`... 7
`0 1 2
`
`..,.:.....::,,..,:_
`
`-
`
`(Main Memory)
`MLC
`
`l:$0:I
`
`Binary Cache
`
`Binary Cache
`
`:5$:
`
`Host write: 50-60
`
`Host write: 50-58
`
`28 29 ~A ···@f
`
`48 49 4A ... 4F
`
`... F
`
`40 41 42 ::: :if1
`:~◊-pf :~~:
`20 21 22
`0 1·2 ___ -=r 8 9 A
`
`(Main Memory)
`MLC
`
`···~
`
`Micron Ex. 1028, p. 24
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`CIO
`
`--.J
`
`0 ....
`
`.i;...
`O'I
`
`.i;...
`N
`.....
`rJJ =(cid:173)
`
`('D
`('D
`
`FIG. 22B
`
`Binary Cache to MLC
`
`[] Data copied from
`
`New data
`
`FIG. 22A
`
`ILJ Newdata
`
`2'
`.... 0 =
`"-= = O" -....
`.... 0 =
`('D = ..... t "e -....
`
`~ .....
`
`(')
`
`~ .....
`
`(')
`
`"-= ~ .....
`
`N
`~CIO
`:-'
`
`0 ....
`
`0
`
`·sa :59: ... SE 5F
`,5,0,;5)/ 5 · ... 57:
`40 41 42 ... 47 48 49 4A ... 4F
`20 21 22 ... 27 28 29 2A ... ·2F
`0 1 2
`8 9 A ... F
`
`l-,,:,_L..:::.
`
`~-'-•-'
`
`.
`
`.
`
`.. ·· ~
`
`. . 2
`
`.... 7
`
`(Main Memory)
`MLC
`
`(Main Memory)
`MLC
`
`-~--
`48 49 4A ... 4F
`28 29 2A ... 2F
`8 9 A ... F
`
`-
`
`20 21 22 ... i
`
`0 1 2 ... 7
`
`40 41 42 ... 47
`
`:5;4:},55J56J57::
`
`,.
`Binary Cache 58' ,sfit-.?
`5(j:'.5J:52
`
`6-0
`
`Host write: 5F-60
`
`I IMl!:15156(571
`
`Binary Cache 150151 l52l53I
`
`Host write: 54-57
`
`Micron Ex. 1028, p. 25
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 25 of 64
`
`US 2010/0172180 Al
`
`Binary
`Cache
`Capacity
`
`•
`
`•
`
`•
`
`•
`
`•
`
`I
`
`I
`
`•
`
`I
`
`I
`
`I
`
`I
`
`•
`
`I
`
`I
`
`•
`
`I
`
`•
`
`I
`
`I
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`t
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`t
`•
`
`"
`
`4
`
`4
`
`I
`
`I
`
`I
`
`~
`
`I
`
`"
`
`I
`
`I
`
`I
`
`I
`
`"
`
`..
`I
`
`II
`
`"
`
`II
`
`I
`
`"'
`
`It
`
`.... " ..
`........
`.......
`
`"
`..
`•
`•
`•
`I
`• • • • • ■•
`•
`I
`•
`•
`..
`I
`
`Unwritten
`Capacity
`
`Obsolete Data
`
`I
`
`I
`
`I
`
`I
`
`~
`
`I
`
`I
`
`I
`
`I
`
`I
`
`I
`
`II
`
`II
`
`Valid Data
`
`II
`
`II
`
`I
`
`I
`
`t ••II"
`•
`•
`•
`"
`t ++"It
`II
`II
`I
`I
`II
`•
`"
`"
`■ . . . . . ■•
`t + "
`I
`I
`•
`■ • • • • • •
`• + 9
`II
`I
`I
`■ . . . . . . ..
`It
`I
`II
`•
`,.
`~
`■ . . . . . . ..
`
`FIG. 23
`
`Micron Ex. 1028, p. 26
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`CIO
`
`-....J
`
`0 ....
`
`O'I
`N
`.....
`rJJ =(cid:173)
`
`('D
`('D
`
`.i;...
`O'I
`
`0 ....
`
`N
`~CIO
`
`0
`
`2' :-'
`.... 0 =
`.... 0 = ""O = O" -....
`~ "e -....
`('D = .....
`~ .....
`""O
`
`~ .....
`
`(')
`
`~ .....
`
`(')
`
`FIG. 24
`
`Logical Group
`
`-----
`
`z __j ------------excluded after a write to other
`
`Logical Group x will not be
`
`Write to logical group
`
`to another logical group
`
`consolidation until there is a write access
`
`Logical Group x will be excluded from
`
`a
`X
`
`X
`y
`X
`
`BC Consolidation for logical group
`Write to logical group
`
`Write to logical group
`BC Consolidation for logical group
`Write to logical group
`
`consolidation "tracked"
`Logical Group x that results in BC
`
`Time
`
`Micron Ex. 1028, p. 27
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`QO
`
`-....J
`
`FIG. 25B·
`
`FIG. 25A
`
`data
`
`-Obsolete
`
`0 ....
`
`.i;...
`O'I
`
`-....J
`N
`...,..
`rJJ =(cid:173)
`
`('D
`('D
`
`0 ....
`
`0
`
`N
`QO
`
`~
`
`~ = :-
`(') a .... 0 =
`(') a .... 0 = ""O = O" -....
`~ "e -....
`""O a ('D = ...,..
`
`~
`
`...
`
`1,,,,,,,,,,,,,,,,,,,,,,,
`
`...
`...
`·--
`38 39 3A ... 3F
`18 19 1A ... 1F
`
`...
`...
`
`. ..
`. ..
`
`...
`. ..
`
`l"'"I'""'""
`
`I
`
`I
`I
`
`• • •
`
`!
`
`• • •
`
`I
`
`• • ~
`
`I ... ~
`
`30 31 32 ... I 37
`l"af ,,,,1
`
`...
`4F'
`2F
`
`...
`
`.. .
`
`...
`...
`48 49 4A ...
`28 29 2A ...
`8 9 A.
`
`~
`
`,_ . .,_,
`
`.. . ...
`...
`42 ... 47 ---
`22 ... 27
`2
`... 7
`
`~
`
`MLC
`
`...
`. ..
`40 41
`20 21
`0 1
`
`I I~~
`
`Bank 1
`
`1
`
`101111
`
`IC □IEIFI II'----
`
`BankO
`
`Cache
`Binary
`
`Host: C-11
`
`Micron Ex. 1028, p. 28
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 28 of 64
`
`US 2010/0172180 Al
`
`Parameter
`
`Description
`
`Value
`
`Unit
`
`Binary Cache valid data limit for host data
`write to the Binary Cache
`(sBCBPartialPageOnlyStartPercent)
`
`Binary Cache valid data limit for normal
`archiving to meta-block
`(sBCBCleanupStartPercent)
`
`Index entry limit for a Logical Group
`(sBCBLgCleanupStartPercent)
`
`Maximum logical groups with update blocks
`
`Maximum update blocks per logical group
`
`Maximum logical groups with multiple update
`blocks
`
`Maximum forward LBA jump in update block
`
`Maximum length of short sequential write
`segment
`
`A
`
`B
`
`C
`
`D
`
`E
`
`F
`
`G
`
`H
`
`J
`
`K
`
`M
`
`T
`
`85
`
`%
`
`80
`
`70
`
`10
`
`2
`
`10
`
`Length
`of meta-
`block
`Length
`of meta-
`block
`
`%
`
`%
`
`logical
`arouos
`Meta-
`blocks
`logical
`groups
`
`LBAs
`
`sectors
`
`Meta-
`page
`
`%
`
`Short Forward Jump parameters (metapage)
`
`1
`
`Binary Cache Valid Data limit for idle time
`archiving
`
`Length of the MRU list used for Idle Time
`Archiving
`
`32
`
`Idle time after the last write command before
`idle time archiving may start
`
`~LS
`
`w
`
`Bias/weight given to logical group without
`update block for data archiving logical group
`selection. (s0penUpdateNum2KWeight)
`
`256
`
`2k
`Entries
`
`FIG. 26
`
`Micron Ex. 1028, p. 29
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 29 of 64
`
`US 2010/0172180 Al
`
`Name
`
`Description
`
`Logical Group number
`
`Logical Group that this fragment belongs to.
`
`Sector offset in LG
`
`Sector in LG that this fragment belongs to.
`
`Length
`
`Length of the fragment in sectors.
`
`UbOverwirteFlags
`
`Markers to determine if fragment overwrites Update
`Block
`
`Partial Description of Fragment header
`
`FIG. 27
`
`Name
`
`Description
`
`Lg Info (variable size up to 64 entries)
`
`Logical group id, start sector, size (in
`sectors) of a fragment.
`
`BC I Di rectory
`(fixed size,
`@ the end of an
`ECC Page)
`
`BcB locks[32]
`
`Logical group id, start sector, size (in
`sectors) of a fragment.
`
`BciDirectory[128]
`
`Location of all valid BCI records and
`start LG for each record.
`
`Partial Description of BCI
`
`FIG. 28
`
`Micron Ex. 1028, p. 30
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`QO
`
`-....J
`
`0
`~
`.....
`rJJ =(cid:173)
`
`('D
`('D
`
`0 ....
`
`.i;...
`O'I
`
`0 ....
`
`0
`
`N
`QO
`
`~
`
`~ = :-
`(') a .... 0 =
`(') a .... 0 = ""O = O" -....
`~ "e -....
`""O a ('D = .....
`
`FIG. 29
`
`Partial Description of logical address range in Binary Cache
`
`~
`
`~
`
`LG last
`
`BCI 1 for Zone 1
`
`BCI O for Zone 1
`
`BCI 3 for Zone 0
`
`BCI 2 for Zone 0
`
`BCI I for Zone 0
`
`BCI O for Zone 0
`
`,
`
`.
`
`s
`I
`C
`B
`
`s
`
`I
`C
`B
`
`s
`e
`11
`
`o·
`z
`
`1ge
`ddress
`
`ra
`Full a
`
`LG 0
`
`Micron Ex. 1028, p. 31
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 31 of 64
`
`US 2010/0172180 Al
`
`"1f
`
`/
`
`/
`
`/
`
`/
`
`/
`
`/
`
`/
`
`/
`
`/
`
`/
`
`j.
`I
`I
`f
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`
`1/)
`Q)
`(.)
`"Cl
`C
`
`Q)
`.s::
`(.)
`cu
`u
`c:-
`
`('Cl
`C:
`Ill
`
`Q)
`C:
`0
`N
`Q)
`.s::
`(.)
`cu
`u
`~
`cu
`C:
`Ill
`
`/
`
`..,--
`+
`><
`C)
`_J
`
`@]
`I
`
`--------♦
`
`M
`C)
`...J
`
`T""
`Q)
`C:
`0
`N
`Q)
`.s::
`(.)
`('Cl u
`N
`~ (9
`('Cl
`C:
`Ill
`
`_J
`
`,....
`C)
`_J
`
`--------♦
`
`a
`C)
`_J
`
`--------♦
`
`c::,
`c.,
`•
`(.'J
`u:
`
`C
`
`0
`
`u
`co
`
`M
`u
`co
`
`..,--
`u
`co
`
`0
`
`u
`co
`
`Micron Ex. 1028, p. 32
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 32 of 64
`
`US 2010/0172180 Al
`
`Use cached BCI Directory to locate BCI
`
`Load BCI into RAM if not already present
`
`450
`
`452
`
`No
`
`Yes
`
`agment da
`ts> addre
`
`No
`
`Return data pointer, sector & length
`
`Return False
`
`460
`
`458
`
`FIG. 31
`
`Micron Ex. 1028, p. 33
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 33 of 64
`
`US 2010/0172180 Al
`
`Prag LG 0
`
`Prag LG 1
`
`BCI 1
`
`Prag LG 10
`
`BCI 2
`
`FIG. 32
`
`PragLG 0
`
`PragLG 1
`
`BCl 1
`
`BCI 2
`
`FragLG 2
`
`BCI 3
`
`FIG. 33
`
`Micron Ex. 1028, p. 34
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 34 of 64
`
`US 2010/0172180 Al
`
`Transaction
`#
`
`Data
`LG#(sector range)
`
`BCI
`LG#(sector range)
`
`1
`
`2
`
`3
`
`4
`
`LG0(0-1)
`
`LG0(2-3)
`
`LG0(4-5)
`
`LG0(1-2)
`
`LG0(0-1)
`
`LG0(0-1) LG0(2-3)
`
`LG0(0-1) LG0(2-3) LG0(4-5)
`
`LG0(0}
`
`LG0(1~2) LG0(3) LG0(4-5)
`
`FIG. 34
`
`Micron Ex. 1028, p. 35
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`CIO
`
`-....J
`
`Ul
`~
`.....
`rJJ =(cid:173)
`
`('D
`('D
`
`0 ....
`
`.i;...
`O'I
`
`N
`~CIO
`:-'
`
`0 ....
`
`0
`
`2'
`.... 0 =
`.... 0 = ""O = O" -....
`('D = ..... t "e -....
`
`~ .....
`
`(')
`
`~ .....
`
`(')
`
`~ .....
`""O
`
`FIG. 35
`
`Fr
`
`LG 99
`
`Fragments
`
`LG 0
`
`LG 0
`
`New BC! is instantly full and in
`99.
`
`Complet< adding fragment to LG j
`I LG 100 I Fr
`
`LG i 00
`
`...
`
`I
`
`Fragments
`
`I LG 0
`
`LG 0
`
`Split operation
`
`2nd new BCI
`
`1 ,L new BCI
`
`LG 100 I Fr
`
`Fragments
`
`LG 0
`
`Original BCI
`
`there is no space in original BCT
`Adding fragment to LG99 requires split operation because
`
`Micron Ex. 1028, p. 36
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 36 of 64
`
`US 2010/0172180 Al
`
`For Each BCI
`For Each LG in BCI
`For Each fragment in LG
`If Fragment exists in target physical block
`Copy fragment to destination block
`Update cached BCIRecord
`
`Erase target block
`
`Binary Cache compaction pseudo code
`
`FIG. 36
`
`In most recent BCI
`For Each BCI in referenced in BCI Directory
`lf BCl contains references to BCI with target LG
`Load BCI from reference.
`For Each fragment in LG
`If Fragment in target physical block
`Copy fragment to destination block
`Update cached BCIRecord
`
`Erase target block
`
`Optimized Binary Cache compaction pseudo code
`
`FIG. 37
`
`Load SCI into memory.
`Transfer the Lg Info of this BCI into separate memory.
`Load adjacent BCI into memory.
`If the 2 blocks will fit into a single sector, merge them.
`Update the BCI.
`
`Steps to merge a BC I record
`
`FIG. 38
`
`Micron Ex. 1028, p. 37
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 37 of 64
`
`US 2010/0172180 Al
`
`BC asks UM evict a logical group.
`UM responds by reading the contents of entire the LG range and storing in
`Update Block
`UM issues an obsolete command for the Logical Group.
`
`Logical Group Eviction
`
`FIG. 39
`
`If LG exists in BC
`If area to be obsoleted covers entire range of LG in BC
`Remove LG from BCI.
`If BCI now contains no LGs
`Consider BCI deletion
`If LG is first in BCI
`Consider adjustment of start index of BCI
`
`Else
`
`For each sector to be made obsolete check for fragment
`If fragment exists
`Remove ref to fragment in BCI
`
`Pseudo code of BC Obsolescence
`
`FIG. 40
`
`For every BCI that gets loaded into memory
`For every LG in BCI
`Sum the size of each fragment in LG (from BCI, not frag)
`
`If largest LG in BCI > stored largest LG details
`Replace largest LG in memory details
`
`Physically largest LG
`
`FIG. 41
`
`Micron Ex. 1028, p. 38
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 38 of 64
`
`US 2010/0172180 Al
`
`Compaction will be run on physical blocks which have a high quantity of
`obsolete data.
`- Blocks with large amounts of obsolete data will tend to be 'old'
`- Compaction moves data to the start of a new physical block
`- Compaction will tend to be run as often as possible before the oldest LG
`needs to be determined, as this tends to be used for LG eviction.
`
`Old LG deduction
`
`FIG. 42
`
`Search physical block for last BCI record
`
`If BCI Ml version != current Ml version
`Update of update block correction may be required.
`See BC-UM Initialisation.doc
`
`If BC I location != last written page
`// non indexed fragments exist.
`Read forwards, generating BCI for these fragments.
`
`Initialization procedure
`
`FIG. 43
`
`Micron Ex. 1028, p. 39
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 39 of 64
`
`US 2010/0172180 Al
`
`BC Fragments
`
`I Sector O I Sector 1 I O :
`
`Update Block in Main Memory
`.
`-
`
`Page 0
`
`FIG. 44A
`
`BC Fragments
`
`Sector 0 Sector 1 0
`Sector 4 Sector 5 o-
`
`Page 1
`
`Page 2
`
`Page 3
`
`Page 4
`
`Update Block
`
`~
`
`__;,,
`
`Page 0
`
`Page 1
`
`Page 2
`
`Page 3
`
`Page4
`
`FIG. 44B
`
`BC Fragments
`
`Update Block
`
`Sector 4 Sector 5 O
`
`Page 1
`
`Page 2
`
`Page 3
`
`Page4
`
`FIG. 44C
`
`Micron Ex. 1028, p. 40
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 40 of 64
`
`US 2010/0172180 Al
`
`BC Fragments
`
`Update Block
`
`·.·.· ._._._._. ·.·.·
`. . . . . . . . . . .
`
`;r~Q¢= 4 (1r~t~rJ
`Page 3 (erased)
`
`Page 4 (erased)
`
`FIG. 45A
`
`Update Block
`
`: : !Pij~! q :(*~~t~h{
`
`BC Fragments
`
`Sector O Sector 1 3
`
`Sector 4 Sector 5 3
`
`•
`•
`• • '
`
`,
`
`0
`0
`' ' •
`
`•
`
`•
`
`•
`
`•
`
`r
`
`•
`
`•
`
`r
`
`r
`
`•
`
`•
`
`•
`
`•
`
`•
`
`•
`
`Page 3 (erased)
`
`Page 4 (erased)
`
`FIG. 45B
`
`BC Fragments
`
`Update Block
`
`Sector 1 O Sector 11 Sector 12 Sector 13 3
`
`Page 3 (erased)
`
`Page 4 (erased)
`
`FIG. 46
`
`Micron Ex. 1028, p. 41
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 41 of 64
`
`US 2010/0172180 Al
`
`. - . . . . . . . . . . . . . . .
`
`.
`
`: ::~1ge:p:cfrit~~n1! i_ ::m~~~):(~ritt~tj)::
`: \if~~f2:i<R~~~#r~t • ::faij~:s:~ftl1~rH
`: \ A~ij~ f ~W,rit~tj) :
`: \F~9~ \7\ ~Wt/tt6=1)l!
`
`: : . : : •,:. :-:-·-:-: :-:•.
`
`. . . . . . ' ..... .
`.
`. . .
`. ' . . . . . . .
`. .
`. .
`. . .
`.
`
`Page 8 { erased)
`
`Page 9 (erased)
`
`Page 10 (erased) Page 11 (erased)
`
`Page 12 (erased) Page 13 (erased)
`
`Page 14 (erased) Page 15 (erased)
`
`FIG. 47A
`
`BC Fragments
`
`I Sector O I Sector 1 I a
`
`. '-· · . . . . . . .
`: P~~~ o:{wdh~H
`
`::::::•·::: :::: :-::,::·:·
`
`Page 8 (erased)
`
`Page 9 (erased)
`
`Page 10 {erased) Page 11 (erased)
`
`Page 12 (erased) Page 13 (erased)
`
`Page 14 (erased) Page 15 (erased)
`
`FIG. 47B
`
`Micron Ex. 1028, p. 42
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`CIO
`
`-....J
`
`0 ....
`
`.i;...
`O'I
`
`N
`.i;...
`.....
`rJJ =(cid:173)
`
`('D
`('D
`
`0 ....
`
`N
`~CIO
`
`0
`
`2' :-'
`.... 0 =
`.... 0 = ""O = O" -....
`~ "e -....
`('D = .....
`~ .....
`""O
`
`~ .....
`
`(')
`
`~ .....
`
`(')
`
`Page 9 (erased)
`
`Page 8 (erased)
`
`Page 7 (erased)
`
`Page 6 (erased)
`
`Page 4 (erased)
`Page 5 (erased)
`: : : : : : . : : : : : : : : : ~ : : : : : : : : : : : : : :
`-:-:-:-:-:-:-:--:-:-:-:-:-:-:-:
`--~-----··--··
`: p~g$: Si ~wrlti¢H ):
`lJf ::::~:Z tWr~tih):
`·.·.·.·=·=·=·=· -:■:•.•:•.·.·.·.
`:::::::::::::: :::::::::::::::
`:::::~::: :; ;.::;:;:;:;=;:;:
`~p~gJ~o cWhdJhJ : ·.·.·.·.· .. · •,·,•.-.... ,• .. ·.-.
`P~::~ 1 iwtitt~~):
`
`•,•,•,•,•,•.•++.•.· •:•.•.•:•:•
`
`:
`
`FIG. 47C
`
`Page 14 (erased) Page 15 (erased)
`
`Page 14 (erased) Page 15 (erased)
`
`Page 12 (erased) Page 13 (erased)
`
`Page 12 (erased) Page 13 (erased)
`
`Page 1 O (erased) Page 11 (erased)
`
`Page 10 (erased) Page 11 (erased)
`
`:
`
`t
`
`:
`
`•
`
`:
`
`:
`
`:
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`:
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`:
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`:
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`:
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`:
`
`:
`
`:
`
`~ :
`
`:
`
`:
`
`:
`
`: -~
`
`: ·:":' :":' : :": :
`
`:
`
`:
`
`: : : : : ; : : : : : : : : : : : : : : : : : : . : . : . :-:
`. ·-:-:-:-:-:-:-:-· .... ·.·
`
`UB#1
`
`UB#O
`
`-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-1-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-
`
`Page 8 (erased) I Page 9 (erased)
`:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-1-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:
`.............. ' ... ' ....... ' ...... .
`: p~g$ :~: Kw.titwh}:: :I::: :P~g~l? l<wf~t~hl:
`::::::::::::::::::::::::::::::::::1::::::::::::::::::::::::::::::::::
`~ :r~Q ~1 P: :n1r~~~#rt
`-----. -..... -. -... ------. ---------I ----------------------------------
`:p~g$:4:KWrlt~tjf
`P~~~ii (wdi~~~)!
`:!::;:::::;:;:: :;;:;::::::::::
`!iP~e:!3 (written)
`: :~~Q#1 t :Nfr~~~#~;
`P~ri~ Jf (wdt~~hi:
`
`:::::::::::::-:-:-:-:-:-:-:-:-:-
`.·.·.·.·.·.:-:-:-:-:-:-:-:-:-:-
`
`·,•.•··························
`
`"
`
`,___:_~_:_.,_:_ I
`
`•
`
`t
`
`t
`
`I O
`
`•
`
`I
`
`I
`
`I
`
`t
`
`•
`
`•
`
`t
`
`t
`
`•
`
`I
`
`•
`
`t
`
`t
`
`•
`
`L
`
`t
`
`•
`
`Micron Ex. 1028, p. 43
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 43 of 64
`
`US 2010/0172180 Al
`
`UM scans the FBL for all UBs for all LGs. Doesn't look inside the UBs.
`
`Load the most recent BCI for the given LG into RAM
`
`Search forward from the BCI to find fragments that were written since the last
`BCI was dumped.
`
`For each unreferenced fragment
`{
`
`// These fragments will be valid since a BCI dump occurs before every
`
`UoU
`
`Obtain the GAT entry for the fragment from the UM.
`Update the BCI.
`}
`
`UM-BC Initialization
`
`FIG. 48
`
`BC saves current dirty BCI.
`
`UM selects and erases new UB from FBL.
`
`Data written to latest UB.
`
`BC informed of write operation.
`
`Update of Update Operation
`
`FIG. 49
`
`Micron Ex. 1028, p. 44
`Micron v. Vervain
`IPR2021-01549
`
`

`

`Patent Application Publication
`
`Jul. 8, 2010 Sheet 44 of 64
`
`US 2010/0172180 Al
`
`If UB for LG not initialised
`Search for NextErasedPage in UB
`
`BC access
`If UB GAT != BCI GAT for LG
`// an update of updates has occurred
`Obsolete fragments from UB GAT PageTag to UB
`NextErasedPage
`dirty BCl's GAT = UB GAT
`
`, Else If UB NextFreePage > BC NextFreePage
`// The UB has been updated but a write abort occurred before an
`// obsolete command and BCI dump could occur.
`Obsolete fragments from GAT PageTag to UB NextErasedPage
`BC NextFreePage = UB NextFreePage
`
`Initialization procedure
`
`FIG. 50
`
`Micron Ex. 1028, p. 45
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`QO
`
`-....J
`
`0 ....
`
`Ul
`.i;...
`.....
`rJJ =(cid:173)
`
`('D
`('D
`
`.i;...
`O'I
`
`0 ....
`N
`~
`
`0
`
`FIG. 51A
`
`Example of Update of Update
`
`Page 14 (erased) Page 15 (erased)
`
`Page 12 (erased) Page 13 (erased)
`
`Page 10 (erased) Page 11 (erased)
`
`Page 9 (erased)
`
`Page 8 (erased)
`
`PT= Page Tag
`10 = Block ID
`NEP = Next Erased Page
`
`2' :-'
`.... 0 =
`.... 0 = ""O = O" -....
`~ "e -....
`('D = .....
`~ .....
`""O
`
`~ .....
`
`(')
`
`~ .....
`
`(')
`
`:::::::::: :::::::::::::::::::
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`:
`
`~ :
`
`: ~
`
`:
`
`: ~ :
`
`:
`
`:
`
`:
`
`:
`
`ffl~~~ f (f M~en
`#:J~¢ $~ \(w~~~~i
`#:~~~ s\w~itten)
`:p6~J 1 i(w~~~H)
`
`:-:-:-:-:< :-<< :<: ~.;-:
`
`UB#2
`
`ie~~ ~ ;~ cJ;m;g)
`w~ci~>~ rwdt#~)tjf
`r#:~d$ :11wdtt¢~)
`R~~~::q cvhHt~~)
`
`<<-:-:-:::-: :-:-:-:-:-:-:-:
`
`: : : ' : : _: __ :_ : .. :.: : : ~ : : : : : : : : : : -: : : :
`
`. . . .
`
`:
`
`:
`
`:
`
`:
`
`.
`.
`: : + ~
`
`.
`
`:
`
`:
`
`.
`
`:
`
`:
`
`.
`
`: • :
`
`.
`
`: . :
`
`.
`
`: :_: _: _:
`
`:
`
`.
`
`:
`
`:
`
`.
`
`:
`
`:
`
`.
`
`:
`
`:
`
`.
`
`:
`
`.-.-:-:-:-:.:.:,: :-:-:-:-:-:-:-:
`
`'
`NEP=8 10=2
`
`'
`
`PT=0
`
`0, 1,22,23
`Sectors
`
`BCI
`
`NEP=8
`
`Sector 22 I Sector 23
`
`NEP=8
`
`Sector 0 I Sector 1
`
`BC Fragments
`
`Micron Ex. 1028, p. 46
`Micron v. Vervain
`IPR2021-01549
`
`

`

`> ....
`N ....
`0 --- 0 ....
`0 ....
`N
`rJJ
`c
`
`0
`CIO
`
`-....J
`
`FIG .. 51B
`
`Example of Update of Update
`
`0 ....
`
`O'I
`.i;...
`.....
`rJJ =(cid:173)
`
`('D
`('D
`
`.i;...
`O'I
`
`0 ....
`
`N
`~CIO
`
`0
`
`2' :-'
`.... 0 =
`.... 0 = ""O = O" -....
`('D = ..... t "e -....
`
`~ .....
`
`(')
`
`~ .....
`
`(')
`
`~ .....
`""O
`
`Page 14 (erased) Page 15 (erased)
`
`Page 12 (erased) Page 13 (erase