Micron Technology, Inc.
`Petitioner
`v.
`Vervain, LLC
`Patent Owner
`
`Case No. IPR2021-01549
`U.S. Patent No. 9,997,240
`
`Micron’s Hearing Demonstratives
`
`January 12, 2023
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`IPR2021-01549
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`1
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`Micron Ex. 1070, p. 1
`Micron v. Vervain
`IPR2021-01549
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`
`Petitioner
`v.
`Vervain, LLC
`Patent Owner
`
`Case No. IPR2021-01549
`U.S. Patent No. 9,997,240
`
`Micron’s Hearing Demonstratives
`
`January 12, 2023
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`IPR2021-01549
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`1
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`Micron Ex. 1070, p. 1
`Micron v. Vervain
`IPR2021-01549
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`
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`Roadmap
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`1. The IPR 240 Grounds
`2. The 240 Patent
`3. Claim Construction: “Blocks”
`4. The Dusija in view of Sutardja Grounds
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.F] Fail
`C. POR Arguments Against Limitation [1.G] Fail
`i.
`Sutardja in view of Dusija: Individual Count Interpretation
`ii. Sutardja in view of Dusija: Collective Count Interpretation
`5. The Dusija in view of Sutardja and Chin Ground
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.G] Fail: Collective Count Interpretation
`6. PO’s Baseless Attacks Against Dr. Liu
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`Micron Ex. 1070, p. 2
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`Roadmap
`
`1. The IPR 240 Grounds
`2. The 240 Patent
`3. Claim Construction: “Blocks”
`4. The Dusija in view of Sutardja Grounds
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.F] Fail
`C. POR Arguments Against Limitation [1.G] Fail
`i.
`Sutardja in view of Dusija: Individual Count Interpretation
`ii. Sutardja in view of Dusija: Collective Count Interpretation
`5. The Dusija in view of Sutardja and Chin Ground
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.G] Fail: Collective Count Interpretation
`6. PO’s Baseless Attacks Against Dr. Liu
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`Micron Ex. 1070, p. 3
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`240 Instituted Grounds
`
`• Dusija in view of Sutardja ground:
`- Claims 1-2 and 6-7 are obvious over Dusija and Sutardja in view of the knowledge of a POSA (ground 1).
`
`• Dusija in view of Sutardja and Chin ground:
`- Claims 1-2 and 6-7 are obvious over Dusija, Sutardja, and Chin in view of the knowledge of a POSA
`(ground 2).
`- Chin adds “collective count” teachings for limitation [1.G].
`
`Petition (Paper 1), 7, 64-69.
`
`• PO argues that each ground does not render disclose or render obvious only two limitations: (1) the
`segregate limitation [1.F] and (2) the count and transfer limitation [1.G].
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`Micron Ex. 1070, p. 4
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`Roadmap
`
`1. The IPR 240 Grounds
`2. The 240 Patent
`3. Claim Construction: “Blocks”
`4. The Dusija in view of Sutardja Grounds
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.F] Fail
`C. POR Arguments Against Limitation [1.G] Fail
`i.
`Sutardja in view of Dusija: Individual Count Interpretation
`ii. Sutardja in view of Dusija: Collective Count Interpretation
`5. The Dusija in view of Sutardja and Chin Ground
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.G] Fail: Collective Count Interpretation
`6. PO’s Baseless Attacks Against Dr. Liu
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`5
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`Micron Ex. 1070, p. 5
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`Specification of 240 Patent: Non-Volatile Memory with SLC and MLC
`Memory Modules
`• 240 Patent shares a common specification with
`298 and 385 Patents.
`
`• The specification discloses a non-volatile
`memory system (e.g., flash memory) with two
`types of memory: SLC (single-level cells) and
`MLC (multi-level cells).
`
`Petition (Paper 1), 17.
`
`• SLC and MLC characteristics were well known:
`- SLC: have greater endurance (can sustain more
`writes), but are more expensive than MLC
`- MLC: can store more data per unit cost than SLC
`Petition (Paper 1), 13, 15-16 (citing Ex. 1016 (Friedman),
`Ex. 1020 (Lee), and Ex. 1009 (240 Liu Decl.)).
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`240 Patent, Fig. 1.
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`6
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`Micron Ex. 1070, p. 6
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`Specification of 240 Patent: Controller Maintains an Address Map for
`Logical to Physical Address Translation
`• The specification discloses that the system includes a controller that maps logical
`addresses (e.g., logical blocks) to physical addresses (e.g., physical blocks):
`
`240 Patent, 3:16-19; Reply (Paper 20), 3-4, 4, n. 2.
`
`• For example, the specification teaches that in the event of a data integrity test failure,
`the controller will remap a logical address to a new physical SLC address.
`240 Patent, 6:26-45; Petition (Paper 1), 17-18.
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`Micron Ex. 1070, p. 7
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`Specification of 240 Patent: Hot and Cold Block Limitations
`
`• Central to the remaining disputes, the specification:
`- discloses allocating/segregating hot blocks, i.e., frequently written blocks, to SLC (which have greater
`endurance); and
`- discloses allocating/segregating cold blocks, i.e., infrequently written blocks, to MLC (which store data
`more densely).
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`240 Patent, 6:46-58;
`Petition (Paper 1), 18-19.
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`Micron Ex. 1070, p. 8
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`Specification of 240 Patents: Segregate Limitation
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`• Only two limitations are at issue. First, limitation [1.F] requires:
`
`- Determine “blocks” that are
`“accessed most frequently”
`
`- “Segregates” frequently
`accessed “blocks” to SLC and
`infrequently accessed “blocks”
`to MLC
`
`240 Patent, Claim 1.
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`Micron Ex. 1070, p. 9
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`Specification of 240 Patents: Maintain a Count and Transfer Limitation
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`• Only two limitations are at issue. Second, limitation [1.G] requires:
`
`- “Maintain a count value of the
`blocks”
`
`- And on “a periodic basis,”
`“transfer the contents” of
`frequently written blocks to SLC
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`240 Patent, Claim 1.
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`Micron Ex. 1070, p. 10
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`Specification of 240 Patent: Independent Claim 6
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`• Claim 1 is representative of independent claim 6:
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`POR (Paper 15), 52; Petition (Paper 1), 57-61.
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`Micron Ex. 1070, p. 11
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`
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`Roadmap
`
`1. The IPR 240 Grounds
`2. The 240 Patent
`3. Claim Construction: “Blocks”
`4. The Dusija in view of Sutardja Grounds
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.F] Fail
`C. POR Arguments Against Limitation [1.G] Fail
`i.
`Sutardja in view of Dusija: Individual Count Interpretation
`ii. Sutardja in view of Dusija: Collective Count Interpretation
`5. The Dusija in view of Sutardja and Chin Ground
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.G] Fail: Collective Count Interpretation
`6. PO’s Baseless Attacks Against Dr. Liu
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`Micron Ex. 1070, p. 12
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`Claim Construction Arguments for “Block” Are The Same for Claims of 240
`Patent
`• The 240 claims include the relevant key features as the 298 and 385 claims:
`
`“erasable blocks”
`
`“map” that associates
`logical and physical forms
`of “block”
`
`* * *
`
`“segregate” (claim 6
`uses “allocate”)
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`240 Patent, Claim 1; Reply (Paper 20), 4-5.
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`Micron Ex. 1070, p. 13
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`Roadmap
`
`1. The IPR 240 Grounds
`2. The 240 Patent
`3. Claim Construction: “Blocks”
`4. The Dusija in view of Sutardja Grounds
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.F] Fail
`C. POR Arguments Against Limitation [1.G] Fail
`i.
`Sutardja in view of Dusija: Individual Count Interpretation
`ii. Sutardja in view of Dusija: Collective Count Interpretation
`5. The Dusija in view of Sutardja and Chin Ground
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.G] Fail: Collective Count Interpretation
`6. PO’s Baseless Attacks Against Dr. Liu
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`Micron Ex. 1070, p. 14
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`The Petition Demonstrated That Dusija in View of Sutardja Renders
`Obvious Limitation [1.F]: Maintain a Count
`• As to limitation [1.F], first, the Petition demonstrated that Dusija maintains a “hot count”
`(access counts for physical blocks) and Sutardja discloses access counts for logical and
`physical blocks:
`
`Sutardja
`
`Dusija
`
`Ex. 1010 (Dusija), [0153]; Petition (Paper 1), 44;
`Reply (Paper 20), 9-10.
`
`Ex. 1011 (Sutardja), [0111], [0121], [0147];
`Petition (Paper 1), 44; Reply (Paper 20), 9-10.
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`Micron Ex. 1070, p. 15
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`The Petition Demonstrated That Dusija in view of Sutardja Renders
`Obvious Limitation [1.F]: Segregates Those Blocks
`• Second, the Petition demonstrated that Sutardja discloses redirecting writes to SLC or
`MLC using a count, e.g., redirecting frequently-written blocks to SLC (2nd NVS memory):
`
`Sutardja
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`16
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`Ex. 1011 (Sutardja), [0111], [0147]; Petition (Paper 1), 44; Reply (Paper 20), 11-13.
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`Micron Ex. 1070, p. 16
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`The Petition Demonstrated That a POSA Would Have Been Motivated To
`Combine the Dusija and Sutardja Teachings
`• Third, the Petition detailed several reasons why a POSA would have been motivated, with
`a high expectation of success, to combine the Dusija and Sutardja teachings to arrive at
`limitation [1.F]:
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`Petition (Paper 1), 61-63.
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`Micron Ex. 1070, p. 17
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`POPR Arguments Against [1.F]: (1) “Block” Allegedly Means “Physical
`Block”
`• The POPR attempted to construe “block” to mean “physical block,” and then argued that the
`Dusija in view of Sutardja grounds rely only on logical block counting.
`
`POPR (Paper 8), 38-45.
`
`• The Board, at the institution phase, rejected PO’s implicit construction.
`ID (Paper 10), 15-16; Reply (Paper 20), 9.
`• Notably, the ID also recognized that the Petition identified portions of Sutardja that teach
`determining which physical blocks are accessed most frequently:
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`ID (Paper 10), 16, n.2; Reply (Paper 20), 9.
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`Micron Ex. 1070, p. 18
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`POPR Arguments Against [1.F]: (2) Sutardja Allegedly “Analyzes a Single
`Block”
`• The POPR argued that Sutardja “analyzes a single block” and therefore “will not
`necessarily determine which of the blocks is written to most frequently.”
`POPR (Paper 8), 42; ID (Paper 10), 16-17.
`• The Board, at the institution phase, rejected this argument, because Sutardja discloses
`tracking accesses to all blocks:
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`ID (Paper 10), 17.
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`Micron Ex. 1070, p. 19
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`The Petition Demonstrated That Dusija in View of Sutardja Renders Obvious
`Limitation [1.G]: Individual and Collective Count Interpretations
`• As to limitation [1.G], first, the Petition demonstrated that under two interpretations of this
`limitation with respect to “a count,” both of which are within the claim scope, Dusija in view
`of two independent sets of Sutardja disclosures renders obvious this limitation.
`Petition (Paper 1), 47-56; Reply (Paper 20), 18-23.
`• “Individual counts interpretation”: maintaining a separate count value for each of a plurality
`of blocks in the MLC non-volatile memory module.
`
`Petition (Paper 1), 47-50, 55-56.
`• “Collective count interpretation”: maintaining a collective count value representing the total
`number of accesses to blocks in the MLC non-volatile memory module.
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`Petition (Paper 1), 50-56.
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`Micron Ex. 1070, p. 20
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`The Petition Demonstrated That Dusija in View of Sutardja Renders
`Obvious Limitation [1.G]: Individual Count Interpretation
`• The Petition demonstrated that Sutardja’s “data shift” uses individual counts to transfer the
`contents of frequently written blocks to SLC (the 2nd NVS memory):
`
`Ex. 1011 (Sutardja), [0149]; Petition (Paper 1), 48-50.
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`Micron Ex. 1070, p. 21
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`The Petition Demonstrated That Dusija in View of Sutardja Renders
`Obvious Limitation [1.G]: Collective Count Interpretation
`• The Petition demonstrated that Sutardja also uses a collective count to separately transfer
`the contents of frequently written blocks to SLC (the 2nd NVS memory):
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`Ex. 1011 (Sutardja), [0152]-
`[0153]; Petition (Paper 1), 48-50.
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`Micron Ex. 1070, p. 22
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`POPR Arguments Against [1.G]: Sutardja Allegedly Does Not Transfer Frequently
`Written Blocks to SLC, Because Its 2nd NVS Memory Is Not Necessarily SLC
`
`• PO argued that “[t]here is no mention in [0149] or anywhere else in Sutardja of transferring
`data to SLC,” i.e., Sutardja’s 2nd NVS memory is not SLC because:
`- Claim 37 recites only that the 2nd NVS memory “includes” SLC; and
`- Sutardja’s normalization process means there is no “special treatment for either SLC or MLC.”
`POPR (Paper 8), 45-47.
`
`• At the institution phase, these arguments were rejected because:
`- Claim 1 specifies that the 2nd NVS memory “is different than said first write cycle lifetime,” and
`- Claim 37, which depends on claim 1, “specifies how the first NVS memory is different than the second
`NVS memory—namely, the first NVS memory includes MLC memory, whereas the second NVS
`memory includes SLC memory.”
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`ID (Paper 10), 18-19.
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`PO never addresses these issues during the proceeding
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`Micron Ex. 1070, p. 23
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`Roadmap
`
`1. The IPR 240 Grounds
`2. The 240 Patent
`3. Claim Construction: “Blocks”
`4. The Dusija in view of Sutardja Grounds
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.F] Fail
`C. POR Arguments Against Limitation [1.G] Fail
`i.
`Sutardja in view of Dusija: Individual Count Interpretation
`ii. Sutardja in view of Dusija: Collective Count Interpretation
`5. The Dusija in view of Sutardja and Chin Ground
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.G] Fail: Collective Count Interpretation
`6. PO’s Baseless Attacks Against Dr. Liu
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`Micron Ex. 1070, p. 24
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`POPR Arguments Against [1.F]: Summary
`
`1. PO repeats it argument that “blocks” mean “physical blocks” and thus Dusija in view of
`Sutardja does not render obvious [1.F]. This argument fails for two independent
`reasons:
`First, it fails because it is based on an erroneous claim construction of “blocks” (see supra); and
`Second, it fails because it ignores that both Dusija and Sutardja also disclose tracking accesses to
`physical blocks.
`
`-
`-
`
`Reply (Paper 20), 9-13.
`
`2. PO repeats its argument that Dusija in view of Sutardja operates on only a single block.
`This argument fails because Sutardja tracks accesses to all blocks, and segregates multiple frequently-
`-
`written blocks.
`
`Reply (Paper 20), 13-15.
`
`3. PO repeats its argument that Sutardja’s 2nd NVS memory is not SLC.
`-
`This argument fails because it ignores Sutardja’s disclosures.
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`Reply (Paper 20), 15-18.
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`Micron Ex. 1070, p. 25
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`[1.F]—(1) PO’s “Physical Block” Argument Fails Because It Is Based On a
`Legally Erroneous Construction of “Blocks”
`• The full record confirms it would be legal error to construe “block” to mean only a
`“physical block.”
`
`Reply (Paper 20), 9.
`
`•
`
`If the Board rejects PO’s erroneous construction of “block,” and “block” includes both
`logical and physical blocks, PO’s “physical block” argument fails.
`
`Reply (Paper 20), 9
`(citing Ex. 1059 (Khatri Depo.), 135:17-21).
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`Micron Ex. 1070, p. 26
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`[1.F]—(1) PO’s “Physical Block” Argument Fails Even Under Its Erroneous
`Construction: Dusija Counts Physical Block Accesses
`• Even if the Board were to adopt PO’s erroneous construction of “block,” i.e., “physical
`block,” Dusija in view of Sutardja renders obvious limitation [1.F].
`
`Reply (Paper 20), 9-13.
`• First, there can be no dispute that Dusija discloses tracking accesses to physical blocks:
`
`Reply (Paper 20), 10;
`Ex. 1010 (Dusija), [0077], [0078], [0153].
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`Micron Ex. 1070, p. 27
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`[1.F]—(1) PO’s “Physical Block” Argument Fails Even Under Its Erroneous
`Construction: Sutardja Counts Physical Block Accesses
`• Second, there is no dispute that Sutardja discloses tracking accesses to physical blocks:
`
`Dr. Khatri
`
`Ex. 1059 (Khatri Depo.), 112:14-115:6;
`Reply (Paper 20), 10.
`
`
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`IPR2021-01549IPR2021-01549
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`28
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`Micron Ex. 1070, p. 28
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(1) PO’s “Physical Block” Argument Fails Even Under Its Erroneous
`Construction: Sutardja’s Write Redirection Can Use a Logical or Physical Count
`• Third, Sutardja expressly states that its write redirection (bias logical addresses) is
`applicable to both logical and physical counts:
`
`Biasing using physical access count
`
`Biasing using logical access count
`
`Ex. 1011 (Sutardja), [0128]-[0129];
`Reply (Paper 20), 11.
`
`
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`29
`
`Micron Ex. 1070, p. 29
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(1) PO’s “Physical Block” Argument Fails Even Under Its Erroneous
`Construction: Sutardja’s Write Redirection Can Use a Logical or Physical Count
`• Third, Sutardja expressly states that its write redirection (bias logical addresses) is
`applicable to both logical and physical counts:
`
`Biasing using logical
`access count
`
`Biasing using physical
`access count
`
`
`
`IPR2021-01549IPR2021-01549
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`30
`
`Ex. 1011 (Sutardja), Claims 1, 8, 13; Reply (Paper 20), 11.
`
`Micron Ex. 1070, p. 30
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(1) PO’s “Physical Block” Argument Fails Even Under Its Erroneous
`Construction: Sutardja’s Write Redirection Can Use a Logical or Physical Count
`• PO argues that the Petition does not provide a “reasoned analysis.”
`POR (Paper 15), 35-38; Reply (Paper 20), 12; Sur-reply (Paper 22), 8-9.
`• First, the Petition identifies each type of access count as applicable:
`
`Dusija
`
`Sutardja
`
`Petition (Paper 1), 44; Reply (Paper 20), 12-13.
`
`
`
`IPR2021-01549IPR2021-01549
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`31
`
`Micron Ex. 1070, p. 31
`Micron v. Vervain
`IPR2021-01549
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`
`
`[1.F]—(1) PO’s “Physical Block” Argument Fails Even Under Its
`Erroneous Construction: The Petition Details Its Obviousness Ground
`• Second, the Petition identifies that Sutardja’s write redirection may use counts:
`
`
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`32
`
`Petition (Paper 1), 45; Reply (Paper 20), 12-13.
`
`Micron Ex. 1070, p. 32
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(1) PO’s “Physical Block” Argument Fails Even Under Its
`Erroneous Construction: The Petition Details Its Obviousness Ground
`• Third, the Petition details its obviousness rationale and expectation of success rationale:
`
`Sutardja's segregation obvious to include
`
`Sutardja’s segregation obvious to include
`
`Dusija’s count teachings illustrate
`applicability of segregation
`
`
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`IPR2021-01549IPR2021-01549
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`Petition (Paper 1), 61-63 .
`
`33
`
`Micron Ex. 1070, p. 33
`Micron v. Vervain
`IPR2021-01549
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`
`
`[1.F]—(2) PO’s Single Block Argument Fails: Both Dusija and Sutardja
`Track Access to All Blocks
`• PO asserts:
`-
`“None of the cited paragraphs which disclose ‘write frequencies’ teach or suggest determining the
`blocks which are accessed most frequently”; and
`that Sutardja at paragraph [0111] discloses only identifying a “block” that “has been written to the
`least.”
`
`-
`
`POR (Paper 15), 40.
`• This makes little sense because Sutardja and Dusija teach tracking the access count of
`each block:
`
`
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`IPR2021-01549IPR2021-01549
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCEDEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`34
`
`Ex. 1011 (Sutardja), [0111], [0112];
`Ex. 1010 (Dusija), [0153];
`Reply (Paper 20), 13-14.
`
`Micron Ex. 1070, p. 34
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(3) POR 2nd NVS Memory Argument Fails: PO Fails to Rebut That the
`2nd NVS Memory Has a Greater Lifetime
`• PO continues to argue that Sutardja is indifferent to whether the 2nd NVS memory is SLC.
`POR (Paper 15), 41-45; Reply (Paper 20), 15.
`
`• But PO could not explain away Sutardja’s clear disclosure:
`
`Ex. 1011 (Sutardja), [0145]; Reply (Paper 20), 16.
`
`
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`35
`
`Micron Ex. 1070, p. 35
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(3) POR 2nd NVS Memory Argument Fails: PO Fails to Rebut That the
`2nd NVS Memory Has a Greater Lifetime
`• PO’s expert attempts to explain why [0145]
`does not mean that the 2nd NVS memory is
`SLC by saying that Sutardja built his product
`with used parts:
`
`Ex. 1059 (Khatri Depo.), 119:1-120:21 (objection omitted);
`Reply (Paper 20), 16-17.
`
`
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`IPR2021-01549IPR2021-01549
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`36
`
`Micron Ex. 1070, p. 36
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(3) POR 2nd NVS Memory Argument Fails: Normalization Confirms
`the 2nd NVS is SLC
`• PO goes so far as to allege that Sutardja’s normalization “renders the actual write cycle
`lifetime irrelevant,” and thus the 2nd NVS memory is not SLC.
`
`POR (Paper 15), 43-44.
`• But the normalization disclosures illustrate that the 2nd NVS memory is SLC:
`
`Normalization
`
`Assumes 1st NVS
`memory is MLC
`
`Assumes 2nd NVS
`memory is SLC
`
`Ex. 1011 (Sutardja), [0161]; Reply (Paper 20), 17-18.
`
`
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`37
`
`Micron Ex. 1070, p. 37
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(3) POR 2nd NVS Memory Argument Fails: The Sur-reply’s Focus on
`[0108] Is Unavailing
`• PO, in sur-reply, harkens back to Sutardja at [0108].
`
`Sur-reply (Paper 22), 11.
`
`• But the Petition explains that it relies on the scenario of the 2nd NVS memory being SLC,
`consistent with the relevant embodiments ([0106], [0145], Claims 1, 37, see supra).
`
`- In fact, the Petition cites [0108] and expressly states that it relies on the 2nd NVS memory being
`SLC:
`Petition (Paper 1), 25, n.3.
`
`
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`IPR2021-01549IPR2021-01549
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`38
`
`Ex. 1011 (Sutardja), [0108];
`Petition (Paper 1), 25, n.3.
`
`Micron Ex. 1070, p. 38
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.F]—(3) POR 2nd NVS Memory Argument Fails: The Sur-reply’s Focus on
`[0108] Is Unavailing
`
`• PO argues that Dr. Liu’s testimony regarding picking
`the memory type in a hybrid memory systems means
`that the 2nd NVS memory could be either SLC or
`MLC.
`
`Sur-reply (Paper 22), 12.
`• Rather, consistent with his prior testimony, Dr. Liu
`explained that in a hybrid memory system, one
`memory portion is SLC or MLC, and then the “other
`half of the hybrid system will necessarily be the other
`version.”
`
`Ex. 1009 (Liu Decl.), ¶¶ 79-80; Ex. 1057 (Liu Reply
`Decl.), ¶¶ 24-25; Reply (Paper 20), 17.
`• As the prior slides demonstrate, Sutardja’s specific
`hybrid system employs SLC as the 2nd NVS memory.
`
`• Nor is Dr. Liu applying an obviousness analysis (see
`infra).
`
`Sur-reply (Paper 22), 19.
`
`
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`IPR2021-01549IPR2021-01549
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCEDEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`Ex. 2020 (Liu Depo.), 198:8-23;
`Sur-reply (Paper 22), 12, 17.
`39
`
`Micron Ex. 1070, p. 39
`Micron v. Vervain
`IPR2021-01549
`
`
`
`Roadmap
`
`1. The IPR 240 Grounds
`2. The 240 Patent
`3. Claim Construction: “Blocks”
`4. The Dusija in view of Sutardja Grounds
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.F] Fail
`C. POR Arguments Against Limitation [1.G] Fail
`i.
`Sutardja in view of Dusija: Individual Count Interpretation
`ii. Sutardja in view of Dusija: Collective Count Interpretation
`5. The Dusija in view of Sutardja and Chin Ground
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.G] Fail: Collective Count Interpretation
`6. PO’s Baseless Attacks Against Dr. Liu
`
`
`
`IPR2021-01549IPR2021-01549
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCEDEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`40
`
`Micron Ex. 1070, p. 40
`Micron v. Vervain
`IPR2021-01549
`
`
`
`The Petition’s Showings Against Limitation [1.G]
`
`• The Petition demonstrated that three, independent sets of disclosures render obvious
`limitation [1.G]:
`
`1. Dusija in view of Sutardja’s individual count disclosures;
`
`2. Dusija in view of Sutardja’s collective count disclosures; and
`
`3. Dusija in view of Sutardja and Chin’s collective count disclosures (see infra, next ground).
`Petition (Paper 1), 46-56, 63-68.
`
`
`
`IPR2021-01549IPR2021-01549
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`41
`
`Micron Ex. 1070, p. 41
`Micron v. Vervain
`IPR2021-01549
`
`
`
`Dusija in view of Sutardja Renders Obvious Limitation [1.G]: Individual
`Count Interpretation
`• Again, the Petition demonstrated that Sutardja’s “data shift” uses individual counts to
`transfer the contents of frequently accessed/written blocks to SLC (the 2nd NVS memory):
`
`Ex. 1011 (Sutardja), [0149]; Petition (Paper 1), 48-50.
`
`
`
`IPR2021-01549IPR2021-01549
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`42
`
`Micron Ex. 1070, p. 42
`Micron v. Vervain
`IPR2021-01549
`
`
`
`POPR Arguments Against [1.G] Sutardja’s Individual Count: Summary
`
`1. PO repeats its “block” means “physical blocks” argument.
`- This argument fails because it relies on an erroneous construction and ignores Sutardja’s physical
`access count disclosures.
`
`POR (Paper 15), 46-47; Reply (Paper 20), 18-19.
`
`2. PO alleges that the Petition relies on disparate disclosures with respect to paragraphs
`[0149] and [0167].
`- This argument fails because it attacks a strawman and is technically incorrect.
`POR (Paper 15), 47-50; Reply (Paper 20), 20-21.
`
`
`
`IPR2021-01549IPR2021-01549
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`43
`
`Micron Ex. 1070, p. 43
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.G] (Individual Count)—(1) PO’s “Block” Means “Physical Block”
`Argument: This Argument Fails on Multiple, Independent Counts
`• PO relies on a legally erroneous construction of “block.”
`
`Reply (Paper 20), 18-19.
`• PO ignores that Sutardja teaches steering data with either a logical or physical count.
`Reply (Paper 20), 18-19.
`
`• The Petition identifies Sutardja’s data shift:
`
`Ex. 1011 (Sutardja), [0149]; Petition (Paper 1), 47-49;
`Reply (Paper 20), 19-20.
`
`
`
`IPR2021-01549IPR2021-01549
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`44
`
`Micron Ex. 1070, p. 44
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.G] (Individual Count)—(2) The Petition’s Citation to [0149] and [0167]
`
`• The Petition cites [0149] and explains that because the data shift remaps the logical
`addresses to SLC, it transfers the corresponding physical data to SLC.
`Ex. 1011 (Sutardja), [0149]; Petition (Paper 1), 49 (citing Ex. 1009 (Liu Decl.), ¶ 170).
`• As support for this basic concept, the Petition cites Sutardja’s wear-leveling module
`functionality at [0167] as “describing” the “swapping of data” that occurs when “remapping”:
`
`Ex. 1011 (Sutardja), [0167]; Petition (Paper 1), 49 (citing Ex. 1009
`(Liu Decl.), ¶ 170); Reply (Paper 20), 20.
`
`
`
`IPR2021-01549IPR2021-01549
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`45
`
`Micron Ex. 1070, p. 45
`Micron v. Vervain
`IPR2021-01549
`
`
`
`[1.G] (Individual Count)—(2) Alleged Disparate Teachings Argument
`Attacks a Strawman and Is Factually Incorrect
`• PO argues that the data shift and [0167] are disparate teachings that occur at different times.
`POR (Paper 15), 47-50; Sur-reply (Paper 22), 14-15.
`• This is besides the point, because PO does not dispute that if there was not a transfer, the
`logical address would point to the wrong data.
`
`Reply (Paper 20), 20 (citing Ex. 1057 (Liu Reply Decl.), ¶ 34).
`• Next, [0167] is instructive of how the data shift’s remapping occurs in [0147], because [0167]
`describes the wear leveling’s, i.e., data shift’s, remapping functionality:
`
`
`
`IPR2021-01549IPR2021-01549
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`46
`
`Ex. 1011 (Sutardja), [0126], [0167]; Reply (Paper 20), 20-21.
`
`Micron Ex. 1070, p. 46
`Micron v. Vervain
`IPR2021-01549
`
`
`
`Roadmap
`
`1. The IPR 240 Grounds
`2. The 240 Patent
`3. Claim Construction: “Blocks”
`4. The Dusija in view of Sutardja Grounds
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.F] Fail
`C. POR Arguments Against Limitation [1.G] Fail
`i.
`Sutardja in view of Dusija: Individual Count Interpretation
`ii. Sutardja in view of Dusija: Collective Count Interpretation
`5. The Dusija in view of Sutardja and Chin Ground
`A. The Petition, Preliminary Response, and Institution Decision
`B. POR Arguments Against Limitation [1.G] Fail: Collective Count Interpretation
`6. PO’s Baseless Attacks Against Dr. Liu
`
`
`
`IPR2021-01549IPR2021-01549
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCEDEMONSTRATIVE EXHIBIT – NOT EVIDENCE
`
`47
`
`Micron Ex. 1070, p. 47
`Micron v. Vervain
`IPR2021-01549
`
`
`
`The Petition Demonstrated That Dusija in View of Sutardja Renders
`Obvious Limitation [1.G]: Collective Count Interpretation
`• Again, the Petition demonstrated that Sutardja also uses a collective count to separately
`transfer the contents of frequently accessed/written blocks to SLC (the 2nd NVS memory):
`
`
`
`IPR2021-01549IPR2021-01549
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`48
`
`Ex. 1011 (Sutardja), [0152]-[0153];
`Petition (Paper 1), 48-50.
`
`Micron Ex. 1070, p. 48
`Micron v. Vervain
`IPR2021-01549
`
`
`
`POPR Arguments Against [1.G] Sutardja’s Collective Count: Summary
`
`1. PO argues that the Petition’s claim interpretation is “conclusory.”
`- This argument fails because it ignores PO’s district court admission, the Petition’s analysis, and the
`claim language.
`
`POR (Paper 15), 51; Rep
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