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`·2· · · · · · · · · · · · · · · EXHIBITS:· None
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`·3
`· · · UNITED STATES PATENT AND TRADEMARK OFFICE
`·4· · · · · · · · _________________
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`·5· · BEFORE THE PATENT TRIAL AND APPEAL BOARD
`· · · · · · · · · _________________
`·6
`· · · · · · · MICRON TECHNOLOGY, INC.,
`·7· · · · · · · · · ·Petitioner,
`
`·8· · · · · · · · · · · ·v.
`
`·9· · · · · · · · · VERVAIN, LLC,
`· · · · · · · · · · Patent Owner
`10· · · · · · · ·_________________
`
`11· · ·Case IPR2021-01547, -01548, and -01549
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`12· ·Patents 8,891,298; 9,196,385; and 9,997,240
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`13· · Title:· LIFETIME MIXED LEVEL NON-VOLATILE
`· · · · · · · · · ·MEMORY SYSTEM
`14· · ________________________________________
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`15
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`16· · · DEPOSITION of SUNIL P. KHATRI, PH.D.
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`17· · · · - CONDUCTED BY VIDEOCONFERENCE -
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`18· · · · · ·Thursday, September 1, 2022
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`19· · · · 10:01 a.m. Central Daylight Time
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`20
`· · · · · · · Michelle Keegan, RMR, CRR
`21· · · · · · · · · · ·Lexitas
`· · · · · 508-478-9795 ~ 508-478.0595 (Fax)
`22· · · · · · · www.LexitasLegal.com
`
`Micron Ex. 1059, p. 1
`Micron v. Vervain
`IPR2021-01547
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`·1· · · · · · · · · · · · · · · VOLUME 1
`· · · · · · · · · · · · · · · · PAGES:· 1-239
`·2· · · · · · · · · · · · · · · EXHIBITS:· None
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`·3
`· · · UNITED STATES PATENT AND TRADEMARK OFFICE
`·4· · · · · · · · _________________
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`·5· · BEFORE THE PATENT TRIAL AND APPEAL BOARD
`· · · · · · · · · _________________
`·6
`· · · · · · · MICRON TECHNOLOGY, INC.,
`·7· · · · · · · · · ·Petitioner,
`
`·8· · · · · · · · · · · ·v.
`
`·9· · · · · · · · · VERVAIN, LLC,
`· · · · · · · · · · Patent Owner
`10· · · · · · · ·_________________
`
`11· · ·Case IPR2021-01547, -01548, and -01549
`
`12· ·Patents 8,891,298; 9,196,385; and 9,997,240
`
`13· · Title:· LIFETIME MIXED LEVEL NON-VOLATILE
`· · · · · · · · · ·MEMORY SYSTEM
`14· · ________________________________________
`
`15
`
`16· · · DEPOSITION of SUNIL P. KHATRI, PH.D.
`
`17· · · · - CONDUCTED BY VIDEOCONFERENCE -
`
`18· · · · · ·Thursday, September 1, 2022
`
`19· · · · 10:01 a.m. Central Daylight Time
`
`20
`· · · · · · · Michelle Keegan, RMR, CRR
`21· · · · · · · · · · ·Lexitas
`· · · · · 508-478-9795 ~ 508-478.0595 (Fax)
`22· · · · · · · www.LexitasLegal.com
`
`Micron Ex. 1059, p. 1
`Micron v. Vervain
`IPR2021-01547
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`2
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`·1· ·A P P E A R A N C E S:
`
`·2
`
`·3· · ·ORRICK, HERRINGTON & SUTCLIFFE LLP
`· · · ·By:· Jason Lang, Esq.
`·4· · ·1000 Marsh Road
`· · · ·Menlo Park, California 94025-1015
`·5· · ·Phone:· (650) 614-7400
`· · · ·Email:· jlang@orrick.com
`·6· · ·Counsel for Petitioner Micron Technology, Inc.
`
`·7
`· · · ·ORRICK, HERRINGTON & SUTCLIFFE LLP
`·8· · ·By:· Parth Sagdeo, Esq.
`· · · ·222 Berkeley Street, Suite 2000
`·9· · ·Boston, Massachusetts 02116
`· · · ·Phone:· (617) 880-1800
`10· · ·Email:· psagdeo@orrick.com
`· · · ·Counsel for Petitioner Micron Technology, Inc.
`11
`
`12· · ·MCKOOL SMITH
`· · · ·By:· Arvind Jairam, Esq.
`13· · ·1999 K Street, NW, Suite 600
`· · · ·Washington, D.C. 20006
`14· · ·Phone:· (202) 370-8300
`· · · ·Email:· ajairam@mckoolsmith.com
`15· · ·Counsel for Patent Owner Vervain, LLC
`
`16
`· · ·Also Present:
`17· · · Kimberly Villalobos, Video Monitor
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`18
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`19
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`20
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`21
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`22
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`Micron Ex. 1059, p. 2
`Micron v. Vervain
`IPR2021-01547
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`3
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`·1· · · · · · · · · · · ·I N D E X
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`·2
`· · ·Deposition of:· · · · · · · · · · · · · · · · Page
`·3
`· · ·SUNIL P. KHATRI, PH.D.
`·4
`· · · · By Mr. Lang· · · · · · · · · · · · · · · · · ·5
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`·6· · · · · · · · · · ·E X H I B I T S
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`·7· · · · · · · · · · · · ·(None)
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`Micron Ex. 1059, p. 3
`Micron v. Vervain
`IPR2021-01547
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`4
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`·1· · · · · · · · · P R O C E E D I N G S
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`·2· · · · · MR. LANG:· This is Jason Lang on behalf of
`
`·3· ·petitioner Micron.· I have with me my colleague
`
`·4· ·Parth Sagdeo.
`
`·5· · · · · And, Arvind, I guess we had talked about
`
`·6· ·today this deposition will cover the IPR
`
`·7· ·proceeding 2021-01547 through -49, which is the
`
`·8· ·'298, '385, and '240 patents.
`
`·9· · · · · MR. JAIRAM:· Yes.
`
`10· · · · · This is Arvind Jairam of McKool Smith on
`
`11· ·behalf of patent owner Vervain, LLC.
`
`12· · · · · And yes, Jason, I agree that those are the
`
`13· ·IPRs, the 1547, 1548, 1549 proceedings.
`
`14· · · · · And our understanding is that the
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`15· ·deposition transcript will be closed after today's
`
`16· ·deposition session and a new transcript will be
`
`17· ·opened tomorrow to cover only the 1550 proceeding.
`
`18· · · · · MR. LANG:· Sure.
`
`19· · · · · · · · ·SUNIL P. KHATRI, PH.D.,
`
`20· ·having been satisfactorily identified and duly
`
`21· ·sworn by the Notary Public, was examined and
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`22· ·testified as follows:
`
`Micron Ex. 1059, p. 4
`Micron v. Vervain
`IPR2021-01547
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`5
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`·1· · · · · · · ·EXAMINATION BY COUNSEL FOR
`
`·2· · · · · ·PETITIONER MICRON TECHNOLOGY, INC.
`
`·3· ·BY MR. LANG:
`
`·4· · · ·Q. All right.· Dr. Khatri, good morning.· If
`
`·5· ·you need a break, just let me know.· I'll just --
`
`·6· ·I know you've been through the rodeo before.
`
`·7· ·You've been deposed a number of times.· Right?
`
`·8· · · ·A. That's correct.· Yes.
`
`·9· · · ·Q. Okay.· Is there any reason you can't tell
`
`10· ·the -- you can't testify truthfully today?
`
`11· · · ·A. There isn't.
`
`12· · · ·Q. Okay.· So I just want to start with, have
`
`13· ·you ever worked with blocks in the context of
`
`14· ·flash memory before?
`
`15· · · ·A. I guess it depends on what you mean by
`
`16· ·"worked with blocks."
`
`17· · · ·Q. Okay.· When you heard the word "block" in
`
`18· ·the context of flash memory in the 2010 time
`
`19· ·frame, what did that mean to you?
`
`20· · · · · MR. JAIRAM:· Objection, form.
`
`21· · · ·A. So, you know, I think in that time frame
`
`22· ·the word "block" that people used was to indicate
`
`Micron Ex. 1059, p. 5
`Micron v. Vervain
`IPR2021-01547
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`·1· ·a group of cells.
`
`·2· · · · · In fact, I have sort of construed that
`
`·3· ·term.· And I can lean on that to give you a -- to
`
`·4· ·give you a sort of more precise definition of that
`
`6
`
`·5· ·term.
`
`·6· · · · · So for example, if we go to the
`
`·7· ·paragraph -- let's see.· Which tab?· This is my
`
`·8· ·'298 declaration.· In this declaration,
`
`·9· ·Paragraph 41 is where I describe what a block
`
`10· ·would mean.
`
`11· · · · · This is basically in the context of a
`
`12· ·non-volatile memory, a physical group of memory
`
`13· ·cells that must be erased together.
`
`14· · · ·Q. Is what you just referred to a physical
`
`15· ·block?
`
`16· · · ·A. So I think that needs to be carefully --
`
`17· ·that answer needs to be carefully so interpreted
`
`18· ·because I'm talking about blocks in the context of
`
`19· ·the three patents that we're talking about today.
`
`20· ·That's the '298, the '240, and the '385.
`
`21· · · · · In the context of these patents, you know,
`
`22· ·the definition that I've described here is a
`
`Micron Ex. 1059, p. 6
`Micron v. Vervain
`IPR2021-01547
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`
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`·1· ·physical block basically.· And the construction
`
`·2· ·is, quote -- this is from Paragraph 41 of my '298
`
`7
`
`·3· ·declaration.
`
`·4· · · · · A block is construed as -- quote, in a
`
`·5· ·non-volatile memory, a physical group of memory
`
`·6· ·cells that must be erased together.
`
`·7· · · · · So this block is physical in the context
`
`·8· ·of these patents.
`
`·9· · · ·Q. Okay.· And outside of the context of these
`
`10· ·patents, just as a person of ordinary skill in the
`
`11· ·art in the 2010 time frame, what was your
`
`12· ·understanding of the term "block," this plain and
`
`13· ·ordinary meaning?
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`14· · · · · MR. JAIRAM:· Objection, scope.· Objection,
`
`15· ·form.· Objection, relevance.
`
`16· · · ·A. So I think that that's something that, you
`
`17· ·know, I haven't been asked to opine on -- I
`
`18· ·haven't been asked to opine on in this case.
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`19· · · · · And of course, people might interpret
`
`20· ·blocks, you know, in different ways in different
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`21· ·contexts.· And depending on the context, once they
`
`22· ·define, you know, the context, then the definition
`
`Micron Ex. 1059, p. 7
`Micron v. Vervain
`IPR2021-01547
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`8
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`·1· ·of a block would become apparent.
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`·2· · · · · But I'm not able to sit here and tell you
`
`·3· ·in general what, you know, the universal, if you
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`·4· ·will, definition of a block was, if there was one.
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`·5· · · · · The important thing is once a context is
`
`·6· ·defined and the block -- and the term is defined,
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`·7· ·then one can be clear about what the term "block"
`
`·8· ·means.
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`·9· · · ·Q. Okay.· So is it your opinion that the
`
`10· ·plain and ordinary meaning of "block" in the 2010
`
`11· ·time frame is a physical block?
`
`12· · · · · MR. JAIRAM:· Objection to form.
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`13· · · ·A. That's not what I said.· I said that in
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`14· ·the context of the patents that we're discussing
`
`15· ·today, the '298, the '385, and the '240, the
`
`16· ·definition of a block would be in a non-volatile
`
`17· ·memory a physical group of memory cells that must
`
`18· ·be erased together.· Just like anything else, it's
`
`19· ·context-dependent.
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`20· · · · · And here I'm giving my opinion in the
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`21· ·context of these patents.
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`22· · · ·Q. Yeah.· And I want to understand how you
`
`Micron Ex. 1059, p. 8
`Micron v. Vervain
`IPR2021-01547
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`9
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`·1· ·got there, because it is odd to me because I hear
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`·2· ·the word "block" and then I hear the word "logical
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`·3· ·block" and I hear the word "physical block."
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`·4· ·You're familiar with all those terms.· Right?
`
`·5· · · ·A. Yes.
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`·6· · · ·Q. Okay.· So I think we can agree a block
`
`·7· ·could either be a logical block or a physical
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`·8· ·block.· Right?
`
`·9· · · ·A. I think you mentioned that you were
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`10· ·confused about how I got to this definition.· Did
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`11· ·I hear you correctly?
`
`12· · · ·Q. We'll get there.· I'm just going to try to
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`13· ·take baby steps there.
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`14· · · · · But I just want to start with, I think we
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`15· ·can agree that a person of ordinary skill in the
`
`16· ·art would understand a block could either be a
`
`17· ·physical block or a logical block.· Correct?
`
`18· · · · · MR. JAIRAM:· Objection, form.
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`19· · · ·A. Like I said, in the context of the '298,
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`20· ·'385, and '240 patents, the definition of "block"
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`21· ·is quite clear.· And it's basically as I state in
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`22· ·my construction, which is in a non-volatile memory
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`Micron Ex. 1059, p. 9
`Micron v. Vervain
`IPR2021-01547
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`·1· ·a physical group of memory cells that must be
`
`10
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`·2· ·erased together.
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`·3· · · ·Q. So it's your opinion that in the context
`
`·4· ·of the '298 patent, "block" has been defined to be
`
`·5· ·a specific type of block; namely, a physical
`
`·6· ·block?
`
`·7· · · ·A. I believe so.· Yes.
`
`·8· · · ·Q. Okay.· Now, have you worked with blocks in
`
`·9· ·the context of flash memory before 2010?
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`10· · · ·A. I've talked about them.· I don't know what
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`11· ·you mean by "worked."· That's why I asked you --
`
`12· ·you asked this question before as well.· So I
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`13· ·think you need to define what you mean by
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`14· ·"worked."
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`15· · · · · But I was familiar with them.· I talked
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`16· ·about them and such.
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`17· · · ·Q. Okay.· Yeah.· And I just want to kind of
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`18· ·talk about your experience.
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`19· · · · · So was your experience more, for example,
`
`20· ·in the design or working with an actual controller
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`21· ·that would work with blocks or more from the
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`22· ·teaching perspective?· I know you're a professor,
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`Micron Ex. 1059, p. 10
`Micron v. Vervain
`IPR2021-01547
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`·1· ·obviously.· I'm sure you've probably taught flash
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`11
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`·2· ·courses, for example.
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`·3· · · ·A. Yeah.
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`·4· · · · · MR. JAIRAM:· Objection to form.
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`·5· · · ·A. Can I ask you to repeat the question?
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`·6· · · ·Q. Yeah.· Is your experience with flash more
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`·7· ·like hands-on design of memory systems or more
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`·8· ·academically and teaching the subject to your
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`·9· ·students?
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`10· · · ·A. I see.
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`11· · · · · MR. JAIRAM:· Objection, form.
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`12· · · ·A. My experience with memory has been
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`13· ·hands-on in terms of design.· So basically, first
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`14· ·of all, my master's thesis was, you know, about a
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`15· ·memory system.· So that talked about controllers
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`16· ·and such.· So that was from my master's thesis.
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`17· · · · · And then I worked at Motorola.· And in
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`18· ·Motorola, I was involved in the translation
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`19· ·lookaside buffer block.· And I'll abbreviate it as
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`20· ·a TLB block.
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`21· · · · · And a TLB block is a cache.· So basically,
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`22· ·I was involved in designing a cache, designing
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`Micron Ex. 1059, p. 11
`Micron v. Vervain
`IPR2021-01547
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`12
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`·1· ·also testing algorithms for the cache, factory
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`·2· ·test algorithms, and you know, validation for the
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`·3· ·cache and such.· So that was a, you know, industry
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`·4· ·experience on the caches.
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`·5· · · · · And also, you know, when you have caches
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`·6· ·and such, there's, you know, the clocking of these
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`·7· ·designs is very important, the precision of the
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`·8· ·clocking.· So I was designing -- sorry.· I was
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`·9· ·involved in the design of the phase locked loop
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`10· ·and also the clock distribution network, which
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`11· ·reframed the caches.
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`12· · · · · So there was a good deal of memory-related
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`13· ·experience and background that I've had from my
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`14· ·master's onwards and then also at my time at
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`15· ·Motorola.· And you know, also after this, after I
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`16· ·became an academic, I continued that work and my
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`17· ·interest.· And so basically, we've had papers in
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`18· ·many fields in this -- many sort of areas in
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`19· ·memory.
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`20· · · · · So for example, we've had -- let's see,
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`21· ·papers that -- in fact, let me look at my
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`22· ·background just to make sure I don't miss any of
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`Micron Ex. 1059, p. 12
`Micron v. Vervain
`IPR2021-01547
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`13
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`·1· ·these.
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`·2· · · · · I'm looking at my declaration.· So as you
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`·3· ·can see, on pages 8 and 9 there's a large number
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`·4· ·of papers that I have in the areas of memory and
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`·5· ·flash memory and such.
`
`·6· · · · · But you know, in -- before the 2011 or
`
`·7· ·'10, I guess, time frame, I've had multiple papers
`
`·8· ·on, for example, reducing -- sorry -- the sort of
`
`·9· ·stability of SRAMs or stability of memories.· Also
`
`10· ·low-power, high-performance design of memories
`
`11· ·using adaptive body bias, which is a technique
`
`12· ·that's, you know, body-based control is something
`
`13· ·that's used extensively in flash.
`
`14· · · · · So we've had these papers in the 2010 --
`
`15· ·sorry -- '08, '09 -- 2008, 2009 time frame.
`
`16· · · · · And also I've had theses of students which
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`17· ·I've advised which used flash as well as regular
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`18· ·memory extensively which turned into books.
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`19· · · · · So we've had research monographs published
`
`20· ·on those.· I guess I'd have to have my CV in front
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`21· ·of me for that.
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`22· · · · · There's been a couple of research
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`Micron Ex. 1059, p. 13
`Micron v. Vervain
`IPR2021-01547
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`14
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`·1· ·monograph books which have used flash as well as
`
`·2· ·regular memory extensively before that.
`
`·3· · · · · So all this work sort of -- and in fact,
`
`·4· ·in the 2011, I think, '11 or '12 -- I don't
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`·5· ·remember exactly -- time frame I was part of an
`
`·6· ·expert witness case dealing with flash memory as
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`·7· ·well.
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`·8· · · · · So all this led to multiple sort of --
`
`·9· ·multiple sort of follow-ons.· So now, for example,
`
`10· ·we have a position paper that we are writing on
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`11· ·how flash can be sort of the technology of the
`
`12· ·future for future ICs and stuff.· That's something
`
`13· ·that's going to be published later this year.
`
`14· · · · · And in addition, you know, I've had
`
`15· ·work -- the U.S. Air Force is very interested in
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`16· ·some of this flash research that we're doing.
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`17· · · · · So they funded a six-month sabbatical for
`
`18· ·me last year or one year -- two years ago or
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`19· ·something.· That's been followed up with some
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`20· ·funding, and that's going to follow up with more
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`21· ·research funding and stuff.
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`22· · · · · And then, of course, in terms of flash
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`Micron Ex. 1059, p. 14
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`IPR2021-01547
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`15
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`·1· ·papers since that time frame -- because all this
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`·2· ·is a continuum.· Right?· It basically all begins
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`·3· ·from my master's, but it continues on afterwards
`
`·4· ·as well.
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`·5· · · · · So I've had multiple papers.· And many of
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`·6· ·these are listed on page 8 and 9 of my CV that
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`·7· ·might be after the 2010 time frame.· We've had
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`·8· ·multiple papers and research monographs on how to
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`·9· ·use flash to do logic circuits, and more recently,
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`10· ·how to use flash to do analog circuits, such as
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`11· ·sort of machine learning circuits like convolution
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`12· ·and neural networks as well as, for example, a
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`13· ·low-dropout sort of power regulator, like a supply
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`14· ·regulator.
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`15· · · · · And also, we're looking at -- this is not
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`16· ·published yet, but it should be published soon on
`
`17· ·flash-based design of very efficient finite
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`18· ·impulse response as well as infinite impulse
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`19· ·response filters and FFTs or fast Fourier
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`20· ·transforms.
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`21· · · · · So basically, there's been a whole bunch
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`22· ·of work that all starts with my master's, and then
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`Micron Ex. 1059, p. 15
`Micron v. Vervain
`IPR2021-01547
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`16
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`·1· ·it continues to this day.· So this is memory and
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`·2· ·in particular flash memory has been something that
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`·3· ·is something I'm very, very interested in and it's
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`·4· ·close to my -- close to my heart, if you will.
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`·5· · · ·Q. You'll have to take it easy on me today.
`
`·6· ·Obviously you know a lot about memory.
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`·7· · · · · So going back to your thesis, you had
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`·8· ·talked about a controller.· And that controller,
`
`·9· ·was there -- what type of memory was in that
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`10· ·system?
`
`11· · · ·A. So the controller in my -- in my master's
`
`12· ·thesis -- so this was, like, the '87 to '89 -- let
`
`13· ·me think about this.· Yeah.· Yeah, '89-on time
`
`14· ·frame.· That was a controller for what was
`
`15· ·designed -- where I was studying, which is the
`
`16· ·University of Texas at Austin.
`
`17· · · · · So we were designing this multi-threaded
`
`18· ·RISC microprocessor, which multithreading, the way
`
`19· ·we call multithreading today, people call it
`
`20· ·hyperthreading, like at Intel and stuff.· So that
`
`21· ·term has gotten co-opted and sort of retuned and
`
`22· ·modified, I suppose.
`
`Micron Ex. 1059, p. 16
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`17
`
`·1· · · · · So this was basically, I think, maybe the
`
`·2· ·first or second multithreaded RISC microprocessor
`
`·3· ·in the world.· So basically, I was designing the
`
`·4· ·memory interface and the memory subsystem of that.
`
`·5· ·So that was my master's thesis.
`
`·6· · · · · Basically, it's the controller that
`
`·7· ·basically knows which context of which thread is
`
`·8· ·requesting addresses and basically then
`
`·9· ·accordingly making requests to the memory -- to
`
`10· ·the memory system to satisfy those requests in an
`
`11· ·efficient way and so on.
`
`12· · · · · And this was basically a memory in which
`
`13· ·we had, as I recall -- this is many, many years
`
`14· ·ago.· It had many banks.· Sorry.· It was
`
`15· ·multibanked.· And also, it had some non-volatile
`
`16· ·memory to design -- I mean, to sort of -- how do
`
`17· ·you say it? -- to -- for configuration purposes
`
`18· ·and stuff.
`
`19· · · · · So it was basically a kind of a -- if you
`
`20· ·want to think about it, it was some sort of mixed
`
`21· ·memory, if you will.· Some non-volatile in the
`
`22· ·form of EPOMs and then some volatile memory as
`
`Micron Ex. 1059, p. 17
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`18
`
`·1· ·well.
`
`·2· · · · · So this was something that kind of was one
`
`·3· ·of my first taste of memory.· And the -- how do
`
`·4· ·you say it?· The approach I took, I guess it was
`
`·5· ·more -- it spanned from the system level, so at
`
`·6· ·the highest level.· It consisted of processes
`
`·7· ·which were running on the computers, on the
`
`·8· ·threads.· It consists of processes making
`
`·9· ·requests.
`
`10· · · · · And then there is this controller.· And
`
`11· ·that basically doles out these requests to the
`
`12· ·memory banks.
`
`13· · · · · So it consisted of a design at that level,
`
`14· ·at the system level, but also the design went down
`
`15· ·lower to say how -- from a circuit point of view,
`
`16· ·how is all of this going to get done?
`
`17· · · · · So it basically spanned from the circuit
`
`18· ·up to the system level for a pretty complex
`
`19· ·memory.
`
`20· · · ·Q. Now, you had mentioned the controller
`
`21· ·issuing access requests.· Did it issue access
`
`22· ·requests with physical addresses or with logical
`
`Micron Ex. 1059, p. 18
`Micron v. Vervain
`IPR2021-01547
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`19
`
`·1· ·addresses?
`
`·2· · · · · MR. JAIRAM:· Objection to form.
`
`·3· · · ·A. Now, this is a little bit too -- what is
`
`·4· ·this, 1989?· Right?· It seems like a thousand
`
`·5· ·years ago, I guess.· So let's see.· What's that?
`
`·6· ·Something like 30-something years ago.
`
`·7· · · · · Honestly, I don't remember the finer
`
`·8· ·details.· I remember notionally the work that I
`
`·9· ·had done.· The finite details, I don't recall.
`
`10· · · ·Q. Okay.· If we take ourselves to the 2010
`
`11· ·time frame and a controller that would access a
`
`12· ·NAND memory or a flash memory, would the
`
`13· ·controller typically receive logical addresses
`
`14· ·from the host system?
`
`15· · · · · MR. JAIRAM:· Objection to form.
`
`16· ·Objection, scope.
`
`17· · · ·A. A lot of this -- a lot of this depends on
`
`18· ·some of the definitions of what you mean by -- I
`
`19· ·hesitate to give broad-brush answers because, for
`
`20· ·example, a host system or a controller, they are
`
`21· ·very context-dependent.· Because when we design
`
`22· ·systems, unfortunately the systems that we design
`
`Micron Ex. 1059, p. 19
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`20
`
`·1· ·are so vastly different.· And the people who
`
`·2· ·design them in some sense are so sort of -- the
`
`·3· ·ideas are so different that people have that they
`
`·4· ·name these things differently.
`
`·5· · · · · So there is -- it's really hard to give a
`
`·6· ·kind of a blanket on sort of something -- the kind
`
`·7· ·of question you're asking.
`
`·8· · · · · Because if you give me a context, if you
`
`·9· ·give me a specific system and you said, you know,
`
`10· ·in this system -- for example, in the system off
`
`11· ·the '298 patent or the '385 or '240 patent, if you
`
`12· ·ask me that question then I can certainly give you
`
`13· ·an answer.· Because in that system, the
`
`14· ·definitions are precise, clear, and tight.
`
`15· · · · · But I hesitate to give you an answer which
`
`16· ·is to this hypothetical system where, you know --
`
`17· ·where some of the terms that you're using are
`
`18· ·defined by people in different ways and different
`
`19· ·times.· So therefore, that's not an answer I can
`
`20· ·give you straightforwardly.
`
`21· · · ·Q. Okay.· I'm sure when you read Dr. Liu's
`
`22· ·declaration, you also read the textbooks that he
`
`Micron Ex. 1059, p. 20
`Micron v. Vervain
`IPR2021-01547
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`·1· ·was citing.· Right?· Or at least the portions that
`
`21
`
`·2· ·he was citing?
`
`·3· · · ·A. I've looked at portions.· If you have
`
`·4· ·questions about them, I'm happy to answer them.
`
`·5· · · ·Q. Do you agree that a flash translation
`
`·6· ·layer is a fundamental component of a flash
`
`·7· ·controller?
`
`·8· · · · · MR. JAIRAM:· Objection to form.
`
`·9· ·Objection, scope.
`
`10· · · ·A. So again, if you give me context -- give
`
`11· ·me a specific -- like, for example, show me the
`
`12· ·particular reference that you're talking about and
`
`13· ·I'm happy to give you an answer.
`
`14· · · ·Q. So I'm just asking you, in general in
`
`15· ·2010, do you agree that a flash translation layer
`
`16· ·was a fundamental component of a flash controller?
`
`17· · · · · MR. JAIRAM:· Objection to form.
`
`18· ·Objection, scope.
`
`19· · · ·A. Once again, in flash memory it was --
`
`20· ·people did used to have a flash controller, they
`
`21· ·did used to have a flash translation layer.· And
`
`22· ·if you give me a reference, I can certainly give
`
`Micron Ex. 1059, p. 21
`Micron v. Vervain
`IPR2021-01547
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`22
`
`·1· ·you a -- I can give you an answer saying, yes,
`
`·2· ·this -- if you showed me a particular reference
`
`·3· ·and you say is this flash controller in this
`
`·4· ·reference fundamental to the operation of the
`
`·5· ·flash, I can give you -- I can certainly give you
`
`·6· ·an answer to that.
`
`·7· · · · · But in the abstract, I think that that's a
`
`·8· ·question that's a little hard to answer.
`
`·9· · · ·Q. Okay.· Wear leveling relies on a flash
`
`10· ·translation layer.· Correct?
`
`11· · · · · MR. JAIRAM:· Objection, foundation.
`
`12· ·Objection, scope.· Objection, form.
`
`13· · · ·A. So my response to that would be the same
`
`14· ·as for the last question.· Give me some context
`
`15· ·and I'm happy to answer your questions.
`
`16· · · · · But if you ask me these broad-brush
`
`17· ·questions, they're hard to answer because they
`
`18· ·need context.· Without context, I cannot give you
`
`19· ·an answer to a broad question like that.
`
`20· · · ·Q. Before 2010, have you ever worked on a
`
`21· ·flash memory that used a flash translation layer?
`
`22· · · ·A. I wouldn't recall precisely in that
`
`Micron Ex. 1059, p. 22
`Micron v. Vervain
`IPR2021-01547
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`·1· ·manner, but that doesn't mean that answer is a yes
`
`23
`
`·2· ·or a no.
`
`·3· · · ·Q. And before 2010, have you ever taught the
`
`·4· ·concept of a flash memory with a flash translation
`
`·5· ·layer?
`
`·6· · · ·A. Once again, I think there's -- in some
`
`·7· ·sense, there's no magical line that there's before
`
`·8· ·2010 there was, let's say, no flash translation
`
`·9· ·layer and then it happened right after 2010 or
`
`10· ·something.
`
`11· · · · · So I don't see how 2010 is so sort of
`
`12· ·central, if you will.· It's not like 2010 caused a
`
`13· ·big change in the adoption of a flash translation
`
`14· ·layer or something like this.· Again, therefore,
`
`15· ·in summary, it's hard for me to answer your
`
`16· ·question.
`
`17· · · · · But again, if you give me context, I'm
`
`18· ·happy to answer your questions.
`
`19· · · ·Q. I want to see if you have knowledge as a
`
`20· ·person of ordinary skill in the art at the time of
`
`21· ·the alleged '298 invention, which is July 2011.
`
`22· · · ·A. Okay.
`
`Micron Ex. 1059, p. 23
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`IPR2021-01547
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`24
`
`·1· · · ·Q. So before July 2011, had you ever worked
`
`·2· ·with or have knowledge of a flash memory system
`
`·3· ·that used a flash translation layer?
`
`·4· · · ·A. So before that, I mean, I was certainly
`
`·5· ·teaching and had knowledge of flash systems.· And
`
`·6· ·depending on the context, you know, the systems
`
`·7· ·might call -- might have something called a flash
`
`·8· ·translation layer and/or controllers and they
`
`·9· ·might name these slightly differently.· But there
`
`10· ·were -- these flash systems were around before
`
`11· ·that, of course, as well.
`
`12· · · ·Q. Okay.· And some people -- have you ever
`
`13· ·heard of the term "L2P," logical to physical?
`
`14· · · · · MR. JAIRAM:· Objection.
`
`15· · · ·A. Can you complete the question?
`
`16· · · ·Q. I just want to get on a terminology page.
`
`17· · · · · Have you ever heard of the term "L2P
`
`18· ·table"?
`
`19· · · · · MR. JAIRAM:· Objection, scope.
`
`20· · · ·A. So once again, if you are referring to the
`
`21· ·table that translates logical to physical
`
`22· ·addresses, point me to a citation.· There's
`
`Micron Ex. 1059, p. 24
`Micron v. Vervain
`IPR2021-01547
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`
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`25
`
`·1· ·certainly citations in the '298.· And then I can
`
`·2· ·answer your question with context.
`
`·3· · · · · But in general, that table might be named
`
`·4· ·differently and might have slightly different
`
`·5· ·purposes.· But there were tables even before 2010
`
`·6· ·which translated logical and physical address.
`
`·7· ·And some of this is taught in some of the
`
`·8· ·references that are cited in this -- in these
`
`·9· ·cases.
`
`10· · · ·Q. Okay.· So in that context of a flash
`
`11· ·memory with a logical to physical address map,
`
`12· ·would the host issue access commands with logical
`
`13· ·addresses?
`
`14· · · · · MR. JAIRAM:· Objection, foundation.
`
`15· ·Objection, scope.
`
`16· · · ·A. So, you know, once again, these logical --
`
`17· ·so it depends on, again, contextually what you
`
`18· ·mean by "host" and, basically, what the sort of
`
`19· ·interconnection or connection between the host and
`
`20· ·this hypothetical.
`
`21· · · · · I mean, this hypothetical host and the
`
`22· ·hypothetical flash memory that you're talking
`
`Micron Ex. 1059, p. 25
`Micron v. Vervain
`IPR2021-01547
`
`
`
`·1· ·about, which is why I go back to my question,
`
`·2· ·which is if you give me some context I'd be happy
`
`26
`
`·3· ·to answer this more precisely.
`
`·4· · · ·Q. I'm just asking you, as a person of
`
`·5· ·ordinary skill in 2010, what were the types of
`
`·6· ·commands that a host system could issue with
`
`·7· ·logical addresses?
`
`·8· · · · · MR. JAIRAM:· Objection, foundation.
`
`·9· ·Objection, scope.· Objection, form.
`
`10· · · ·A. I think that's just a rephrasing of a
`
`11· ·previous question perhaps.
`
`12· · · · · But all I'm asking is, if you give me some
`
`13· ·context to that question, then the answer would be
`
`14· ·much more -- I mean, I can give you an answer.
`
`15· ·But without context, it's hard for me to give you
`
`16· ·an answer.
`
`17· · · ·Q. I'm just asking you, as a person of
`
`18· ·ordinary skill in 2010, what were the types of
`
`19· ·commands that a host system would issue with
`
`20· ·logical addresses?
`
`21· · · · · MR. JAIRAM:· Objection, scope, objection,
`
`22· ·form.
`
`Micron Ex. 1059, p. 26
`Micron v. Vervain
`IPR2021-01547
`
`
`
`27
`
`·1· · · ·A. I'm simply saying that without giving me
`
`·2· ·some context, it's really hard to answer that
`
`·3· ·question.· Because it's just a -- I mean, it's as
`
`·4· ·broad as it can get.· It's as broad as a question
`
`·5· ·can get.
`
`·6· · · ·Q. In 2010, could a host system issue a write
`
`·7· ·command with a logical address to a flash memory
`
`·8· ·controller?
`
`·9· · · · · MR. JAIRAM:· Objection, form.
`
`10· · · ·A. I think your questions are getting sort of
`
`11· ·more precise.· And I'm glad to hear that because I
`
`12· ·think I can sort of see where -- what kind of
`
`13· ·question you're asking.
`
`14· · · · · That said, if you could define for me a
`
`15· ·host and the memory system, then I think we can
`
`16· ·maybe see if there is a way I can answer your
`
`17· ·question, if there's sufficient specificity in the
`
`18· ·question.
`
`19· · · ·Q. In 2010, was it known that a host system
`
`20· ·could issue a write command with a logical address
`
`21· ·to a flash memory controller?
`
`22· · · · · MR. JAIRAM:· Objection, form.· Objection,
`
`Micron Ex. 1059, p. 27
`Micron v. Vervain
`IPR2021-01547
`
`
`
`28
`
`·1· ·scope.
`
`·2· · · ·A. Can you cite me somewhere in one of these
`
`·3· ·patents what you mean by a host system and also
`
`·4· ·the flash memory?· And then I can basically answer
`
`·5· ·your question.
`
`·6· · · ·Q. I'm asking you -- if you want to not
`
`·7· ·answer the question, the board can read your
`
`·8· ·testimony and I'll just cite a textbook that says
`
`·9· ·exactly yes.
`
`10· · · · · So my question is, in 2010 was it known
`
`11· ·that a host system could issue a write command
`
`12· ·with a logical address to a flash memory
`
`13· ·controller?
`
`14· · · ·A. And my answer is --
`
`15· · · · · MR. JAIRAM:· Objection to form.
`
`16· ·Objection, scope.
`
`17· · · ·A. And my answer is, it depends on what you
`
`18· ·meant by a host system.· And I think it's a
`
`19· ·perfectly reasonable request for me to ask you
`
`20· ·that.
`
`21· · · ·Q. What do you think a host system is?
`
`22· ·What's your definition of "a host system"?
`
`Micron Ex. 1059, p. 28
`Micron v. Vervain
`IPR2021-01547
`
`
`
`·1· · · · · Textbooks use "host system" all the time.
`
`·2· ·What's your definition?· Do you want to make one
`
`29
`
`·3· ·up today?
`
`·4· · · · · MR. JAIRAM:· Objection, form.· Objection,
`
`·5· ·scope.
`
`·6· · · ·A. I'm not going to make one up.· I'm not
`
`·7· ·here to make up stuff.· So if you just gave me an
`
`·8· ·example or a figure in one of these patents where
`
`·9· ·there's a host system described, I think that's a
`
`10· ·perfectly reasonable request from me to answer
`
`11· ·your question.
`
`12· · · ·Q. Okay.· The '298 patent refers to a
`
`13· ·operating system and software applications
`
`14· ·executed by a host processor.
`
`15· · · ·A. Can you show me the citation, please?
`
`16· · · ·Q. Yup.· Column 2 of the '298 patent at lines
`
`17· ·19 through 21.
`
`18· · · ·A. I'm sorry.· You said 19?
`
`19· · · ·Q. Through 21.
`
`20· · · ·A. So that's '298 patent, Column 2, 19 to 21.
`
`21· ·I'm just going to read that out.
`
`22· · · · · It says -- line 19 starts --
`
`Micron Ex. 1059, p. 29
`Micron v. Vervain
`IPR2021-01547
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`
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`30
`
`·1· ·"ranges/boundaries) is optimized for the
`
`·2· ·particular operating system" . . . "and software
`
`·3· ·applications executed by the host processor."
`
`·4· · · · · And the host processor in that context I
`
`·5· ·believe is in Figure 1 of the patent what is
`
`·6· ·labeled as -- labeled as 12, the processor.
`
`·7· · · ·Q. Can the host of the '298 issue a write
`
`·8· ·command with a logical address to the flash memory
`
`·9· ·controller?
`
`10· · · · · MR. JAIRAM:· Objection to form.
`
`11· · · ·A. So the processor 12 in the '298 patent as
`
`12· ·shown in Figure 1, you know, could make a write
`
`13· ·request.· I think you said a write request.· Yeah,
`
`14· ·it could make a write request to the device
`
`15· ·controller 14 which would then sort of pass it
`
`16· ·along to the flash memory blocks, which are
`
`17· ·labeled as 26 or 28.· So when that request is made
`
`18· ·by the host -- by the processor 12, that
`
`19· ·processor -- that request is -- uses logical
`
`20· ·addresses.
`
`21· · · · · And that's taught in -- that's taught in
`
`22· ·the '298 patent as well.· Let's see.
`
`Micron Ex. 1059, p. 30
`Micron v. Vervain
`IPR2021-01547
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`
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`31
`
`·1· · · · · So I'll cite to Column 2, lines 15 onwards
`
`·2· ·to 17, where it says, "This logical address is the
`
`·3· ·address at which the logical block of physical
`
`·4· ·sectors appears to reside from the perspective of"
`
`·5· ·the "executing application program."
`
`·6· · · · · In other words, the processor issues
`
`·7· ·addresses which are logical addresses, from its
`
`·8· ·view, from their point of view of t
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