IN THE UNITED STATES DISTRICT COURT
`FOR THE WESTERN DISTRICT OF TEXAS
`WACO DIVISION
`
`Case No. 6:21-cv-00487-ADA
`
` VERVAIN, LLC,
`Plaintiff,
`
`vs.
`
`MICRON TECHNOLOGY, INC.,
`MICRON SEMICONDUCTOR PRODUCTS,
`INC., AND MICRON TECHNOLOGY
`TEXAS, LLC,
`
`Defendants.
`
`VERVAIN’S PRELIMINARY INFRINGEMENT CONTENTIONS
`
`Pursuant to the Court’s Order Governing Proceedings, Plaintiff Vervain, LLC
`
`(“Vervain”) hereby provides its preliminary infringement contentions, including identification of
`
`asserted claims, the priority date for each asserted claim, accused products, and accompanying
`
`document production. Claim charts are attached as Exhibits 1-4.
`
`Vervain’s disclosures are based on publicly available materials regarding the accused
`
`infringing products of Micron Technology, Inc., Micron Semiconductor Products, Inc., and Micron
`
`Technology Texas, LLC (together “Defendants”). Vervain does not yet have access to any of
`
`Defendants’ discovery materials that may be relevant to its infringement claims and thus relies on
`
`publicly available materials. Vervain explicitly reserves the right to supplement or alter its
`
`disclosures herein, as a matter of right, as permitted by the Court, based on the Court’s claim
`
`constructions, based on additional information obtained through formal discovery or other means,
`
`and/or based on other circumstances.
`
`1
`
`Micron Ex. 1036, p. 1
`Micron v. Vervain
`IPR2021-01547
`
`

`

`I.
`
`ASSERTED CLAIMS AND PRIORITY DATE
`
`Based on the information presently available to it, Vervain identifies the asserted claims
`
`of each asserted patent that Vervain alleges are infringed by Defendants, and the priority date of
`
`those claims, as set forth in the table below. Based on the information presently available to it,
`
`Vervain alleges that all asserted claims of each particular asserted patent are entitled to the same
`
`priority date.
`
`Patent
`8,891,298
`9,196,385
`9,997,240
`10,950,300
`
`Asserted Claims
`1, 3-5, 11
`1, 3-5, 11-13
`1-2, 6-7
`1-5, 7-12
`
`Priority Date of Asserted Claims
`July 19, 2011
`July 19, 2011
`July 19, 2011
`July 19, 2011
`
`Vervain notes that the claims identified in the table reflect the asserted claims in this case,
`
`and the absence of a claim from the list does not imply that the claim is not infringed. Vervain
`
`explicitly reserves the right to supplement or alter its identification of asserted claims and priority
`
`dates, as a matter of right, as permitted by the Court, based on the Court’s claim constructions,
`
`based on additional information obtained through formal discovery or other means, and/or based
`
`on other circumstances.
`
`II.
`
`ACCUSED PRODUCTS
`
`Based upon information presently available to it, Vervain asserts infringement by the
`
`accused products set forth in the table below. For each accused product identified below,
`
`Vervain’s contentions apply to the accused product and any other similar past, present, or future
`
`products, as well as systems incorporating the accused products or other products with the same
`
`or substantially similar features.
`
`2
`
`Micron Ex. 1036, p. 2
`Micron v. Vervain
`IPR2021-01547
`
`

`

`Patent
`8,891,298
`
`9,196,385
`
`9,997,240
`
`10,950,300
`
`Accused Products
`All flash memory products with the part name or number M600 SATA
`SSD, 2200 SSD, 2210 SSD, and 2300 SSD, and all other SSDs, memory
`cards, managed NAND, e.MMC, Embedded USB, Universal Flash
`Storage, or other flash memory products that have the same or similar
`structures, features, or functionalities, as the aforementioned products.
`All flash memory products capable of storing data in single-level cells
`(SLCs) (i.e., any cell with two states, or storing 1 bit) and multi-level cells
`(MLCs) (i.e., any cell with more than two states, or storing more than 1
`bit) that are capable of dynamic write acceleration or similar operations,
`features, or functionalities.
`All flash memory products that are capable of writing from MLCs to SLCs
`during wear leveling, defect and error management, COPYBACK
`operations, and/or similar operations, features, or functionalities.
`All flash memory products with the part name or number M600 SATA
`SSD, 2200 SSD, 2210 SSD, and 2300 SSD, and all other SSDs, memory
`cards, managed NAND, e.MMC, Embedded USB, Universal Flash
`Storage, or other flash memory products that have the same or similar
`structures, features, or functionalities, as the aforementioned products.
`All flash memory products capable of storing data in single-level cells
`(SLCs) (i.e., any cell with two states, or storing 1 bit) and multi-level cells
`(MLCs) (i.e., any cell with more than two states, or storing more than 1
`bit) that are capable of dynamic write acceleration or similar operations,
`features, or functionalities.
`All flash memory products that are capable of writing from MLCs to SLCs
`during wear leveling, defect and error management, COPYBACK
`operations, and/or similar operations, features, or functionalities.
`All flash memory products with the part name or number M600 SATA
`SSD, 2200 SSD, 2210 SSD, and 2300 SSD, and all other SSDs, memory
`cards, managed NAND, e.MMC, Embedded USB, Universal Flash
`Storage, or other flash memory products that have the same or similar
`structures, features, or functionalities, as the aforementioned products.
`All flash memory products capable of storing data in single-level cells
`(SLCs) (i.e., any cell with two states, or storing 1 bit) and multi-level cells
`(MLCs) (i.e., any cell with more than two states, or storing more than 1
`bit) that are capable of dynamic write acceleration or similar operations,
`features, or functionalities.
`All flash memory products that are capable of writing from MLCs to SLCs
`during wear leveling, defect and error management, COPYBACK
`operations, and/or similar operations, features, or functionalities.
`All flash memory products with the part name or number M600 SATA
`SSD, 2200 SSD, 2210 SSD, and 2300 SSD, and all other SSDs, memory
`cards, managed NAND, e.MMC, Embedded USB, Universal Flash
`
`3
`
`Micron Ex. 1036, p. 3
`Micron v. Vervain
`IPR2021-01547
`
`

`

`Storage, or other flash memory products that have the same or similar
`structures, features, or functionalities, as the aforementioned products.
`All flash memory products capable of storing data in single-level cells
`(SLCs) (i.e., any cell with two states, or storing 1 bit) and multi-level cells
`(MLCs) (i.e., any cell with more than two states, or storing more than 1
`bit), and random access memory, that are capable of dynamic write
`acceleration or similar operations, features, or functionalities.
`All flash memory products with random access memory that are capable
`of writing from MLCs to different locations during wear leveling, defect
`and error management, COPYBACK operations, and/or similar
`operations, features, or functionalities.
`
`This identification of accused products is based upon Vervain’s investigation to date.
`
`More complete information about the accused products is in the possession of Defendants and is
`
`expected to be obtained through discovery. Vervain explicitly reserves the right to supplement
`
`or alter its preliminary identification of accused products, as a matter of right, as permitted by the
`
`Court, based on the Court’s claim constructions, based on additional information obtained through
`
`formal discovery or other means, and/or based on other circumstances.
`
`III.
`
`CLAIM CHARTS FOR LITERAL INFRINGEMENT
`
`Based upon information presently available to it, Vervain’s preliminary infringement
`
`claim charts are provided as attached Exhibits 1-4. In each claim chart, the discussion for
`
`dependent claims should be read as incorporating by reference the discussion corresponding to the
`
`claims on which they depend. In addition, the discussion for each row in the chart should be read
`
`within the context of the discussion for the entire claim to which that row pertains. Where the
`
`charts incorporate excerpts of particular documents, the reference to those excerpts is exemplary
`
`and not to the exclusion of any other excerpt or version of the document or any versions of related
`
`documents.
`
`These preliminary infringement claim charts are based upon Vervain’s investigation to
`
`date. More complete information about the accused products is in the possession of
`
`4
`
`Micron Ex. 1036, p. 4
`Micron v. Vervain
`IPR2021-01547
`
`

`

`defendants and is expected to be obtained through discovery. Vervain explicitly reserves the
`
`right to supplement or alter its preliminary infringement claim charts, as a matter of right, as
`
`permitted by the Court, based on the Court’s claim constructions, based on additional information
`
`obtained through formal discovery or other means, and/or based on other circumstances.
`
`IV. DOCTRINE OF EQUIVALENTS
`
`Unless otherwise noted in the claim charts, Vervain alleges that Defendants infringe
`
`literally all asserted claims. To the extent any differences are alleged to exist between the
`
`asserted claims and Defendants’ accused products, such differences are insubstantial and
`
`Defendants’ accused products perform substantially the same function, in substantially the same
`
`way, to yield substantially the same result, and therefore Defendants infringe under the doctrine
`
`of equivalents.
`
`Vervain explicitly reserves the right to supplement or alter its disclosure concerning the
`
`doctrine of equivalents, as a matter of right, as permitted by the Court, based on the Court’s claim
`
`constructions, based on additional information obtained through formal discovery or other means,
`
`and/or based on other circumstances. In the event that a claim limitation is deemed to be missing
`
`under a literal infringement analysis, Vervain also reserves the right to demonstrate the presence of
`
`a substantial equivalent of such limitation and to pursue infringement under the doctrine of
`
`equivalents.
`
`V.
`
`DOCUMENT PRODUCTION
`
`Accompanying these preliminary infringement contentions, Vervain is producing
`
`documents pursuant to § 2 of the Court’s Order Governing Proceedings.
`
`
`
`5
`
`Micron Ex. 1036, p. 5
`Micron v. Vervain
`IPR2021-01547
`
`

`

`Dated: August 6, 2021.
`
`MCKOOL SMITH, P.C.
`
`
`
` /s/ Alan L. Whitehurst
`Alan L. Whitehurst
`D.C. Bar No. 484873
`awhitehurst@McKoolSmith.com
`Christopher P. McNett
`D.C. Bar No. 1500360
`cmcnett@McKoolSmith.com
`MCKOOL SMITH, P.C.
`1717 K Street, NW Suite 900
`Washington, DC 20006
`Telephone: (202) 221-6267
`
`Kathy H. Li
`Texas State Bar No. 24070142
`kli@McKoolSmith.com
`James E. Quigley
`Texas State Bar No. 24075810
`jquigley@McKoolSmith.com
`MCKOOL SMITH, P.C.
`303 Colorado Street, Suite 2100
`Austin, TX 78701
`Telephone: (512) 692-8700
`Telecopier: (512) 692-8744
`
`Attorneys for Plaintiff Vervain, LLC
`
`
`
`
`
`6
`
`Micron Ex. 1036, p. 6
`Micron v. Vervain
`IPR2021-01547
`
`

`

`CERTIFICATE OF SERVICE
`
`I hereby certify that a true and correct copy of the foregoing document was served on the
`
`following counsel of record on August 6, 2021.
`
`Claudia Wilson Frost (cfrost@orrick.com)
`Jared Bobrow (jbobrow@orrick.com)
`Jeremy Jason Lang (jlang@orrick.com)
`Margaret Abernathy (mabernathy@orrick.com)
`Parth Sagdeo (psagdeo@orrick.com)
`
`
`
` /s/ Alan L. Whitehurst
`Alan L. Whitehurst
`
`
`
`
`
`
`7
`
`Micron Ex. 1036, p. 7
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`[Claim 1, Preamble] A system for
`storing data comprising:
`
`To the extent the preamble is a limitation, the Accused Products include a system for storing data. For example, Micron’s M600 SATA
`SSD (“M600”) is a solid state drive (SSD) for storing data.
`
`Dkt. 1-18 (Ex. R), Micron’s M600 Data Sheet (“Data Sheet”) at 3.
`
`
`
`
`
`Dkt. 1-19 (Ex. S), Micron M600 SSD Review (“M600 Review”).
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 1
`
`Micron Ex. 1036, p. 8
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`Dkt. 1-20 (Ex. T), Micron Technical Marketing Brief, SSDs for Big Data – Fast Processing Requires High-Performance Storage (“SSDs
`for Big Data”) at 1.
`
`The Accused Products include at least one MLC non-volatile memory module comprising a plurality of individually erasable blocks.
`For example, the M600 contains MLC NAND flash technology with individually erasable blocks.
`
`[Claim 1, Element 1] at least one
`MLC non-volatile memory module
`comprising a plurality of
`individually erasable blocks;
`
`
`
`Dkt. 1-18 (Ex. R), Data Sheet at 3.
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 2
`
`Micron Ex. 1036, p. 9
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Id. at 1. The SSD is configured to erase MLC blocks.
`
`
`
`
`Dkt. 1-21 (Ex. U), Micron Technical Note TN-29-19, NAND Flash 101: An Introduction to NAND Flash and How to Design It In to
`Your Next Product (“Flash 101”) at 2. See also:
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 3
`
`
`
`Micron Ex. 1036, p. 10
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`How Micron FortisFlash Technology Improves Performance and Endurance (“FortisFlash”) at 1 and 3.1
`
`
`
`
`1 Available at https://nanopdf.com/download/how-fortisflash-technology-improves-performance-and-endurance_pdf.
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
` Page 4
`
`Micron Ex. 1036, p. 11
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`
`[Claim 1, Element 2] at least one
`SLC non-volatile memory module
`comprising a plurality of
`individually erasable blocks; and
`
`QLC SSD’s Require Deep FTL Tuning Karl Schuh – Micron (“FTL Tuning”) at 3, 5, and 6.2
`
`The Accused Products include at least one SLC non-volatile memory module comprising a plurality of individually erasable blocks. For
`example, the M600 contains SLC NAND flash technology with individually erasable blocks.
`
`
`2 Available at https://www.flashmemorysummit.com/English/Collaterals/Proceedings/2018/20180807_ARCH-102-1_Schuh.pdf.
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
` Page 5
`
`Micron Ex. 1036, p. 12
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Dkt. 1-18 (Ex. R), Data Sheet at 11.
`
`
`
`
`
`
`Dkt. 1-22 (Ex. V), Micron Technical Marketing Brief, Optimized Client Computing with Dynamic Write Acceleration (“Write
`Acceleration”) at 1-2.
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 6
`
`Micron Ex. 1036, p. 13
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Dkt. 1-21 (Ex. U), Flash 101 at 2. See also:
`
`
`
`
`
`
`
`FortisFlash at 1 and 3.
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 7
`
`Micron Ex. 1036, p. 14
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 8
`
`FTL Tuning at 3, 5, and 6.
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`Micron Ex. 1036, p. 15
`Micron v. Vervain
`IPR2021-01547
`
`

`

`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Accused Products
`
`The Accused Products include a controller coupled to the at least one MLC non-volatile memory module and the at least one SLC non-
`volatile memory module. For example, the M600 contains a controller with a NAND interface.
`
`U.S. Patent No. 8,891,298
`
`[Claim 1, Element 3] a controller
`coupled to the at least one MLC
`non-volatile memory module and
`the at least one SLC non-volatile
`memory module wherein the
`controller is adapted to:
`
`Dkt. 1-19 (Ex. S), M600 Review.
`
`
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`Dkt. 1-18 (Ex. R), Data Sheet at 3.
`
`
`
`
`
`
`
`
`
`
`
` Page 9
`
`Micron Ex. 1036, p. 16
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Id. at 11.
`
`
`
`The Accused Products include a controller coupled to the at least one MLC non-volatile memory module and the at least one SLC non-
`volatile memory module wherein the controller is adapted to maintain an address map of at least one of the MLC and SLC non-volatile
`memory modules, the address map comprising a list of logical address ranges accessible by a computer system, the list of logical address
`ranges having a minimum quanta of addresses, wherein each entry in the list of logical address ranges maps to a similar range of physical
`addresses within either the at least one SLC non-volatile memory module or within the at least one MLC non-volatile memory module.
`For example, the controller in the M600 uses a mapping table to keep track of the relationship between the logical blocks and the
`physical addresses of the flash memory.
`
`[Claim 1, Element 4] a) maintain
`an address map of at least one of the
`MLC and SLC non-volatile memory
`modules, the address map
`comprising a list of logical address
`ranges accessible by a computer
`system, the list of logical address
`ranges having a minimum quanta of
`addresses, wherein each entry in the
`list of logical address ranges maps
`to a similar range of physical
`addresses within either the at least
`one SLC non-volatile memory
`module or within the at least one
`MLC non-volatile memory module;
`
`Dkt. 1-18 (Ex. R), Data Sheet at 4.
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 10
`
`Micron Ex. 1036, p. 17
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`Dkt. 1-23 (Ex. W), Micron Technical Marketing Brief, A Comparison of Client and Enterprise SSD Data Path Protection (“Protection”)
`at 3. The flash memory is organized by page and block, where a page is the smallest program unit and a block is the smallest erase unit.
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 11
`
`Id. at 2.
`
`
`
`Micron Ex. 1036, p. 18
`Micron v. Vervain
`IPR2021-01547
`
`

`

`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Accused Products
`
`The Accused Products include a controller coupled to the at least one MLC non-volatile memory module and the at least one SLC non-
`volatile memory module wherein the controller is adapted to determine if a range of addresses listed by an entry and mapped to a similar
`range of physical addresses within the at least one MLC non-volatile memory module, fails a data integrity test, and, in the event of such
`a failure, the controller remaps the entry to the next available equivalent range of physical addresses within the at least one SLC non-
`volatile memory module. For example, the M600 incorporates defect and error management technology.
`
`U.S. Patent No. 8,891,298
`
`[Claim 1, Element 5] b) determine
`if a range of addresses listed by an
`entry and mapped to a similar range
`of physical addresses within the at
`least one MLC non-volatile memory
`module, fails a data integrity test,
`and, in the event of such a failure,
`the controller remaps the entry to
`the next available equivalent range
`of physical addresses within the at
`least one SLC non-volatile memory
`module;
`
`Dkt. 1-18 (Ex. R), Data Sheet at 8.
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 12
`
`Micron Ex. 1036, p. 19
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`Dkt. 1-24 (Ex. X), Micron Technical Note TN-29-61, Wear Leveling in Micron NAND Flash Memory (“Wear Leveling TN-29-61”) at
`2, 5. The controller addresses data integrity issues by remapping data.
`
`
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 13
`
`Micron Ex. 1036, p. 20
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`
`
`
`
`
`
`
`
`Dkt. 1-25 (Ex. Y), Micron Technical Note TN-29-41, Using COPYBACK Operations to Maintain Data Integrity in NAND Flash
`Devices (“COPYBACK”) at 1-3. The M600 uses Dynamic Write Acceleration for WRITE operations.
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
` Page 14
`
`Micron Ex. 1036, p. 21
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Dkt. 1-18 (Ex. R), Data Sheet at 11.
`
`
`
`
`
`
`Dkt. 1-22 (Ex. V), Write Acceleration at 1-2. Additionally, the controller compares metadata stored in the address table with metadata
`stored in the flash memory, and addresses data integrity issues by remapping.
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 15
`
`Micron Ex. 1036, p. 22
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`
`
`
`Dkt. 1-23 (Ex. W), Protection at 1, 3.
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 16
`
`Micron Ex. 1036, p. 23
`Micron v. Vervain
`IPR2021-01547
`
`

`

`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Accused Products
`
`The Accused Products include a controller coupled to the at least one MLC non-volatile memory module and the at least one SLC non-
`volatile memory module wherein the controller is adapted to determine which of the blocks of the plurality of the blocks in the MLC and
`SLC non-volatile memory modules are accessed most frequently by maintaining a count of the number of times each one of the blocks is
`accessed. For example, the M600 employs wear leveling techniques that employ block erase counting.
`
`U.S. Patent No. 8,891,298
`
`[Claim 1, Element 6] c) determine
`which of the blocks of the plurality
`of the blocks in the MLC and SLC
`non-volatile memory modules are
`accessed most frequently by
`maintaining a count of the number
`of times each one of the blocks is
`accessed; and
`
`
`Dkt. 1-26 (Ex. Z), Micron Technical Note TN-29-42, Wear-Leveling Techniques in NAND Flash Devices (“Wear-Leveling TN-29-42”)
`at 2.
`
`Id. at 3.
`
`
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 17
`
`Micron Ex. 1036, p. 24
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Id. at 4. See also:
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`FortisFlash at 1 and 3.
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 18
`
`Micron Ex. 1036, p. 25
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 19
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`FTL Tuning at 3, 5, and 6.
`
`Micron Ex. 1036, p. 26
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`[Claim 1, Element 7] d) allocate
`those blocks that receive the most
`frequent writes by transferring the
`respective contents of those blocks
`to the at least one SLC non-volatile
`memory module.
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Accused Products
`
`The Accused Products include a controller coupled to the at least one MLC non-volatile memory module and the at least one SLC non-
`volatile memory module wherein the controller is adapted to allocate those blocks that receive the most frequent writes by transferring
`the respective contents of those blocks to the at least one SLC non-volatile memory module. For example, the M600 employs wear
`leveling techniques that transfer blocks within the flash memory.
`
`Dkt. 1-26 (Ex. Z), Wear-Leveling TN-29-42 at 2.
`
`Dkt. 1-26 (Ex. Z), Wear-Leveling TN-29-42 at 3.
`
`
`
`
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 20
`
`Micron Ex. 1036, p. 27
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`Dkt. 1-26 (Ex. Z), Wear-Leveling TN-29-42 at 4. The M600 uses Dynamic Write Acceleration for WRITE operations.
`
`Dkt. 1-18 (Ex. R), Data Sheet at 11.
`
`
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 21
`
`Micron Ex. 1036, p. 28
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Dkt. 1-22 (Ex. V), Write Acceleration at 1-2. See also:
`
`
`
`
`
`
`
`FortisFlash at 1 and 3.
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 22
`
`Micron Ex. 1036, p. 29
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 23
`
`FTL Tuning at 3, 5, and 6.
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`Micron Ex. 1036, p. 30
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`3. The system of claim 1, wherein
`the minimum quanta of addresses is
`equal to one page.
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Accused Products
`
`The Accused Products include the system of claim 1, wherein the minimum quanta of addresses is equal to one block. For example, the
`M600 contains non-volatile flash memory with individually addressable pages.
`
`4. The system of claim 1, wherein
`the MLC non-volatile memory
`module is NAND flash memory.
`
`5. The system of claim 1, wherein
`the SLC non-volatile memory
`module is NAND flash memory.
`
`11. The system of claim 1, wherein
`the controller causes the transfer of
`content on a periodic basis.
`
`Dkt. 1-23 (Ex. W), Protection at 2.
`
`
`
`The Accused Products include the system of claim 1, wherein the wherein the MLC non-volatile memory module is NAND flash
`memory. See Claim 1, Element 1.
`
`The Accused Products include the system of claim 1, wherein the SLC non-volatile memory module is NAND flash memory. See Claim
`1, Element 2.
`
`The Accused Products include the system of claim 1, wherein the controller causes the transfer of content on a periodic basis. For
`example, the M600 employs wear leveling techniques that transfer blocks within the flash memory.
`
`Dkt. 1-26 (Ex. Z), Wear-Leveling TN-29-42 at 2.
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 24
`
`Micron Ex. 1036, p. 31
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Dkt. 1-26 (Ex. Z), Wear-Leveling TN-29-42 at 3.
`
`Dkt. 1-26 (Ex. Z), Wear-Leveling TN-29-42 at 4.
`
`
`
`
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 25
`
`Micron Ex. 1036, p. 32
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Dkt. 1-24 (Ex. X), Wear Leveling TN-29-61 at 4. See also:
`
`
`
`
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 26
`
`FortisFlash at 1 and 3.
`
`Micron Ex. 1036, p. 33
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 8,891,298
`
`Accused Products
`
`Exhibit 1 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 27
`
`FTL Tuning at 3, 5, and 6.
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`Micron Ex. 1036, p. 34
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 9,196,385
`
`Accused Products
`
`Exhibit 2 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`[Claim 1, Preamble] A system for
`storing data comprising:
`
`To the extent the preamble is a limitation, the Accused Products include a system for storing data. For example, Micron’s M600
`SATA SSD (“M600”) is a solid state drive (SSD) for storing data.
`
`Dkt. 1-18 (Ex. R), Micron’s M600 Data Sheet (“Data Sheet”) at 3.
`
`
`
`
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 1
`
`Dkt. 1-19 (Ex. S), Micron M600 SSD Review (“M600 Review”).
`
`Micron Ex. 1036, p. 35
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 9,196,385
`
`Accused Products
`
`Exhibit 2 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`Dkt. 1-20 (Ex. T), Micron Technical Marketing Brief, SSDs for Big Data – Fast Processing Requires High-Performance Storage
`(“SSDs for Big Data”) at 1.
`
`The Accused Products include at least one MLC non-volatile memory module comprising a plurality of individually erasable blocks.
`For example, the M600 contains MLC NAND flash technology with individually erasable blocks.
`
`[Claim 1, Element 1] at least one
`MLC non-volatile memory module
`comprising a plurality of individually
`erasable blocks;
`
`
`
`Dkt. 1-18 (Ex. R), Data Sheet at 3.
`
`
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 2
`
`Micron Ex. 1036, p. 36
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 9,196,385
`
`Accused Products
`
`Exhibit 2 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`Id. at 1. The SSD is configured to erase MLC blocks.
`
`
`
`
`Dkt. 1-21 (Ex. U), Micron Technical Note TN-29-19, NAND Flash 101: An Introduction to NAND Flash and How to Design It In to
`Your Next Product (“Flash 101”) at 2. See also:
`
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
`
` Page 3
`
`
`
`Micron Ex. 1036, p. 37
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 9,196,385
`
`Accused Products
`
`Exhibit 2 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`How Micron FortisFlash Technology Improves Performance and Endurance (“FortisFlash”) at 1 and 3.1
`
`
`
`
`1 Available at https://nanopdf.com/download/how-fortisflash-technology-improves-performance-and-endurance_pdf.
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
`
` Page 4
`
`Micron Ex. 1036, p. 38
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 9,196,385
`
`Accused Products
`
`Exhibit 2 to Vervain’s Preliminary Infringement Contentions (8/6/2021)
`
`
`
`
`
`QLC SSD’s Require Deep FTL Tuning Karl Schuh – Micron (“FTL Tuning”) at 3, 5 and 6.2
`
`[Claim 1, Element 2] at least one
`SLC non-volatile memory module
`comprising a plurality of individually
`erasable blocks; and
`
`The Accused Products include at least one SLC non-volatile memory module comprising a plurality of individually erasable blocks.
`For example, the M600 contains SLC NAND flash technology with individually erasable blocks.
`
`
`2 Available at https://www.flashmemorysummit.com/English/Collaterals/Proceedings/2018/20180807_ARCH-102-1_Schuh.pdf.
`Vervain, LLC v. Micron Technology, Inc. et al., Case No. 6:21-cv-00487-ADA
`
`
`
`
`
`
`
`
`
`
`
` Page 5
`
`Micron Ex. 1036, p. 39
`Micron v. Vervain
`IPR2021-01547
`
`

`

`U.S. Patent No. 9,196,385
`
`Accused Products
`
`Ex