·1
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`·2· · · · UNITED STATES PATENT AND TRADEMARK OFFICE
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`·3· · · · BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`·4· · · · · IPR2021-01549 (Patent 9,997,240 B2)
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`·5· · · · · IPR2021-01547 (Patent 8,891,298 B2)
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`·6· · · · · IPR2021-01548 (Patent 9,196,385 B2)1
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`Page 1
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`·7
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`·8
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`·9· ·MICRON TECHNOLOGY, INC.,
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`10· · · · · · · · · · · Petitioner,
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`11· · · · · · · · · · · v.
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`12· ·VERVAIN, LLC,
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`13· · · · · · · · · · · Patent Owner.
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`14
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`15
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`16· · · · · REMOTE DEPOSITION OF DR. DAVID LIU
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`17· · · · · · · ·San Francisco, California
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`18· · · · · · · · · · ·June 10, 2022
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`19
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`20
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`21
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`22
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`23· ·Reported by:· BONNIE PRUSZYNSKI, RMR, RPR, CLR
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`24
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`25· ·JOB NO. 211775
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`Vervain Ex. 2015, p.1
`Micron v. Vervain
`IPR2021-01547
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`·2· · · · UNITED STATES PATENT AND TRADEMARK OFFICE
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`·3· · · · BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`·4· · · · · IPR2021-01549 (Patent 9,997,240 B2)
`
`·5· · · · · IPR2021-01547 (Patent 8,891,298 B2)
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`·6· · · · · IPR2021-01548 (Patent 9,196,385 B2)1
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`Page 1
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`·7
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`·8
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`·9· ·MICRON TECHNOLOGY, INC.,
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`10· · · · · · · · · · · Petitioner,
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`11· · · · · · · · · · · v.
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`12· ·VERVAIN, LLC,
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`13· · · · · · · · · · · Patent Owner.
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`14
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`15
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`16· · · · · REMOTE DEPOSITION OF DR. DAVID LIU
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`17· · · · · · · ·San Francisco, California
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`18· · · · · · · · · · ·June 10, 2022
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`19
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`20
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`21
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`22
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`23· ·Reported by:· BONNIE PRUSZYNSKI, RMR, RPR, CLR
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`24
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`25· ·JOB NO. 211775
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`Vervain Ex. 2015, p.1
`Micron v. Vervain
`IPR2021-01547
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`Page 2
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`·1
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`·2
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`·3
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`·4
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`·5
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`·6
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`·7
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`·8· · · · · · · · · · · · · · · · · · ·June 10, 2022
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`·9· · · · · · · · · · · · · · · · · · ·7:58 A.M.
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`10
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`11
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`12
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`13· · · · · · · · · · · REMOTE VIDEOTAPED DEPOSITION OF
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`14· ·DR. DAVID LIU, held remotely from San Francisco,
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`15· ·California, before Bonnie Pruszynski, CSR No.
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`16· ·13064, a Registered Professional Reporter,
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`17· ·Registered Merit Reporter, Certified Livenote
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`18· ·Reporter, and Notary Public of the State of New
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`19· ·York.
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`20
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`21
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`22
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`23
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`24
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`25
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`Vervain Ex. 2015, p.2
`Micron v. Vervain
`IPR2021-01547
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`Page 3
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`·1· · A P P E A R A N C E S:
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`·2
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`·3· · ORRICK, HERRINGTON & SUTCLIFFE
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`·4· · Attorneys for Claimant
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`·5· · · · · · · 222 Berkeley Street
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`·6· · · · · · · Boston, MA 02116
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`·7· · BY:· · PARTH SAGDEO, ESQ.
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`·8· · · · · ·CHRISTOPHER CHILDERS, ESQ.
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`·9
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`10· · McKOOL SMITH
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`11· · Attorneys for Patent Owner
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`12· · · · · 1999 K Street, NW
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`13· · · · · Washington, DC 20006
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`14· · BY:· ARVIND JAIRAM, ESQ.
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`15· · · · ·ALAN WHITEHURST, ESQ
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`16.
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`17
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`18
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`19
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`20
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`21
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`22
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`23
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`24
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`25
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`Vervain Ex. 2015, p.3
`Micron v. Vervain
`IPR2021-01547
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`·1· · · · · · ·(Witness sworn.)
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`·2· ·DAVID LIU,
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`·3· · · · · ·called as a witness, having been first
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`·4· · · · · ·duly sworn, was examined and testified
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`Page 4
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`·5· · · · · ·as follows:
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`·6· ·EXAMINATION
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`·7· ·BY MR. JAIRAM:
`
`·8· · · ·Q.· · Good morning, Dr. Liu.
`
`·9· · · ·A.· · Good morning.
`
`10· · · ·Q.· · I know that you have been in
`
`11· ·depositions before, but I'm going to go over
`
`12· ·some basic information regarding depositions
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`13· ·so that the record is complete.· Okay?
`
`14· · · ·A.· · Yes, please.
`
`15· · · ·Q.· · Do you understand that you have
`
`16· ·been placed under oath today just as though
`
`17· ·you were in court?
`
`18· · · ·A.· · Yes, I do.
`
`19· · · ·Q.· · Do you understand that you are
`
`20· ·bound to answer my questions truthfully
`
`21· ·today?
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`22· · · ·A.· · Yes, I do.
`
`23· · · ·Q.· · If a question is unclear, please
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`24· ·let me know so that I may rephrase as
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`25· ·necessary.· Otherwise, I will assume that you
`
`Vervain Ex. 2015, p.4
`Micron v. Vervain
`IPR2021-01547
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`Page 5
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`·1· ·understood my question.· Okay?
`
`·2· · · ·A.· · That's fine with me.· Thank you.
`
`·3· · · ·Q.· · Because your testimony is being
`
`·4· ·transcribed by the court reporter, do you
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`·5· ·understand you need to answer my questions
`
`·6· ·verbally instead of with gestures?
`
`·7· · · ·A.· · I do.
`
`·8· · · ·Q.· · I'm going to do my best, and I
`
`·9· ·would ask that you do your best, that we each
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`10· ·speak one at a time, to make the court
`
`11· ·reporter's life easier.· Does that sound
`
`12· ·good?
`
`13· · · ·A.· · Sounds good.
`
`14· · · ·Q.· · Regarding breaks, we will take
`
`15· ·breaks during the deposition, but if you need
`
`16· ·one, please let me know.· If a question is
`
`17· ·pending, I will request that you answer the
`
`18· ·question before taking the break.· Okay?
`
`19· · · ·A.· · Okay.
`
`20· · · ·Q.· · Are you aware of any reason that
`
`21· ·you are unable to answer my questions
`
`22· ·truthfully today?
`
`23· · · ·A.· · I am not aware of any reasons.
`
`24· · · ·Q.· · Are you taking any medications that
`
`25· ·would prevent you from providing honest,
`
`Vervain Ex. 2015, p.5
`Micron v. Vervain
`IPR2021-01547
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`Page 6
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`·1· ·accurate, and complete answers?
`
`·2· · · ·A.· · No, I'm not.
`
`·3· · · ·Q.· · Or any health conditions that would
`
`·4· ·prevent you from providing such answers?
`
`·5· · · ·A.· · No, not right now.
`
`·6· · · ·Q.· · Do you understand that you have to
`
`·7· ·answer my questions even if your counsel
`
`·8· ·objects, unless he directly instructs you not
`
`·9· ·to answer?
`
`10· · · ·A.· · Yes, I do.
`
`11· · · · · · ·Excuse me.
`
`12· · · ·Q.· · I would also like to caution you
`
`13· ·not to discuss the substance of your
`
`14· ·testimony during your breaks.· Okay?
`
`15· · · ·A.· · Okay.· I understand.
`
`16· · · ·Q.· · Dr. Liu, is there anyone in the
`
`17· ·room with you today?
`
`18· · · ·A.· · There are two attorneys here with
`
`19· ·me.· One is Parth, and the other is Jason,
`
`20· ·Jason Lang.
`
`21· · · ·Q.· · Do you have any documents with you
`
`22· ·in the room today, either electronic or hard
`
`23· ·copy?
`
`24· · · ·A.· · I have in front of me the hard
`
`25· ·copies that we discussed on Wednesday, the
`
`Vervain Ex. 2015, p.6
`Micron v. Vervain
`IPR2021-01547
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`
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`·1· ·same one we used on Wednesday, which is just
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`·2· ·unmarked copies of my declaration and the
`
`Page 7
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`·3· ·exhibit.
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`·4· · · ·Q.· · By "Wednesday," you're referring to
`
`·5· ·our deposition regarding IPR 2021-01547 -- I
`
`·6· ·beg your pardon -- 2021-01550, involving the
`
`·7· ·'300 patent IPR; correct?
`
`·8· · · ·A.· · That's correct.
`
`·9· · · ·Q.· · And do you have with you your
`
`10· ·declarations in the IPRs involving the '298
`
`11· ·patent --
`
`12· · · ·A.· · Yes, sir.
`
`13· · · ·Q.· · -- the '385 patent, and the '240
`
`14· ·patent?
`
`15· · · ·A.· · Yes, I do.
`
`16· · · ·Q.· · For convenience, I will refer to
`
`17· ·the various IPRs that we will be discussing
`
`18· ·today as the '298 IPR, the '385 IPR, and the
`
`19· ·'240 IPR, because those are the patents at
`
`20· ·issue in those IPRs.· Is that okay with you?
`
`21· · · ·A.· · That's fine with me.
`
`22· · · ·Q.· · And similarly, when I am referring
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`23· ·to your declaration in one of those IPRs, I
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`24· ·will explain which IPR I mean, and if you
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`25· ·have any questions, please let me know so
`
`Vervain Ex. 2015, p.7
`Micron v. Vervain
`IPR2021-01547
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`·1· ·that we can make sure you are looking at the
`
`Page 8
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`·2· ·right declaration.· Okay?
`
`·3· · · ·A.· · Yes.
`
`·4· · · ·Q.· · And you understand that this
`
`·5· ·deposition today is regarding the '298 patent
`
`·6· ·IPR and the '385 patent IPR and the '240
`
`·7· ·patent IPR; correct?
`
`·8· · · ·A.· · Yes, that's correct.
`
`·9· · · ·Q.· · Can you please turn to the '298
`
`10· ·patent, which is Exhibit 1001 in the '298
`
`11· ·patent IPR.
`
`12· · · ·A.· · Excuse me, Counsel.· Is it okay if
`
`13· ·I go get my glasses, just in case?· It's
`
`14· ·right next to me.· I will get it just in case
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`15· ·I need it, reading glasses.
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`16· · · ·Q.· · Of course.
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`17· · · ·A.· · Thank you.
`
`18· · · ·Q.· · Can you please turn to the claims
`
`19· ·of the '298 patent, and please let me know
`
`20· ·when you are there.
`
`21· · · ·A.· · I am there.
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`22· · · ·Q.· · Let's refer to claim one, please.
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`23· · · · · · ·Do you see that claim one mentions
`
`24· ·blocks at various places in the claim?
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`25· · · ·A.· · Yes.
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`Vervain Ex. 2015, p.8
`Micron v. Vervain
`IPR2021-01547
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`Page 9
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`·1· · · ·Q.· · The word "blocks" is first
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`·2· ·introduced at the limitation, quote, "at
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`·3· ·least one MLC non-volatile memory module
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`·4· ·comprising a plurality of individually
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`·5· ·erasable blocks," end quote; right?
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`·6· · · · · · ·MR. SAGDEO:· Object to form.
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`·7· · · ·A.· · I think that is what -- I believe
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`·8· ·what you just read is part of the claim
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`·9· ·element, claim one.
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`10· · · ·Q.· · And then "blocks" is also
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`11· ·introduced in the next limitation involving
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`12· ·an SLC non-volatile memory module; correct?
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`13· · · · · · ·MR. SAGDEO:· Object to form.
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`14· · · ·A.· · I think the whole sentence or
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`15· ·limitation is "at least one SLC non-volatile
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`16· ·memory module comprising a plurality of
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`17· ·individually erasable blocks."
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`18· · · ·Q.· · The blocks are described as being
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`19· ·erasable blocks; right?
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`20· · · ·A.· · The individual erasable block is in
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`21· ·the context of non-volatile memory modules,
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`22· ·yes.
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`23· · · ·Q.· · And the specification of the '298
`
`24· ·patent describes erasing a block; right?
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`25· · · · · · ·MR. SAGDEO:· Objection to form.
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`Vervain Ex. 2015, p.9
`Micron v. Vervain
`IPR2021-01547
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`Page 10
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`·1· · · ·A.· · Can you point me to where you are
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`·2· ·referring to, so I can see the proper
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`·3· ·context?
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`·4· · · ·Q.· · For example, let's turn to column
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`·5· ·two, line six of the '298 patent.· Could you
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`·6· ·please tell me when you are there.
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`·7· · · ·A.· · I am there.
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`·8· · · ·Q.· · The '298 patent describes erasing a
`
`·9· ·block; right?
`
`10· · · ·A.· · Yes.· In that context, yes.
`
`11· · · ·Q.· · The specification also discloses
`
`12· ·that blocks can only be erased in their
`
`13· ·entirety; right?
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`14· · · ·A.· · Repeat the question again.
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`15· · · ·Q.· · The specification of the '298
`
`16· ·patent also discloses that blocks can only be
`
`17· ·erased in their entirety; correct?
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`18· · · ·A.· · Can you put it in proper context?
`
`19· ·I'm not sure of your question.
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`20· · · ·Q.· · For example, can you please turn to
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`21· ·column two, line 43 of the '298 patent.
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`22· · · ·A.· · Line 42?
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`23· · · ·Q.· · Line 42, I think, the sentence
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`24· ·beginning, "Blocks can only."
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`25· · · ·A.· · Yes.· I --
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`Vervain Ex. 2015, p.10
`Micron v. Vervain
`IPR2021-01547
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`Page 11
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`·1· · · ·Q.· · Do you see that sentence?
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`·2· · · ·A.· · I'm sorry to interrupt you.
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`·3· ·Please.
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`·4· · · ·Q.· · I was just asking if you could see
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`·5· ·the sentence.
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`·6· · · ·A.· · Yes.· That's in the context of a
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`·7· ·NAND flash memory.
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`·8· · · ·Q.· · Are you familiar from your
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`·9· ·experience with erasing blocks in NAND flash
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`10· ·memory?
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`11· · · ·A.· · Yes, I am.
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`12· · · ·Q.· · Can you tell me what erasing a
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`13· ·block in a NAND flash memory involves?
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`14· · · ·A.· · Can you please qualify "erase"?
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`15· ·Certainly in the context of a block in the
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`16· ·'298, especially in the claim one in '298,
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`17· ·both writing instruction to a block and
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`18· ·erasing could refer to both logical and a
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`19· ·physical block.
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`20· · · · · · ·So, in that context, erasing,
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`21· ·generically speaking, just if we assume the
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`22· ·erased state for the sake of this deposition,
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`23· ·let's just assume for an SLC memory, erasing
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`24· ·is through setting the data to be a one,
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`25· ·logical one, then erasing a block would be
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`Vervain Ex. 2015, p.11
`Micron v. Vervain
`IPR2021-01547
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`Page 12
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`·1· ·setting the data to be a logical one so that
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`·2· ·the host, when it sees it, accesses it, will
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`·3· ·see all one.
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`·4· · · ·Q.· · So, the specification describes
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`·5· ·erasing blocks by writing a 1 bit to the
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`·6· ·blocks; right?
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`·7· · · · · · ·MR. SAGDEO:· Object to form.
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`·8· · · ·A.· · I would be very careful to use the
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`·9· ·word "write."· I would -- in my field, I
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`10· ·believe the proper word would be setting it
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`11· ·to one or setting it to a zero state.
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`12· · · ·Q.· · Well, let's look at column two,
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`13· ·lines 43 through 45.
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`14· · · · · · ·Do you see the sentence that
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`15· ·begins, "Blocks can only be erased"?
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`16· · · ·A.· · I do see that.
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`17· · · ·Q.· · Can you read that sentence aloud,
`
`18· ·please?
`
`19· · · ·A.· · "Blocks can only be erased in their
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`20· ·entirety, and, when erased, are usually
`
`21· ·written to 1 bits."
`
`22· · · ·Q.· · That sentence describes writing
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`23· ·1 bits to blocks; right?
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`24· · · ·A.· · In the context of erasing, and not
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`25· ·to be confused with what we call programming,
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`Vervain Ex. 2015, p.12
`Micron v. Vervain
`IPR2021-01547
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`Page 13
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`·1· ·I would prefer, even though the word here
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`·2· ·used is "written," I would prefer to use the
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`·3· ·word "set."· Setting to ones will be -- will
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`·4· ·be in the context of having logical one as
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`·5· ·the binary state, setting to one will be
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`·6· ·erased.
`
`·7· · · ·Q.· · But you agree that the '298 patent
`
`·8· ·describes writing 1 bits to blocks?
`
`·9· · · ·A.· · I think that is the language that
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`10· ·is used here, yes.· In that context, that is
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`11· ·correct.
`
`12· · · ·Q.· · When performing a write to flash
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`13· ·memory, a memory cell is written to; correct?
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`14· · · ·A.· · Repeat your question again.
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`15· · · ·Q.· · When performing a write to flash
`
`16· ·memory, a memory cell is written to; correct?
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`17· · · ·A.· · Correct, in the sense that data
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`18· ·will be transferred to the memory array, and
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`19· ·it could be one or zero.· Data will be --
`
`20· ·will be -- yeah.· Data will be transferred to
`
`21· ·the memory array.
`
`22· · · ·Q.· · As you say transferred to the
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`23· ·memory array, that is commonly referred to as
`
`24· ·writing to the memory array; correct?
`
`25· · · ·A.· · In certain contexts, that is
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`Vervain Ex. 2015, p.13
`Micron v. Vervain
`IPR2021-01547
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`Page 14
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`·1· ·correct.
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`·2· · · ·Q.· · In what context?
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`·3· · · ·A.· · Again, as I was explaining, the
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`·4· ·data could either be a one or zero.· So, so
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`·5· ·you would have to have that data transferred
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`·6· ·to the memory array.
`
`·7· · · ·Q.· · And the '298 patent describes
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`·8· ·writing to the memory array; right.
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`·9· · · ·A.· · Can you please point me to the
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`10· ·context of your statement?
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`11· · · ·Q.· · Throughout the '298 patent, but we
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`12· ·could look at the same sentence that we just
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`13· ·now were discussing.· Column two, lines 43
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`14· ·through 45, the '298 patent is describing
`
`15· ·writing the blocks to a memory array;
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`16· ·correct?
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`17· · · ·A.· · I don't think the word "memory
`
`18· ·array" is there.· I just used that word, but
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`19· ·I think it's using in the context of block.
`
`20· · · ·Q.· · Do you disagree that the flash
`
`21· ·memory that is described in the '298 patent
`
`22· ·is a memory array?· Let me rephrase that.
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`23· · · · · · ·Are you saying that the flash
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`24· ·memory described in the '298 patent is not a
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`25· ·memory array?
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`Vervain Ex. 2015, p.14
`Micron v. Vervain
`IPR2021-01547
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`Page 15
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`·1· · · · · · ·MR. SAGDEO:· Object to scope.
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`·2· · · ·A.· · I don't believe that is my -- what
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`·3· ·I am saying.· I think I would characterize it
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`·4· ·that the sentence you just read was in the
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`·5· ·form of block, and certainly it could be a
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`·6· ·logical block or a physical block.· So, I
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`·7· ·just want to distinguish that from the word
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`·8· ·"memory array," which did not appear in the
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`·9· ·citation that we just read.
`
`10· · · ·Q.· · When the '298 patent is describing
`
`11· ·writing 1 bits to blocks at column two, lines
`
`12· ·43 through 45, that sentence is referring to
`
`13· ·writing bits into memory; correct?
`
`14· · · ·A.· · The context that you are referring
`
`15· ·to is referring to erasing a block, and use
`
`16· ·the word that I -- as we mentioned in the
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`17· ·beginning of the convention, erasing is to
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`18· ·set the logical state that a host will see to
`
`19· ·be one.· So, in the context, erasing, I think
`
`20· ·it says right here, is really just to
`
`21· ·setting, and uses the word "written," just
`
`22· ·setting all the logical state to one.
`
`23· · · ·Q.· · Do you disagree with the choice of
`
`24· ·the word "written" at column two, line 45 of
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`25· ·the '298 patent?
`
`Vervain Ex. 2015, p.15
`Micron v. Vervain
`IPR2021-01547
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`Page 16
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`·1· · · ·A.· · I don't necessarily disagree with
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`·2· ·the word "written."· I am simply cautioning
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`·3· ·that this word would have to be used in the
`
`·4· ·proper context.· For example, in the flash
`
`·5· ·memory, we tend to distinguish "write" and
`
`·6· ·"erase," and I think it's well known to a
`
`·7· ·POSA, an erase operation to a block will have
`
`·8· ·to be performed before writing.
`
`·9· · · · · · ·So, in that context, I just want to
`
`10· ·caution that the word "write" or "written"
`
`11· ·has to have a proper context.· And in this
`
`12· ·context, it's really setting the logical
`
`13· ·state to be one.
`
`14· · · ·Q.· · And you said that one tends to
`
`15· ·distinguish writing and erasing.· Does one
`
`16· ·tend to distinguish writing and setting a bit
`
`17· ·in flash memory?
`
`18· · · ·A.· · Can you repeat your question,
`
`19· ·please?
`
`20· · · ·Q.· · In your opinion, does one tend to
`
`21· ·distinguish writing a bit versus setting a
`
`22· ·bit in flash memory.
`
`23· · · ·A.· · Again, it depends on the context.
`
`24· ·I use the word "setting" just to -- in the
`
`25· ·context of a logical state, and so that we
`
`Vervain Ex. 2015, p.16
`Micron v. Vervain
`IPR2021-01547
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`
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`Page 17
`
`·1· ·will understand whether we are putting --
`
`·2· ·logical state, we are putting the memory
`
`·3· ·cells in the array, in -- memory cell in the
`
`·4· ·block to be.
`
`·5· · · ·Q.· · By "logical state," you are
`
`·6· ·referring to a binary value of zero or one?
`
`·7· · · ·A.· · Assuming it's single level, yes,
`
`·8· ·zero and one.
`
`·9· · · ·Q.· · And by "logical state," you are not
`
`10· ·referring to logical addresses; correct?
`
`11· · · ·A.· · By "logical state," I'm referring
`
`12· ·to the data that would be -- I want to use
`
`13· ·the word carefully -- the data that would be
`
`14· ·utilized by the -- by the host.
`
`15· · · ·Q.· · How does a 1 bit get written into
`
`16· ·flash memory?
`
`17· · · · · · ·MR. SAGDEO:· Object to form.
`
`18· · · ·A.· · The data one can only be -- can
`
`19· ·only be done by -- it's done -- I should not
`
`20· ·say can only be done.· It's done by an erase
`
`21· ·operation to set the logical state to one.
`
`22· ·In the context that we just mentioned, that
`
`23· ·one, logical one for a single-level cell is
`
`24· ·the logical state of an erase cell.
`
`25· · · ·Q.· · Have you worked with flash memory?
`
`Vervain Ex. 2015, p.17
`Micron v. Vervain
`IPR2021-01547
`
`
`
`·1· · · ·A.· · Yes, I have.
`
`·2· · · ·Q.· · You understand how flash memory
`
`Page 18
`
`·3· ·works?
`
`·4· · · ·A.· · Yes, I do.
`
`·5· · · ·Q.· · Doctor, can you please explain how
`
`·6· ·a 1 bit gets put into flash memory?
`
`·7· · · · · · ·MR. SAGDEO:· Object to the form,
`
`·8· · · ·scope.
`
`·9· · · ·A.· · In the context of what we have been
`
`10· ·discussing, that a logical one is the erase
`
`11· ·state, then it is through an operation that
`
`12· ·would -- in the context here is through an
`
`13· ·operation that will be done on the per-block
`
`14· ·basis, so that every data in the block will
`
`15· ·be set to a logical one.
`
`16· · · ·Q.· · And I am asking, how is the logical
`
`17· ·one bit actually written?
`
`18· · · ·A.· · It would depend, from memory cell,
`
`19· ·what technology that you are referring to.
`
`20· · · ·Q.· · Well, let's take, for example, the
`
`21· ·NAND flash memory device described at column
`
`22· ·two, line 39 of the '298 patent.· In such a
`
`23· ·flash memory, how is a write operation that
`
`24· ·writes a logical one bit implemented?
`
`25· · · · · · ·MR. SAGDEO:· Object to form.
`
`Vervain Ex. 2015, p.18
`Micron v. Vervain
`IPR2021-01547
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`
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`Page 19
`
`·1· · · ·A.· · I believe I discussed that in my
`
`·2· ·declaration, and I think it would be much
`
`·3· ·easier if I were just to read it to you, so
`
`·4· ·we would have the proper context.
`
`·5· · · ·Q.· · Can you point me to a paragraph in
`
`·6· ·your declaration, please.
`
`·7· · · ·A.· · Yes, as soon as I find it.
`
`·8· · · ·Q.· · And you are referring, just to be
`
`·9· ·clear, to your declaration in the '298 patent
`
`10· ·IPR, and that is Exhibit 1009 in that IPR?
`
`11· · · ·A.· · That's correct.
`
`12· · · · · · ·Paragraph 46, for example.
`
`13· · · ·Q.· · Can you briefly -- without
`
`14· ·repeating verbatim, can you briefly explain
`
`15· ·how flash memory is written to?
`
`16· · · · · · ·MR. SAGDEO:· Object to form.
`
`17· · · ·A.· · Sure.· I said, "For example, a
`
`18· ·large amount of charge may represent a value
`
`19· ·of zero, whereas a small amount of charge may
`
`20· ·represent a value of one."
`
`21· · · ·Q.· · And by a charge, a charge where?
`
`22· ·What do you mean, please?
`
`23· · · ·A.· · This will be the charge on the
`
`24· ·floating gate, in the context --
`
`25· · · ·Q.· · What is the floating gate, please?
`
`Vervain Ex. 2015, p.19
`Micron v. Vervain
`IPR2021-01547
`
`
`
`·1· ·I'm sorry.· I thought you were done speaking.
`
`Page 20
`
`·2· ·What is the floating gate, please?
`
`·3· · · ·A.· · In the context of a NAND flash
`
`·4· ·memory cell, there are variation, but --
`
`·5· ·excuse me -- I believe I illustrated in the
`
`·6· ·declaration on paragraph 45 to show what I
`
`·7· ·would call a conventional floating gate
`
`·8· ·structure.
`
`·9· · · ·Q.· · Is a floating gate structure used
`
`10· ·in a NAND flash memory?
`
`11· · · · · · ·MR. SAGDEO:· Object to form.
`
`12· · · ·A.· · It is one of the structures used in
`
`13· ·NAND flash memory.
`
`14· · · ·Q.· · What is another structure used in
`
`15· ·NAND flash memory?
`
`16· · · · · · ·MR. SAGDEO:· Object to form.
`
`17· · · ·Q.· · For storing logical bit values.
`
`18· · · · · · ·MR. SAGDEO:· Object to form.
`
`19· · · ·A.· · In certain advanced technology -- I
`
`20· ·believe I actually describe it in
`
`21· ·paragraph 46 -- other flash memory cell use
`
`22· ·what is known as charge trap technology.
`
`23· · · ·Q.· · So, with the floating gate that you
`
`24· ·mentioned, what happens regarding that
`
`25· ·floating gate when a one is written into the
`
`Vervain Ex. 2015, p.20
`Micron v. Vervain
`IPR2021-01547
`
`
`
`Page 21
`
`·1· ·flash memory cell?
`
`·2· · · ·A.· · As you see in my declaration, on
`
`·3· ·paragraph 46, a one, which in our context, in
`
`·4· ·the context of discussion, is a logical one,
`
`·5· ·is in a state of erase, a small amount of
`
`·6· ·charge will -- small or very little amount of
`
`·7· ·charge would be on the floating gate.
`
`·8· · · ·Q.· · So, what distinguishes the one
`
`·9· ·state from the zero state regarding the
`
`10· ·charge?
`
`11· · · ·A.· · Again, I refer to paragraph 46, the
`
`12· ·sentence right before what I just read.· "A
`
`13· ·large amount of charge may represent a value
`
`14· ·of zero."
`
`15· · · ·Q.· · So, in order to write a value of
`
`16· ·one, what has to happen to turn a large
`
`17· ·amount of charge into a small amount of
`
`18· ·charge, as you wrote in paragraph 46?
`
`19· · · ·A.· · So, to go from a large amount of
`
`20· ·charge to a small amount of charge, you would
`
`21· ·have to reduce the amount of charge on the
`
`22· ·floating gate.
`
`23· · · ·Q.· · How is the amount of charge reduced
`
`24· ·on the floating gate?
`
`25· · · ·A.· · I beg your pardon?· Please repeat
`
`Vervain Ex. 2015, p.21
`Micron v. Vervain
`IPR2021-01547
`
`
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`Page 22
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`·1· ·the question.
`
`·2· · · ·Q.· · How is the amount of charge reduced
`
`·3· ·on the floating gate?
`
`·4· · · ·A.· · Through means of -- in the field,
`
`·5· ·through the means of extracting the electrons
`
`·6· ·or extracting the charge away from the
`
`·7· ·floating gate.
`
`·8· · · ·Q.· · When you say a floating gate, what
`
`·9· ·is the floating gate a component of?
`
`10· · · · · · ·MR. SAGDEO:· Object to form.
`
`11· · · ·A.· · I am not sure of your question.
`
`12· ·I'm sorry.· Could you please clarify?
`
`13· · · ·Q.· · Well, we have been talking about a
`
`14· ·floating gate.· I'm trying to understand,
`
`15· ·well, floating in what?· A gate of what?
`
`16· ·What is -- I mean, is there just a floating
`
`17· ·gate by itself?· Can you explain the context
`
`18· ·of a floating -- let me rephrase.
`
`19· · · · · · ·Can you explain the context of a
`
`20· ·floating gate, please?
`
`21· · · ·A.· · To explain floating gate, let me
`
`22· ·first explain gate.· A gate in the CMOS
`
`23· ·transistor, the gate is the means which you
`
`24· ·control the conduction of the channel of the
`
`25· ·transistor.· So, to that extent, the means to
`
`Vervain Ex. 2015, p.22
`Micron v. Vervain
`IPR2021-01547
`
`
`
`Page 23
`
`·1· ·control will be applying electrical signal to
`
`·2· ·the gate, so that you can facilitate amount
`
`·3· ·of conduction in the channel.
`
`·4· · · · · · ·So, the -- having the way to
`
`·5· ·putting electrical signal on that gate
`
`·6· ·would -- is by means of making electrical
`
`·7· ·contact.· In that case, that gate will be
`
`·8· ·what we call either -- we can call it a gate
`
`·9· ·with control, because you have electrical
`
`10· ·contact to it.
`
`11· · · · · · ·In a similar analogy or similar way
`
`12· ·of explaining, a floating gate, by
`
`13· ·definition, will be -- because it's also
`
`14· ·still with the word "gate," so the function
`
`15· ·is still trying to effect the conduction of
`
`16· ·the channel region, conduction of electrical
`
`17· ·signal so you can detect the state.
`
`18· · · · · · ·So, the floating gate simply means
`
`19· ·that I do not put an electrical or any means
`
`20· ·to connect to that gate, but instead, I use
`
`21· ·the charge on that gate, which is facilitated
`
`22· ·either -- depending on the amount that's
`
`23· ·on -- that I put on there, is through
`
`24· ·physical mechanism, that I put different
`
`25· ·amount of charge on that, quote/quote,
`
`Vervain Ex. 2015, p.23
`Micron v. Vervain
`IPR2021-01547
`
`
`
`Page 24
`
`·1· ·floating gate, in order to facilitate the
`
`·2· ·conduction of the channel beneath it.
`
`·3· · · · · · ·I'm not sure if that's clear to
`
`·4· ·you.· I will be happy to clarify it if you
`
`·5· ·have any -- any questions.
`
`·6· · · ·Q.· · Thank you.
`
`·7· · · · · · ·At paragraph 48 of your declaration
`
`·8· ·in the '298 patent IPR, you mentioned
`
`·9· ·changing the threshold voltage of a memory
`
`10· ·cell to program a flash memory cell; right?
`
`11· · · ·A.· · Correct.· In the context of the way
`
`12· ·I just explained it, the amount of charge
`
`13· ·will modulate the conduction of the channel
`
`14· ·beneath -- beneath that floating gate.
`
`15· · · ·Q.· · So, you're describing writing to
`
`16· ·the flash cell by influencing the amount of
`
`17· ·charge; correct?
`
`18· · · · · · ·MR. SAGDEO:· Object to form.
`
`19· · · ·A.· · Correct, in the sense that in this
`
`20· ·case, the charge will be electron.· So, I am
`
`21· ·mentioning electron, how we facilitate
`
`22· ·different amount of electron getting onto the
`
`23· ·floating gate to facilitate this modulation
`
`24· ·of the conduction.
`
`25· · · ·Q.· · What is meant by erasing a cell of
`
`Vervain Ex. 2015, p.24
`Micron v. Vervain
`IPR2021-01547
`
`
`
`Page 25
`
`·1· ·a flash memory?
`
`·2· · · ·A.· · I believe I mentioned it.· Are you
`
`·3· ·talking about the logical state, which is
`
`·4· ·setting to one, or are you talking about the
`
`·5· ·physical state, which is to assert -- as the
`
`·6· ·term would say, which is, to facilitate the
`
`·7· ·amount of charge or electron on the floating
`
`·8· ·gate in this case is to facilitate the
`
`·9· ·reduction of the amount of charge on the
`
`10· ·floating gate.
`
`11· · · ·Q.· · Well, could you show me where in
`
`12· ·your declaration you describe erasing a
`
`13· ·memory cell?
`
`14· · · ·A.· · If we refer to paragraph 46 in
`
`15· ·conjunction with paragraph 48, it's clear
`
`16· ·that in one case, we increase the number of
`
`17· ·charge, again, in the context this electron
`
`18· ·on the floating gate to set a value of zero,
`
`19· ·and conversely, we remove or reduce the
`
`20· ·number of electrons on the floating gate to
`
`21· ·facilitate a logical state of one, in which
`
`22· ·case, in this context of our discussion, is
`
`23· ·erasing.
`
`24· · · ·Q.· · At paragraph 55 of your
`
`25· ·declaration, you describe erasing a memory
`
`Vervain Ex. 2015, p.25
`Micron v. Vervain
`IPR2021-01547
`
`
`
`Page 26
`
`·1· ·cell; right?
`
`·2· · · ·A.· · I am describing how the flash
`
`·3· ·memory would be done in terms of program and
`
`·4· ·erase.
`
`·5· · · ·Q.· · I'm just asking if paragraph 55 of
`
`·6· ·your declaration describes or discusses
`
`·7· ·erasing a memory cell.· Yes or no, please.
`
`·8· · · · · · ·MR. SAGDEO:· Object to form.
`
`·9· · · ·Q.· · Does paragraph 55 of your
`
`10· ·declaration discuss erasing memory cells?
`
`11· · · ·A.· · It discuss erase operation will
`
`12· ·cause all cells in the block to be set to one
`
`13· ·for an SLC cell and set to 11 for an MLC
`
`14· ·cell.· And that's why earlier I cautioned
`
`15· ·against just saying one or zero, when you
`
`16· ·mentioned a flash memory cell state, either
`
`17· ·in the logical programs -- logical one or
`
`18· ·logical zero.· I caution that it's not
`
`19· ·necessarily just a binary.
`
`20· · · ·Q.· · So, paragraph 55 of your
`
`21· ·declaration does describe setting memory
`
`22· ·cells in a block of flash memory to a one
`
`23· ·value; correct?
`
`24· · · ·A.· · Perhaps I can better phrase it that
`
`25· ·my exact words were erase operation will
`
`Vervain Ex. 2015, p.26
`Micron v. Vervain
`IPR2021-01547
`
`
`
`Page 27
`
`·1· ·cause the cells, all the cells in the block
`
`·2· ·to be set to a logical one in the case of SLC
`
`·3· ·architecture and to be 11 in the case of MLC.
`
`·4· · · ·Q.· · When you say "the cells in the
`
`·5· ·block," can you explain, please, the
`
`·6· ·relationship between memory cells and block?
`
`·7· · · ·A.· · In the field, the conventional way
`
`·8· ·would be that the block is just -- is used to
`
`·9· ·describe a multitude of cells that a group --
`
`10· ·how they are grouped.· So, block would be one
`
`11· ·quanta, one form of memory elements that are
`
`12· ·classified within a group together, so you
`
`13· ·can group it as a block.
`
`14· · · ·Q.· · In the last sentence of
`
`15· ·paragraph 55, you describe erasing a block;
`
`16· ·right?
`
`17· · · ·A.· · I'm describing, in setting the
`
`18· ·program or erase state, a block has to be --
`
`19· ·typically we use the word "erase" -- a block
`
`20· ·has to be -- all the -- all that quanta of
`
`21· ·memory elements in that block has to be set
`
`22· ·to a logical one together.
`
`23· · · · · · ·That's the architecture of a flash
`
`24· ·memory, that in the quanta -- in the quanta
`
`25· ·of block of memory array, memory elements,
`
`Vervain Ex. 2015, p.27
`Micron v. Vervain
`IPR2021-01547
`
`
`
`Page 28
`
`·1· ·those have to be erased or setting to logical
`
`·2· ·state one together.· You cannot only set or
`
`·3· ·erase just a portion of that quanta that has
`
`·4· ·been classified in a group as a block.
`
`·5· · · ·Q.· · Dr. Liu, my question is simple.
`
`·6· ·The last sentence of paragraph 55 describes
`
`·7· ·erasing a block; right?· A yes or no will
`
`·8· ·suffice, please.
`
`·9· · · · · · ·MR. SAGDEO:· Object to form.
`
`10· · · ·A.· · Let me just read it so that we know
`
`11· ·we have a common ground.
`
`12· · · · · · ·Last sentence says:· "A block must
`
`13· ·be erased, setting all cells to one."· In
`
`14· ·that context, if that satisfies your
`
`15· ·question, that's the -- that's what I have on
`
`16· ·the declaration.
`
`17· · · ·Q.· · That sentence says a block must be
`
`18· ·erased, yes or no?
`
`19· · · ·A.· · That's just one phrase.· The block
`
`20· ·must be erased before the program operation
`
`21· ·can accurately write the series of zeros and
`
`22· ·ones to the -- to another quanta, or maybe
`
`23· ·the same quanta of memory elements or
`
`24· ·different quanta.
`
`25· · · ·Q.· · Yes or no, please.· The sentence
`
`Vervain Ex. 2015, p.28
`Micron v. Vervain
`IPR2021-01547
`
`
`
`·1· ·says, "A block must be erased, setting all
`
`Page 29
`
`·2· ·cells to one."
`
`·3· · · ·A.· · Yes.
`
`·4· · · ·Q.· · Do you see that phrase?
`
`·5· · · ·A.· · Yes.· That's what it says right
`
`·6· ·here, yes.
`
`·7· · · ·Q.· · And how is the block erased?
`
`·8· · · ·A.· · The best way to explain it, as I
`
`·9· ·have done so, because it's -- the effect is
`
`10· ·really -- in the case of what we just
`
`11· ·discussed, in the case what I mentioned with
`
`12· ·the floating gate, erase is simply having
`
`13· ·smaller amount of electrons on the floating
`
`14· ·gate compared to the program.
`
`15· · · · · · ·That another way, but that's --
`
`16· ·that's just depending on the -- the -- that's
`
`17· ·not the fixed convention.· So, what I am
`
`18· ·trying to say is that the convention of erase
`
`19· ·is really setting the state of all the cells
`
`20· ·to a logical one.· To the extent it is
`
`21· ·reflective of having a large number of charge
`
`22· ·or having a little amount of charge, that
`
`23· ·depends on the architecture.· It depends on
`
`24· ·the cell that you are using.· But suffice to
`
`25· ·say, in this example, with the floating gate,
`
`Vervain Ex. 2015, p.29
`Micron v. Vervain
`IPR2021-01547
`
`
`
`·1· ·it is to -- since we mention small number of
`
`·2· ·charge, it is to set the charge to be a small
`
`Page 30
`
`·3· ·number.
`
`·4· · · ·Q.· · You said in your response that
`
`·5· ·an erase is simply having a smaller amount of
`
`·6· ·electrons on the floating gate; right?
`
`·7· · · · · · ·MR. SAGDEO:· Object to form.
`
`·8· · · · · · ·THE WITNESS:· Sorry.
`
`·9· · · · · · ·MR. SAGDEO:· Object to form.
`
`10· · · · · · ·Go ahead, Dr. Liu.
`
`11· · · ·A.· · In the context what we just
`
`12· ·described in paragraph 46, where, again, to
`
`13· ·the host is really the convention of logical
`
`14· ·state that the host will see.· So, in the
`
`15· ·context of a floating-gate NAND structure,
`
`16· ·the way the host can see a logical one for
`
`17· ·erase is having a small amount of charge on
`
`18· ·the floating gate.· Therefore, it is -- I
`
`19· ·answer by saying that, when you asked about
`
`20· ·that, so the host, in order to see an erase
`
`21· ·state o
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