`Petitioner
`v.
`Vervain, LLC
`Patent Owner
`
`IPR2021-01547 (U.S. Patent No. 8,891,298)
`IPR2021-01548 (U.S. Patent No. 9,196,385)
`
`Micron’s Hearing Demonstratives
`
`January 12, 2023
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`IPR2021-01547, -01548
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`DEMONSTRATIVE EXHIBIT – NOT EVIDENCE
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`1
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`Micron Ex. 1069, p. 1
`Micron v. Vervain
`IPR2021-01547, -01548
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`
`
`Roadmap
`
`1. The 298 and 385 IPR Grounds
`2. The 298 and 385 Patents
`3. The 298 IPR
`A.
`Claim Construction: “Blocks”
`B.
`The Moshayedi Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`i.
`
`C.
`
`ii.
`
`i.
`
`POR Arguments Fail
`The Sutardja Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`ii.
`
`POR Arguments Fail
`PO’s Baseless Attacks Against Dr. Liu
`D.
`4. The 385 IPR Unique Issues
`A.
`The Moshayedi Ground 2 Renders Obvious Claims 12 and 13
`B.
`The Sutardja Ground 1 Renders Obvious Claim 13
`
`
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`2
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`Micron Ex. 1069, p. 2
`Micron v. Vervain
`IPR2021-01547, -01548
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`
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`Roadmap
`
`1. The 298 and 385 IPR Grounds
`2. The 298 and 385 Patents
`3. The 298 IPR
`A.
`Claim Construction: “Blocks”
`B.
`The Moshayedi Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`i.
`
`C.
`
`ii.
`
`i.
`
`POR Arguments Fail
`The Sutardja Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`ii.
`
`POR Arguments Fail
`PO’s Baseless Attacks Against Dr. Liu
`D.
`4. The 385 IPR Unique Issues
`A.
`The Moshayedi Ground 2 Renders Obvious Claims 12 and 13
`B.
`The Sutardja Ground 1 Renders Obvious Claim 13
`
`
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`3
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`Micron Ex. 1069, p. 3
`Micron v. Vervain
`IPR2021-01547, -01548
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`298 Instituted Grounds
`
`• Moshayedi Grounds
`- Claims 1-5, 11 are obvious over Moshayedi and Dusija in view of the knowledge of a POSA (ground 3)
`- Claim 11 is obvious over Moshayedi, Dusija, and Sutardja in view of the knowledge of a POSA (ground 4)
`
`• PO argues only that Moshayedi in view of Dusija does not render obvious the hot block limitations of claim 1
`
`298 Petition (Paper 1), 6; 298 Reply (Paper 24), 1.
`
`• Sutardja Grounds
`- Claims 1-5, 11 are obvious over Dusija and Sutardja in view of the knowledge of a POSA (ground 1)
`- Claims 8-9 are obvious over Dusija, Sutardja, and Li in view of the knowledge of a POSA (ground 2)
`
`• PO argues only that Dusija in view of Sutardja does not render obvious the hot block limitations of claim 1
`
`298 Petition (Paper 1), 6; 298 Reply (Paper 24), 1.
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`4
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`Micron Ex. 1069, p. 4
`Micron v. Vervain
`IPR2021-01547, -01548
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`
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`385 Instituted Grounds
`
`• Moshayedi Grounds
`- Claims 1-5, 11-13 are obvious over Moshayedi and Dusija in view of the knowledge of a POSA (ground 2)
`- Claim 11 is obvious over Moshayedi, Dusija, and Sutardja in view of the knowledge of a POSA (ground 3)
`
`• PO makes the same challenges against hot block limitations of claim 1 and similar challenges to claims 12-13
`(cold block limitations)
`
`385 Petition (Paper 1), 6; 385 Reply (Paper 23), 15.
`
`• Sutardja Grounds
`- Claims 1-5 and 11-13 are obvious over Dusija and Sutardja in view of the knowledge of a POSA (ground
`1)
`
`• PO makes the same challenges against hot block limitations of claim 1 and a similar challenge to claim 13
`
`385 Petition (Paper 1), 6; 385 Reply (Paper 23), 24.
`
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`5
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`Micron Ex. 1069, p. 5
`Micron v. Vervain
`IPR2021-01547, -01548
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`
`
`Roadmap
`
`1. The 298 and 385 IPR Grounds
`2. The 298 and 385 Patents
`3. The 298 IPR
`A.
`Claim Construction: “Blocks”
`B.
`The Moshayedi Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`i.
`
`C.
`
`ii.
`
`i.
`
`POR Arguments Fail
`The Sutardja Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`ii.
`
`POR Arguments Fail
`PO’s Baseless Attacks Against Dr. Liu
`D.
`4. The 385 IPR Unique Issues
`A.
`The Moshayedi Ground 2 Renders Obvious Claims 12 and 13
`B.
`The Sutardja Ground 1 Renders Obvious Claim 13
`
`
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`6
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`Micron Ex. 1069, p. 6
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`IPR2021-01547, -01548
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`Specification of 298 and 385 Patents: Non-Volatile Memory with SLC and
`MLC Memory Modules
`• The specification discloses a non-volatile
`memory system (e.g., flash memory) with two
`types of memory: SLC (single-level cells) and
`MLC (multi-level cells).
`
`298 Petition (Paper 1), 18.
`
`• SLC and MLC characteristics were well known:
`- SLC: have greater endurance (can sustain more
`writes), but are more expensive than MLC
`- MLC: can store more data per unit cost than SLC
`
`298 Petition (Paper 1), 15, 17 (citing Ex. 1016 (Friedman),
`Ex. 1020 (Lee), and Ex. 1009 (298 Liu Decl.)).
`
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`7
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`298 Patent, Fig. 1; ID (Paper 13), 4.
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`Micron Ex. 1069, p. 7
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`Specification of 298 and 385 Patents: Controller Maintains an Address Map
`for Logical to Physical Address Translation
`• The specification discloses that the system includes a controller that maps logical
`addresses (e.g., logical blocks) to physical addresses (e.g., physical blocks):
`
`298 Patent, 2:65-3:1; 298 Reply (Paper 24), 3-4, 5, n. 3.
`
`• For example, the specification teaches that in the event of a data integrity test failure,
`the controller will remap a logical address to a new physical SLC address.
`298 Patent, 6:12-23; 298 Petition (Paper 1), 19.
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`8
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`Micron Ex. 1069, p. 8
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`Specification of 298 and 385 Patents: Hot and Cold Block Disclosure
`
`• Central to the remaining disputes, the specification:
`- discloses allocating hot blocks, i.e., frequently written blocks, to SLC (which have greater endurance);
`and
`- discloses allocating cold blocks, i.e., infrequently written blocks, to MLC (which store data more
`densely).
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`9
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`298 Patent, 6:24-35;
`298 Petition (Paper 1), 20.
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`Micron Ex. 1069, p. 9
`Micron v. Vervain
`IPR2021-01547, -01548
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`Specification of 298 and 385 Patents: Hot Block Limitations
`
`• Hot Block Limitations:
`
`- Determine “hot blocks” by
`maintaining a “count”
`
`- “Allocate those blocks” to SLC
`“by transferring the respective
`contents”
`
`298 Patent, Claim 1, 6:24-35; 298 Petition (Paper 1), 20.
`
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`10
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`Micron Ex. 1069, p. 10
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`IPR2021-01547, -01548
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`Differences Between 298 and 385 Claims
`
`• Claim 1 of the 385 Patent differs in that it discloses an “FTL.” No PO arguments relate to
`this difference.
`
`385 Petition (Paper 1), 34-36.
`
`• Claims 12-13 of the 385 Patent claim cold block functionality. PO challenges this unique
`aspect of the 385 Patent claims (see infra).
`
`385 Petition (Paper 1), 20, 48-50.
`
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`11
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`Micron Ex. 1069, p. 11
`Micron v. Vervain
`IPR2021-01547, -01548
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`
`
`Roadmap
`
`1. The 298 and 385 IPR Grounds
`2. The 298 and 385 Patents
`3. The 298 IPR
`A.
`Claim Construction: “Blocks”
`B.
`The Moshayedi Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`i.
`
`C.
`
`ii.
`
`i.
`
`POR Arguments Fail
`The Sutardja Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`ii.
`
`POR Arguments Fail
`PO’s Baseless Attacks Against Dr. Liu
`D.
`4. The 385 IPR Unique Issues
`A.
`The Moshayedi Ground 2 Renders Obvious Claims 12 and 13
`B.
`The Sutardja Ground 1 Renders Obvious Claim 13
`
`
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`IPR2021-01547, -01548IPR2021-01547, -01548
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`12
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`Micron Ex. 1069, p. 12
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`IPR2021-01547, -01548
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`Claim Construction: POPR and Institution Decision
`
`• PO made the implicit claim construction argument that the claimed “blocks” actually mean
`“physical blocks”:
`
`• The Board, at the institution phase, rejected PO’s argument because the claim recites
`“blocks,” not “physical blocks”:
`
`298 POPR (Paper 10), 38.
`
`
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`13
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`298 ID (Paper 13), 17; 298
`Reply (Paper 24), 2.
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`Micron Ex. 1069, p. 13
`Micron v. Vervain
`IPR2021-01547, -01548
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`Claim Construction: The POR Doubles Down On Its Erroneous
`Construction that Requires Physical Blocks
`• PO argues that “blocks” should be construed to mean “physical blocks” (excluding “logical
`blocks” from the claim scope):
`
`298 POR (Paper 18), 24; 298 Reply (Paper 24), 2.
`
`• PO’s sur-reply disingenuously argues that its construction is not physical blocks.
`298 Sur-reply (Paper 32), 2.
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`14
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`Micron Ex. 1069, p. 14
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`Claim Construction: POR’s Construction Fails—Summary
`
`• PO’s construction is legally erroneous for at least five reasons:
`
`1. Patentee deliberately chose to claim “blocks,” not “physical blocks”;
`
`2. The surrounding claim language confirms that the “blocks” includes “logical blocks”;
`
`3. The claim would be nonsensical if “blocks” did not include “logical blocks” within its scope;
`
`4. PO fails to cite any disclaimer or definition; and
`
`5. The full record establishes that PO’s entire alleged basis for its construction is factually
`incorrect.
`
`298 Reply (Paper 24), 2-6.
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`15
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`Micron Ex. 1069, p. 15
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`IPR2021-01547, -01548
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`Claim Construction: (1) The Specification Demonstrates That Patentee
`Knew How to Claim “Logical Block,” “Physical Block,” and “Block”
`• Claim 1 recites, e.g., “at least one MLC non-volatile memory module comprising a plurality of
`individually erasable blocks.”
`• The patentee knew how to recite “logical blocks,” “physical blocks,” and “blocks”:
`298 Reply (Paper 24), 3.
`
`298 Patent, 2:13-15; 298 Reply (Paper 24), 3.
`
`298 Patent, 2:65-3:6; 298 Reply (Paper 24), 3.
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`16
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`298 Patent, 6:24-29; 298 Reply (Paper 24), 3.
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`Micron Ex. 1069, p. 16
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`IPR2021-01547, -01548
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`Claim Construction: (1) Construction of “Blocks” Must Reflect Patentees
`Choice of Words
`• Federal Circuit precedent mandates that patentee be held to his deliberate choice of broad
`claim language.
`
`“[I]f Lilly had desired to limit the claims to ‘human patients,’ it could have used that
`language instead of ‘patient.’ Since Lilly chose to use the broader term[ ] . . .‘patient,’ the
`scope of the claims should reflect its choice of words.” Novo Nordisk A/S v. Eli Lilly & Co.,
`No. CIV.A.: 98-643 MMS, 1999 WL 1094213, at *17 (D. Del. Nov. 18, 1999).
`
`“Independent claims … contain ‘a magazine catch bar’ … Nothing in the language of [the]
`claims … limits the scope of the generic term ‘magazine catch bar’ to exclude one that
`was factory installed—specifically, as Juggernaut asserts, factory installed as part of an
`original firearm with a detachable magazine.” Evolusion Concepts, Inc. v. HOC Events,
`Inc., 22 F.4th 1361, 1366-67 (Fed. Cir. 2022).
`
`298 Reply (Paper 24), 3.
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`17
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`Micron Ex. 1069, p. 17
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`Claim Construction: (2) “Blocks” Exist in Two Forms: The Logical Form
`and the Physical Form
`• To start, it was well known that a “block” includes both its logical form and its physical form,
`and the controller uses a map to associate both forms:
`
`Ex. 1019 (Micheloni), 41; 298 Petition, 16-17; Ex. 1009 (298 Liu Decl.) ¶¶ 60-75;
`298 Reply (Paper 24), 4, n. 2 (citing 298 Patent, 2:59-3:13).
`
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`18
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`Micron Ex. 1069, p. 18
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`Claim Construction: (2) The Surrounding Claim Language Confirms
`“Block” Includes Both Its Logical and Physical Form
`• The claim expressly recites a map that associates both forms of the “block”:
`
`298 Patent, Claims 1-2; 298 Reply (Paper 24), 3-4.
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`19
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`Micron Ex. 1069, p. 19
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`Claim Construction: (2) Dr. Khatri Admits Such Maps Associate the Two
`Forms of a Block
`• PO’s expert, Dr. Khatri, confirms that the claim’s “map” is what maps the logical block form
`to its physical block form:
`
`Ex. 2014 ( 298 Khatri Decl.), ¶ 33; 298 Reply (Paper 24), 4.
`
`• PO’s sur-reply argument that claim 1 does not recite “logical block” thus fails because the
`claim (1) recites the generic “block” term, and (2) expressly recites an address map that
`associates the logical and physical forms of the block.
`298 Sur-reply (Paper 32), 3-4; 298 Reply (Paper 24), 3-4.
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`20
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`Micron Ex. 1069, p. 20
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`Claim Construction: (3) PO’s Construction Renders the Claim Nonsensical
`
`• The claim recites allocating “those blocks” to the SLC module—“physical blocks” do not, of
`course, move to a different module:
`
`298 Patent, Claim 1; 298 Reply (Paper 24), 4.
`
`• Thus, even if PO’s construction were correct for the initial claim reference to “block” (it’s
`not), “those blocks” in the relevant hot and cold block limitations must include logical
`blocks.
`- “[T]he patentee’s mere use of a term with an antecedent does not require that both terms have the
`same meaning” where a uniform reading is “nonsensical.” Microprocessor Enhancement Corp. v.
`Texas Instruments Inc., 520 F.3d 1367, 1375 (Fed. Cir. 2008).
`
`298 Reply (Paper 24), 6.
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`Micron Ex. 1069, p. 21
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`Claim Construction: (3) Dr. Khatri Admits There Is Allocation of a Logical
`Block
`• Dr. Khatri admits that allocating refers to remapping the logical block address to the SLC
`module:
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`22
`
`Ex. 1059 (Khatri Depo.),
`104:3-11; 298 Reply
`(Paper 24), 4.
`
`Micron Ex. 1069, p. 22
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`Claim Construction: (3) PO’s Sur-Reply Argument Fails
`
`• In sur-reply, PO argues that the “allocating” limitation defines how the allocation occurs,
`namely, the allocation occurs “by transferring the contents of those blocks to the at least
`one SLC non-volatile memory module.”
`
`298 Sur-reply (Paper 32), 4.
`
`• This is no rebuttal—it only confirms that the allocation is of a logical block.
`
`• As Dr. Liu explains and the prior art demonstrates, the transfer of data to a new block also
`requires remapping the logical block to the new physical block. Otherwise, the logical
`block address would point to incorrect data.
`298 Petition (Paper 1), 43-44; Ex. 1009, (298 Liu Decl.), ¶ 156; 298 Reply (Paper 24), 11, 23,
`Ex. 1057 (Liu Reply Decl.), ¶ 46 (citing, e.g., Ex. 1046 (Weathers), 7:54-66).
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`23
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`Micron Ex. 1069, p. 23
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`Claim Construction: (4) PO Cites No Definition or Lexicography
`
`• PO’s construction requires reading “physical” into “block.”
`
`• That would require “precise and clear language” in the specification. Acceleration Bay,
`LLC v. Activision Blizzard Inc., 908 F.3d 765, 770-71 (Fed. Cir. 2018).
`
`• To the contrary, the only relevant embodiment broadly uses “blocks”:
`
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`24
`
`298 Patent, 6:24-35;
`298 Reply (Paper 24), 6.
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`Micron Ex. 1069, p. 24
`Micron v. Vervain
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`Claim Construction: (5) PO’s Premise for Its Construction Was Proven
`Incorrect During Trial
`• PO argues that its construction is correct, because the claims recite “individually erasable
`blocks” and only physical blocks are erasable:
`
`• It was well known that logical blocks are erasable, even in the context of hot and cold
`blocks disclosures:
`
`298 POR (Paper 18), 24;
`298 Reply (Paper 24), 4-5.
`
`Ex. 1012 (Moshayedi), Claim 2; 298 Reply
`(Paper 24), 5; see also 298 Reply (Paper
`24), 5 (citing Ex. 1061 (Linnell), 3:54-4:2,
`Ex. 1062 (Gorobets III), 2:10-34).
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`25
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`Micron Ex. 1069, p. 25
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`Claim Construction: (5) PO’s Backtracking in Sur-reply Fails
`
`• PO now admits that logical blocks are erasable by the host.
`
`298 Sur-reply (Paper 32), 4.
`
`• PO now argues that this is irrelevant because “claim 1 recites functionality the controller
`performs regarding the claimed ‘blocks,’ and the specification explains the controller deals
`with physical groups of memory cells.”
`- Put another way, PO argues that the “controller deals with blocks at a physical level.”
`298 Sur-reply (Paper 32), 4-6.
`
`• As the following explains, PO is wrong on at least three counts.
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`26
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`Micron Ex. 1069, p. 26
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`Claim Construction: (5)(i) The Claims Do Not Recite That the Blocks Are
`“Erasable” by the Controller
`• First, the claim does not recite that the blocks are “erasable” by the controller. To the
`contrary, the claim expressly disconnects the controller operation from the “erasable”
`nature of the blocks:
`
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`27
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`298 Patent, Claim 1;
`298 Reply (Paper 24), 3-4, 5, n. 3;
`298 Sur-reply (Paper 32), 4.
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`Micron Ex. 1069, p. 27
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`Claim Construction: (5)(ii) PO’s Premise Is, Again, Incorrect
`
`• Second, the controller absolutely
`operates on logical blocks.
`
`• The claim itself states that the controller
`maintains the logical to physical block
`address map and remaps a logical
`address entry (e.g., a logical block) to a
`new physical address (e.g., a physical
`block).
`
`298 Reply (Paper 24), 5, n.3; 298 Petition (Paper 1), 19.
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`28
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`Micron Ex. 1069, p. 28
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`Claim Construction: (5)(iii) The Controller Does Effectuate the Erase of
`Logical Blocks
`
`• Third, even if the claim did recite that the controller erases the blocks (it doesn’t), a
`controller does effectuate the erase of a logical block.
`
`• While a host issues the erase command of a logical block, it was well known that the
`controller would erase the logical block by either “mark[ing] the corresponding physical
`block invalid” or “caus[ing] the erasure of the physical block.”
`
`Ex. 1057 (298 Liu Reply Decl.) ¶ 17 (citing Ex. 1061 (Linnell), 7:9-19, 7:48-67); 298 Reply (Paper 24), 5.
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`29
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`Micron Ex. 1069, p. 29
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`Claim Construction: PO’s Sur-reply “Modules” Argument Fails
`
`• In sur-reply, PO argues that “modules” means the “blocks” must be physical blocks.
`298 Sur-reply (Paper 32), 5.
`
`• This fails on two counts.
`
`• First, PO cites only the claim language for support. But for all of the previous reasons,
`supra, the claim language does not support that “blocks” means “physical blocks.”
`298 Sur-reply (Paper 32), 5.
`• Second, the claim expressly provides that the “modules” include the logical form of blocks:
`
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`30
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`298 Patent, Claims 1-2; 298 Reply (Paper 24), 3-4.
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`Micron Ex. 1069, p. 30
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`
`
`Roadmap
`
`1. The 298 and 385 IPR Grounds
`2. The 298 and 385 Patents
`3. The 298 IPR
`A.
`Claim Construction: “Blocks”
`B.
`The Moshayedi Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`i.
`
`C.
`
`ii.
`
`i.
`
`POR Arguments Fail
`The Sutardja Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`ii.
`
`POR Arguments Fail
`PO’s Baseless Attacks Against Dr. Liu
`D.
`4. The 385 IPR Unique Issues
`A.
`The Moshayedi Ground 2 Renders Obvious Claims 12 and 13
`B.
`The Sutardja Ground 1 Renders Obvious Claim 13
`
`
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`31
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`Micron Ex. 1069, p. 31
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`The Petition Demonstrated That Moshayedi in View of Dusija Renders Obvious
`the Hot Block Limitations Under Two Independent Sets of Disclosures
`• As to the Moshayedi Grounds, the Petition relies on two sets of Moshayedi disclosures:
`Its physical erase count disclosures that swap data from frequently-written MLC blocks to SLC
`1.
`(using the erase count); and
`
`298 Petition (Paper 1), 60-65; Ex. 1012 (Moshayedi), [0032], [0049]; 298 Reply (Paper 24), 6-7.
`
`2.
`
`Its logical write count disclosures that swap data from frequently-written MLC blocks to SLC (using
`the write count).
`
`298 Petition (Paper 1), 60-65; Ex. 1012 (Moshayedi), [0024]; 298 Reply (Paper 24), 6-7.
`
`• The relevant logical write count disclosures are the same as the physical block erase count
`disclosures, other than the logical count distinction, and thus the following discussion focuses on the
`“swap” with respect the physical block erase count disclosures.
`
`- The logical write count disclosures separately render the claims unpatentable to the extent the
`Board rejects PO’s attempt to construe “blocks” as “physical blocks.”
`298 Petition (Paper 1), 60-65; 298 Reply (Paper 24), 15.
`
`
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`32
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`Micron Ex. 1069, p. 32
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`The Petition Demonstrated That Moshayedi’s Erase Count Disclosures
`Disclose (and at Least Render Obvious) the Hot Block Limitations
`• The Petition demonstrated that when the erase count exceeds a threshold, the next write
`operation triggers a swap in which the MLC data is moved to SLC:
`
`• The Petition also demonstrated that it would have been obvious to perform the “swap” as a
`background operation (not in connection with a write operation).
`
`298 Petition (Paper 1), 64.
`
`Ex. 1012 (Moshayedi), [0032];
`298 Petition (Paper 1), 63-64.
`
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`33
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`Micron Ex. 1069, p. 33
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`The POPR Arguments
`
`• As to the erase count disclosures:
`- The POPR argued that Moshayedi discloses redirecting only the “data that is supposed to be
`written to the MLC block” to SLC.
`- The POPR argued that it would not be obvious for Moshayedi to move data from a physical block
`because Moshayedi states that the “swap” “occurs as part of the write process.”
`
`• As to the write count disclosures, the POPR additionally argued that Moshayedi’s write
`count does not satisfy the claims because it is an access count for “logical addresses,” not
`for “physical blocks” (which as discussed above, was rejected based on claim construction
`of “blocks”).
`
`298 POPR (Paper 10), 57-58.
`
`
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`34
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`Micron Ex. 1069, p. 34
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`The Institution Decision: Moshayedi “Swap” Disclosures
`
`• The Board, at the institution phase, rejected PO’s arguments, citing: (1) Dr. Liu’s testimony
`explaining that the data associated with the MLC logical block is transferred to SLC and (2)
`Moshayedi’s disclosures do not mean that only “new” data (from the incoming write) is moved to
`SLC:
`
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`35
`
`298 ID (Paper 13), 30.
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`Micron Ex. 1069, p. 35
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`The Institution Decision: Background Operations for Data Were Well
`Known
`• The Board, at the institution phase, noted that PO did not address the Petition’s supported
`showing that performing background operations that move data between MLC and SLC
`(and vice versa) was well known:
`
`
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`36
`
`298 ID (Paper 13), 31.
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`Micron Ex. 1069, p. 36
`Micron v. Vervain
`IPR2021-01547, -01548
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`
`
`Roadmap
`
`1. The 298 and 385 IPR Grounds
`2. The 298 and 385 Patents
`3. The 298 IPR
`A.
`Claim Construction: “Blocks”
`B.
`The Moshayedi Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`i.
`
`C.
`
`ii.
`
`i.
`
`POR Arguments Fail
`The Sutardja Grounds
`The Petition, Preliminary Response, and Institution Decision
`
`ii.
`
`POR Arguments Fail
`PO’s Baseless Attacks Against Dr. Liu
`D.
`4. The 385 IPR Unique Issues
`A.
`The Moshayedi Ground 2 Renders Obvious Claims 12 and 13
`B.
`The Sutardja Ground 1 Renders Obvious Claim 13
`
`
`
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`37
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`Micron Ex. 1069, p. 37
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`
`PO Argument Fails: Summary
`
`• PO mounts a single attack: PO argues that Moshayedi does not disclose or render obvious
`the “transferring” limitation (“transferring the respective contents of those blocks to the at
`least one SLC non-volatile memory module”) because allegedly only “new” data
`(associated with the incoming write) is written to SLC.
`
`298 POR (Paper 18), 57-63; 298 Reply (Paper 24), 8.
`
`• This argument fails for three independent reasons:
`
`1. PO relies on an erroneous, implicit construction of the “transferring” limitation.
`
`2. PO misinterprets Moshayedi—Moshayedi discloses transferring contents from physical MLC blocks
`to physical SLC blocks (satisfying the limitation under its erroneous construction).
`
`3. PO fails to rebut the Petition’s showing that performing such operations (physical block data
`transfers) as background operations was both well known and had well-known benefits (satisfying
`the limitation under PO’s erroneous construction).
`
`298 Reply (Paper 24), 8-15.
`
`
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`38
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`Micron Ex. 1069, p. 38
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`
`
`(1) PO’s Attempt to Improperly Import Limitations into the Transferring
`Limitation
`• PO’s attempt to distinguish Moshayedi lays bare its erroneous implicit construction:
`
`298 POR (Paper 18), 59; 298 Reply (Paper 24), 9.
`• PO’s attempt to rewrite the transferring limitation:
`- “by transferring the respective contents of [in] those [physical] blocks [before the allocation]”
`
`• PO, in sur-reply, doubles down that its basis for this implicit construction is construing
`“blocks” as “physical blocks” (arguing that its interpretation relies on “blocks” as “properly
`construed”).
`
`298 Sur-reply (Paper 32), 7-8.
`
`
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`39
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`Micron Ex. 1069, p. 39
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`(1) PO’s Erroneous Construction Fails On Multiple Grounds
`
`1. The claims recite “contents of those blocks,” and there is no basis to limit this to
`“contents in those physical blocks” (see supra).
`
`298 Reply (Paper 24), 9.
`2. There is no definition or disclaimer to limit the “transferring” to physical block content. If
`anything, the specification’s only example suggests transferring content of logical blocks
`(from a write operation) to SLC:
`
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`40
`
`298 Patent, 6:24-35;
`298 Reply (Paper 24), 9.
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`Micron Ex. 1069, p. 40
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`IPR2021-01547, -01548
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`(1) PO Erroneously Interprets Moshayedi as Only Transferring “New” Data
`to SLC
`• PO interprets Moshayedi’s swap as only redirecting a new block to SLC:
`
`298 POR (Paper 18), 57;
`298 Reply (Paper 24), 8.
`
`• This is incorrect (see infra).
`
`• But even if true, this would satisfy the transferring limitation under its plain and ordinary
`meaning.
`
`298 Reply (Paper 24), 8.
`
`
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`41
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`Micron Ex. 1069, p. 41
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`
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`(1) There Can Be No Dispute That Moshayedi’s “New” Data Alone Satisfies
`the Transferring Limitation
`• The “new” data is “the respective contents of those blocks” (logical blocks of SLC) (i.e.,
`contents of an LBA that exceeds the write threshold).
`- Moshayedi expressly states that such “new” data is “associated with a particular LBA,” i.e., is the
`content of a logical block.
`• The write of that “new” data to SLC “transfer[s] the respective contents of those blocks to
`the at least one SLC non-volatile memory module”:
`
`298 Reply (Paper 24), 8.
`
`
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`42
`
`Ex. 1012 (Moshayedi), [0024];
`298 Reply (Paper 24), 8.
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`Micron Ex. 1069, p. 42
`Micron v. Vervain
`IPR2021-01547, -01548
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`(2) PO Misinterprets Moshayedi by Attempting to Limit its “Swap” to Only
`“New” Data
`• As the Board correctly noted in the ID, PO has not shown that Moshayedi does not transfer
`data from physical MLC blocks to physical SLC blocks.
`
`298 ID (Paper 13), 30.
`
`• In addition to Moshayedi [0032] that the Board cites, the Petition cites Moshayedi [0049],
`which demonstrates that separate and apart from the transfer of “new” write data,
`Moshayedi discloses copying physical MLC block data to the SLC physical block:
`
`“new” data from write
`
`data from physical block
`
`empty physical block can
`be erased
`
`Ex. 1012 (Moshayedi), [0049]; 298 Petition (Paper 1), 64.
`
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`43
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`Micron Ex. 1069, p. 43
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`(2) The Reply Further Exposes PO’s Misinterpretation
`
`• The Reply further demonstrates PO’s error:
`
`Ex. 1012 (Moshayedi), [0048]; 298 Reply (Paper 24), 12.
`
`data from physical block
`is copied to new physical
`block
`
`data from physical block
`is copied to new physical
`block
`
`Ex. 1012 (Moshayedi), [0059]; 298 Reply (Paper 24), 13.
`
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`44
`
`Micron Ex. 1069, p. 44
`Micron v. Vervain
`IPR2021-01547, -01548
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`(2) In Sur-reply, PO Does Not Address the Merits of the Reply’s Challenge
`to PO’s Interpretation of Moshayedi
`• In sur-reply, PO alleges only that the Petition does not cite certain of the preceding
`paragraphs for limitation [1.G] (¶¶ 47-48, 59, 68)—but completely ignores the description of
`the swap in ¶ 49.
`
`298 Sur-reply (Paper 32), 9.
`
`• The Reply properly expands its citations to respond to PO’s argument:
`- Apple Inc. v. Andrea Elecs. Corp., 949 F.3d 697, 707 (Fed. Cir. 202