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Rtprvduced By GLOBAL
`ENGINEERING DOCUMENTS
`W-rlh TIie Permission of [IA
`Uruler Royalty ACl'ftllltnt
`
`JEDEC
`STANDARD
`
`<
`I
`0
`
`0 -0
`"' w -,
`
`Terms, Definitions, and Letter
`Symbols for Microcomputers,
`Microprocessors, and Memory
`Integrated Circuits

`
`JESD100-A
`
`(Revision of JEDEC Standard No. 100)
`
`AUGUST 1993
`
`ELECTRONIC INDUSTRIES ASSOCIATION
`ENGINEERING ·oEPARTMENT
`
`Solti State Tedmology Association
`,y IHS Marki under icense with JEDEC
`uction or networ1dng perrritted without license trom IHS
`
`Ofdor Number: W~260925
`Sold 10:CAMElBACK COMPUTER ARCHITECTUR {205657100001).
`Not for Aosnle,?021,01•22 03:19;49 UTC
`. ·--·-·
`
`·-·-·
`
`...
`
`MICROCHIP TECH. INC. - EXHIBIT 1020
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 001
`
`

`

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`
`JEDEC Standard No. 100-A
`Page 4
`
`1. GENERAL CONCEPTS AND TYPES (cont'd)
`
`cycle
`
`(1) A sequence of operations in which one set of events is completed.
`
`(2) Any set of operations that is repeated regularly in the same sequence. The
`operations may be subject to variations on each repetition. (ANSI X3. 172)
`
`data bus
`
`A bus used to communicate data internally and externally to and from processing
`units, storage devices, or peripheral devices. (Adapted from ANSI X3.172.)
`
`data retention mode
`
`A standby or battery mode of operation in which the integrity of stored data is
`maintained although the supply voltage is below that specified for reading or writing.
`
`duplex transmission
`
`Data transmission in both directions simultaneously.
`
`(ANSI X3.172)
`
`dynamic (read/Write) memory (DRAM)
`
`A read/write memory in which the cells require the repetitive application of control
`signals generated inside or outside the integrated circuit in order to retain stored data.
`(Adapted from IEC 748-2.)
`
`NOTE 1 : The words •read/write• may be omitted from the term when no
`misunderstanding is likely.
`
`NOTE 2: Each repetitive application of the control signals is normally called a refresh
`operation or cycle.
`
`NOTE 3: A dynamic memory may use static addressing or sensing circuits.
`
`NOTE 4: Contrast with static (read/write) memory.
`
`electrically alterable read-only memory (EAROM)
`
`Synonym for ·electrically erasable programmable read-ooly memory'.
`
`electrically erasable programmable~
`
`meuoy (EEPROM)
`
`A reprogrammable read-only memory in ~ eels may be erased electrically and in
`which each cell may be reprogrammed eiec:t·'i::a?y
`
`erasable programmable read-Only memay ~
`
`A reprogrammable read-only memo,y :..- :'"li::r. a ~ :7?f be simultaneously erased
`.. ..IJ~i,ng ultraviolet light and in which eac- oa.
`!le --e:rog-ammed electrically.
`-;
`
`Copyrigt< Solid Slate Technology Association
`Pro•1ided by IHS Markit under license with JEOEC
`..... ,....:no.◄ wi1M1n license trom IHS
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`MICROCHIP TECH. INC. - EXHIBIT 1020
`MICROCHIP TECH. INC. V. HD SILICON SOLS. - IPR2021-01265 - Page 002
`
`

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