`_______________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`_______________
`
`TIANMA MICROELECTRONICS CO. LTD.,
`Petitioner,
`v .
`JAPAN DISPLAY INC. AND
`PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.,
`Patent Owners
`_______________
`Case IPR No: IPR2021-01060
`Patent No. 10,330,989
`_______________
`
`DECLARATION OF THOMAS L. CREDELLE
`UNDER 37 C.F.R. § 1.68
`
`
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`JDI/PLD - EX. 2010
`TIANMA MICROELECTRONICS
`CO. LTD. v. JDI/PLD
`IPR2021-01060
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`
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`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
`
`TABLE OF CONTENTS
`
`I.
`I.
`II.
`III.
`
`Introduction ...................................................................................................... 2
`Qualifications and Professional Experience .................................................... 4
`Level of Ordinary Skill in the Art ................................................................... 8
`THE CHALLENGED CLAIMS are not invalid as obvious in light of
`the prior art. ...................................................................................................10
`A.
`Ground 1: The Combination of Yuh, Ohta, and Abe Does Not
`Render Claims 1 and 2 Obvious. .........................................................11
`Ground 2: The Petition Fails to Show that Yuh in Combination
`Ohta, Abe, and Kim Renders Claim 2 Obvious. .................................26
`Ground 3: The Petition Fails to Show that Yuh in Combination
`Kurahashi Renders Claims 1 and 2 Obvious. .....................................26
`Ground 4: The Petition Fails to Show that Yuh in Combination
`Kurahashi, and Kim Renders Claim 2 Obvious. .................................43
`IV. CONCLUSION ..............................................................................................43
`
`B.
`
`C.
`
`D.
`
`–1–
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`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
`
`I.
`
`INTRODUCTION
`
`1.
`
`I submit this declaration in support of the preliminary response
`
`submitted by of Japan Display Inc. and Panasonic Liquid Crystal Display Co., Ltd.
`
`(“Patent Owner”) in connect with the petition for Inter Partes Review of U.S. Patent
`
`No. 10,330,989 (“the ’989 patent”) filed by Tianma Microelectronics Co. Ltd.
`
`(“Petitioner”).
`
`2.
`
`I am not an employee of Japan Display Inc., Panasonic Liquid Crystal
`
`Display Co., Ltd., or of any affiliate or subsidiary thereof.
`
`3.
`
`I am being compensated for my work in this matter at the rate of
`
`$400/hour. I am also being reimbursed for reasonable and customary expenses
`
`associated with my work and testimony in this investigation.
`
`4.
`
`My compensation is not contingent on the outcome of this matter or the
`
`specifics of my testimony.
`
`5.
`
`I have been informed by Patent Owner’s counsel that Petitioner has
`
`challenged the validity of the ’989 patent. Specifically, I understand that Petitioner
`
`purports that claims 1 and 2 (the “Challenged Claims”) are invalid for obviousness
`
`under 35 U.S.C. § 103.
`
`6.
`
`I understand that Petitioner relies on the expert declaration of Mr.
`
`Richard Flasck dated June 21, 2021 (Ex. 1003) to challenge the validity of the ’989
`
`patent.
`
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`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
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`7.
`
`Accordingly, I have been asked to provide certain opinions relating to
`
`the patentability of the ’989 patent. Specifically, I have been asked to provide my
`
`opinions regarding (i) the level of ordinary skill in the art to which the ’989 patent
`
`pertains, and (ii) whether the Challenged Claims are rendered obvious by the prior
`
`art.
`
`8.
`
`As set forth in detail below, it is my opinion that the Challenged Claims
`
`of the ’989 patent are valid as they are not rendered obvious by the prior art under
`
`35 U.S.C. § 103.
`
`9.
`
`In the preparation of this declaration, I have studied:
`
`a.
`b.
`c.
`d.
`e.
`f.
`g.
`h.
`i.
`
`j.
`
`The ’989 patent, Ex. 1001;
`The prosecution history of the ’989 patent, Ex. 1002;
`Declaration of Mr. Richard Flasck, Ex. 1003;
`U.S. Patent No. 6,577,368 to Yuh, Ex. 1005;
`U.S. Patent App. Pub. No. 2001/009447 to Ohta, Ex. 1006;
`U.S. Patent No. 6,507,383 to Abe, Ex. 1007;
`U.S. Patent No. 6,600,541 to Kurahashi, Ex. 1008;
`U.S. Patent No. 6,580,487 to Kim, Ex. 1009;
`Prosecution History for U.S. Patent Application No. 10/237,91,
`Ex. 2007; and
`S. H. Lee, S.L. Lee, H.Y. Kim, T.Y. Eom, 16.4L: Late-News
`Paper: A novel Wide-Viewing-Angle Technology: Ultra-Trans
`View™, Hyundai Electronics Industries (1999 SID), Ex. 2009.
`
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`10.
`
`In forming the opinions expressed below, I have considered the
`
`documents listed above and my own knowledge and experience in the field of liquid
`
`crystal displays (“LCDs”), as described below.
`
`I.
`
`QUALIFICATIONS AND PROFESSIONAL EXPERIENCE
`
`11. My complete qualifications and professional experience are described
`
`in my Curriculum Vitae, a copy of which can be found in Ex. 2011. The following
`
`is a brief summary of my relevant qualifications and professional experience.
`
`12. As shown in my curriculum vitae, I have devoted my career to the
`
`research and development and product engineering of flat panel displays and
`
`materials/optics/electronics for flat panel displays. I have over 20 years of
`
`involvement in active-matrix LCD R&D, starting in 1983 at RCA Labs and
`
`continuing at GE. I led the product development of active-matrix LCDs for
`
`notebook computers at Apple in the early 90’s and had close collaboration with many
`
`LCD developers in Asia. Later in my career, I made significant contributions to the
`
`design and implementation of new pixel architectures for LCDs and OLEDs while
`
`at Clairvoyante; both efforts involved TFT design modifications to achieve the
`
`desired goals of high pixel transmission and reduced circuit complexity. More
`
`recently, I have been involved in several patent litigation cases which required a
`
`detailed knowledge of TFT design and processing.
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`13.
`
`I am currently the President of TLC Display Consulting and split my
`
`time between technical consulting and patent litigation support.
`
`14.
`
`I received my M.S. degree in Electrical Engineering from the
`
`Massachusetts Institute of Technology in 1970, with an emphasis on Electro optics
`
`and Solid-State Materials. I received my B.S. degree in Electrical Engineering in
`
`1969 from Drexel University.
`
`15.
`
`I was employed by RCA at Sarnoff Labs in Princeton, NJ from 1970
`
`through 1986 at first as a Member of the Technical Staff and later as a Group
`
`Manager in charge of all Active Matrix LCD research. During my time at RCA, I
`
`participated in research and development projects relating to optical materials and
`
`flat panel displays, including LCD devices. In 1983, I established the Thin Film
`
`Transistor (“TFT”) LCD Program at Sarnoff Labs. As a Group Manager, I led a
`
`project that resulted in the development of the first poly silicon TFT LCD at Sarnoff
`
`Labs. I received the Sarnoff Outstanding Achievement Award for Large Area Flat
`
`Panel TV Developments.
`
`16.
`
`From 1986 to 1991, I was employed by GE as the Manager of TFT
`
`LCD Research and Development at the GE Research and Development Center in
`
`Schenectady, NY. My duties included contributing to and managing research and
`
`development efforts relating to TFT and LCD technology for avionics applications.
`
`While employed by GE, I led the team that built the world’s first 1-million-pixel
`
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`color LCD device. I also led development of numerous other display devices
`
`utilizing LCD technology.
`
`17.
`
`From 1991 to 1994, I was employed by Apple Computer as the
`
`Manager of Display Engineering. In my role at Apple, I supervised all TFT-LCD
`
`design (in-house and at vendors), engineering, and qualification for the first
`
`PowerBook notebook computers introduced to market in the United States. A key
`
`part of my effort was the evaluation and development of active matrix LCDs with
`
`improved performance, such as viewing angle, contrast ratio and uniformity.
`
`18.
`
`From 1994 to 1996, I was employed as the Director of Advanced
`
`Product Marketing by Allied Signal, where I was involved with the design and
`
`engineering of optical films and custom focusing backlight designs for improving
`
`the viewing angle performance of LCD devices.
`
`19.
`
`From 1996 to 1999, I was employed as the Director of Product
`
`Marketing for Motorola’s Flat Panel Display Division, where I worked in the
`
`development of new flat panel technology, and I also worked closely with Motorola
`
`groups responsible for integrating TFT-LCD technology into mobile phone
`
`products.
`
`20.
`
`From 1999 to 2001, I served as the Vice President of Operations of
`
`Alien Technology Corporation. During my time at Alien Technology, I was
`
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`involved with the design and architecture of drive electronics packaging technology
`
`suitable for flexible LCD devices.
`
`21.
`
`From 2001 to 2007, I served as the Vice President of Engineering for
`
`Clairvoyante, Inc. My responsibilities as the VP of Engineering included managing
`
`research, development, engineering, and marketing of technologies for improving
`
`the resolution and power consumption of color flat panel displays, which required
`
`significant changes to the TFT-LCD layout. During my time at Clairvoyante, I was
`
`therefore heavily involved with the design of the active-matrix array and the LCD
`
`driving circuitry. My work resulted in the issuance of multiple patents relating to
`
`TFT-LCD and TFT-OLED display technology.
`
`22.
`
`From 2007 to 2008, I served as the Senior VP of Engineering for
`
`Puredepth, Inc. My responsibilities included the design of hardware and software to
`
`create 3D images on TFT-LCDs.
`
`23.
`
`From 2012 through 2015, I served as the Vice President of Application
`
`Engineering and Device Performance for Innova Dynamics, Inc., a nanotechnology
`
`company developing materials to be used in LCDs and touch sensors. In 2008, I
`
`founded TLC Display Consulting, a company that provides technical consulting in
`
`the areas of flat panel displays, liquid crystal displays, and related electronics. I
`
`currently serve as the President of TLC Display Consulting.
`
`–7–
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`24.
`
`I have been an active member of the Society for Information Display
`
`(“SID”) for over 40 years, having attended every SID Annual Technical Symposium
`
`since 1972. I was a member of the Society for Information Display’s Program
`
`Committee for 15 years, and the Director of the Society for Information Display’s
`
`Symposium Committee for 10 years. In 1984, I was awarded the title of Fellow of
`
`the Society for Information Display in recognition of my achievements and
`
`contributions to flat panel display technology.
`
`25.
`
`I am a named inventor on over 80 US patents relating to flat panel
`
`display and LCD technology. I have also authored several articles relating to LCD
`
`technology and flat panel displays that were published by industry periodicals such
`
`as Information Display and peer reviewed journals such as the Society for
`
`Information Display’s Digest of Technical Papers.
`
`II.
`
`LEVEL OF ORDINARY SKILL IN THE ART
`
`26.
`
`I am informed and understand that claim interpretation is from the
`
`perspective of a person of ordinary skill in the art at the time of the invention.
`
`27.
`
`I understand that a I understand that a hypothetical person of ordinary
`
`skill in the art is considered to have the normal skills and knowledge of a person in
`
`a certain technical field, as of the time of the invention at issue. I understand that
`
`factors that may be considered in determining the level of ordinary skill in the art
`
`include: (1) the education level of the inventor; (2) the types of problems
`
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`encountered in the art; (3) the prior art solutions to those problems; (4) rapidity with
`
`which innovations are made; (5) the sophistication of the technology; and (6) the
`
`education level of active workers in the field. I also understand that “the person of
`
`ordinary skill” is a hypothetical person who is presumed to be aware of the universe
`
`of available prior art.
`
`28.
`
`In my opinion, a person of ordinary skill in the art relevant to the ’989
`
`patent at the time of the invention would have the equivalent of an undergraduate
`
`degree in electrical engineering, materials science, physics, or a related field and at
`
`least two years of work experience (or a graduate degree) in LCD display
`
`technology. Lack of work experience could have been remedied by additional
`
`education, and vice versa. Such academic and industry experience would be
`
`necessary to appreciate what was obvious and/or anticipated in the industry and what
`
`a person of ordinary skill in the art would have thought and understood at the time.
`
`Based on these criteria, as of the relevant time frame for the ’989 patent, I possessed
`
`at least such experience and knowledge of a person of ordinary skill in the art, hence
`
`am qualified to opine on the ’989 patent.
`
`29.
`
`I am informed that Mr. Flasck has asserted a different level or ordinary
`
`skill. As I understand it, Mr. Flasck asserts that a person of ordinary skill in the art
`
`would have at least a four-year undergraduate degree in electrical engineering or
`
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`physics or a closely related field and four years of experience in the design and
`
`implementation of flat panel display devices or components thereof.
`
`30. While I disagree with Mr. Flasck’s asserted level of ordinary skill, my
`
`opinions apply equally under either proposed level.
`
`III. THE CHALLENGED CLAIMS ARE NOT INVALID AS OBVIOUS IN
`LIGHT OF THE PRIOR ART.
`
`31. As shown in Petitioner’s table (reproduced below), Petitioner asserts
`
`two grounds of unpatentability for claim 1 and four grounds of unpatentability for
`
`claim 2.
`
`32.
`
` Grounds 1 and 2 rely on Yuh as the base reference, but Petitioner
`
`concedes that Yuh fails to disclose several limitations in claim 1 of the ’989 patent,
`
`including an organic insulation layer (and all limitations related thereto) and the
`
`structure of the pixel electrode. Petitioner argues that it would be obvious to
`
`combine Yuh with Ohta, Abe, Kim, and/or Kurahashi to cure the deficiencies in
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`Yuh. As I explain in further detail below, it is my opinion that these references
`
`would not be obvious to combine.
`
`33.
`
`For claim 2, Petitioner asserts Grounds 1 through 4. Grounds 1 and 3
`
`rely on the same combination of references to challenged claim 2 that were used to
`
`challenge claim 1. Grounds 2 and 4 challenge only claim 2 using the combinations
`
`of (1) Yuh, Ohta, and Abe, and (2) Yuh and Kurahashi, respectively, with the
`
`addition of Kim.
`
`34.
`
`Petitioner claims that certain features in the ’989 patent were known in
`
`the prior art and, for that reason, it would have been obvious for a person of skill in
`
`the art (“POSITA”) to combine those features into the novel configurations claimed
`
`in the ’989 patent. See, e.g., Pet. 1(“Planar counter electrodes were known . . . as
`
`were pixel electrodes having slits not parallel with gate lines and drain lines in LCD
`
`devices.”). In my opinion, Petitioner’s approach to it invalidity analysis would
`
`essentially preclude any new innovation in TFT-LCD technology because at this
`
`stage of development in the industry many, if not all, improvements are made though
`
`adjustments to and non-obvious configurations of known elements.
`
`A.
`
`Ground 1: The Combination of Yuh, Ohta, and Abe Does Not
`Render Claims 1 and 2 Obvious.
`1.
`A POSITA would not look to combine Ohta with Yuh.
`35. Yuh discloses a modified pixel array where the “[f]irst electrodes and
`
`second electrode insulated from each other are overlapped with each other at least
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`in part” (i.e., Fringe Field Switching (“FFS”) configuration), where the first and
`
`second electrodes are pixel and counter electrodes. Yuh at 3:9-12 (emphasis added),
`
`Fig. 2 (annotated below). Ohta, on the other hand, discloses a pixel configuration
`
`where the “counter electrodes and the pixel electrodes are formed linearly so as not
`
`to overlap each other in a planar condition” (i.e., an interdigitated IPS
`
`configuration). Ohta, ¶[0007] (emphasis added), Fig. 2 (annotated below). The FFS
`
`configuration and interdigitated IPS configuration produce electric fields with
`
`different contours that affect display performance characteristics, including
`
`transmittance and viewing angle. See S. H. Lee, S.L. Lee, H.Y. Kim, T.Y. Eom,
`
`16.4L: Late-News Paper: A novel Wide-Viewing-Angle Technology: Ultra-Trans
`
`View™, Hyundai Electronics Industries 1 (1999 SID) (Ex. 2009) (“Lee Paper”). In
`
`particular, the FFS configuration produces a parabolic electric field with both
`
`vertical and horizontal components, whereas the interdigitated IPS configuration
`
`produces electric fields that are parallel to the surface (i.e., mainly horizontal
`
`components). Id. at 1-2, Fig. 2; see also Yuh at 3:18-22 (“The shape of an electric
`
`line of force is semi-ellipse or parabola having a center on a boundary line or a
`
`boundary region between the first electrode and the second electrode, whereby the
`
`electric field on the electrodes has the vertical and the horizontal components.”);
`
`Ohta, ¶ [0003] (“[E]lectric fields are generated between [the] display electrodes and
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`the reference electrodes parallel to the surfaces of the transparent substrates so as to
`
`modulate light which is transmitted through the liquid crystal layer.”).
`
`Pixel Electrode
`
`Electric
`Field
`
`Counter Electrode
`
`Yuh, Fig. 2 (FFS, annotated)
`
` Ohta, Fig. 2 (Interdigitated IPS, annotated)
`
`Ex. 2009, Fig. 2
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`36.
`
`The different electric field shapes result from different electrode
`
`configurations and, in particular, the distance between electrodes. In an IPS device,
`
`“the distance (l) between electrodes is larger than the cell gap (d) and the width of
`
`the electrode (w);” whereas in an FFS device, “”l is zero or smaller than d and w so
`
`that the electric field lines are formed in the whole area.” Ex.2009 at 1, Fig. 2
`
`(above).
`
`37. A side-by-side comparison of Figures 2 from Yuh and Ohta (above)
`
`reveals that a FFS device differs from an IPS device in significant ways, including,
`
`among other things, requiring (1) the electrode configuration and spacing, (2) an
`
`insulating layer between the electrodes, and (3) an accounting for the capacitance
`
`created between the electrodes. FFS and IPS devices, therefore, require different
`
`manufacturing steps and other considerations such as cell gap, the type of liquid
`
`crystal material used (e.g., whether liquid crystal material with positive or negative
`
`dielectric anisotropy is used), and spacing between openings, to name a few. These
`
`differences specifically impact the number and size of insulation layers required for
`
`these devices. Thus, it is my opinion that a POSITA would not readily look to an
`
`interdigitated IPS structure to improve upon an FFS structure, especially with regard
`
`to the types of insulation layers used.
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`2.
`
`Yuh in view of Ohta does not render obvious limitation 1(g),“an
`organic insulation layer disposed between the first substrate
`and the liquid crystal layer.”
`38. Yuh does not disclose an organic passivation layer as claimed. I
`
`disagree with Mr. Flasck that “[f]rom Ohta, a POSA would have been motivated and
`
`found it obvious to include an organic passivation layer between the planar electrode
`
`and the lower substrate in Yuh’s device.” Ex.1003, ¶ 96. In my opinion, a POSITA
`
`would not look to combine an FFS structure with an IPS structure for the reasons
`
`discussed above and, thus, would not combine Yuh and Ohta.
`
`39. My opinion is supported by (1) the fact that the teaching in Ohta does
`
`not disclose the configuration proposed by Mr. Flasck and (2) the obvious
`
`difficulties that Mr. Flasck’s implementation of an organic passivation layer would
`
`present to a POSITA attempting to make such a combination.
`
`40. Ohta discloses an organic passivation layer (PSV2) formed on a gate
`
`insulating layer (GI) that covers at least the drain line (DL) and the entire TFT
`
`structure. See Ohta, Figs. 2-3.
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`41.
`
`Petitioner’s “expanded and annotated” Figure 2 (below) shows an
`
`“organic passivation layer” added between the “planar electrode 2” and the “lower
`
`substrate 100.” Mr. Flasck states that “[f]rom Ohta, a POSA would have recognized
`
`that ‘when the organic passivation layer is coated on’ Yuh’s lower substrate, “the
`
`flatness of the substrate . . . is enhanced,’ and ‘the irregularities of the brightness . . .
`
`can be eliminated thus enhancing the uniformity of the brightness” of Yuh’s liquid
`
`crystal device.” Ex.1003, ¶96. I disagree. Ohta actually teaches that “the flatness
`
`of the substrate which constitutes the active element is enhanced” when an organic
`
`passivation layer is used. Ohta, ¶[0017] (emphasis added). That is, Ohta teaches
`
`using an organic passivation layer to smooth out the substrate after the TFTs are
`
`formed thereon. See Ohta, ¶[0084-85], Fig. 2. Further, a POSITA would understand
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`that the glass substrate is a flat surface without need of an additional “planarizing”
`
`layer for smoothing (in contrast to smoothing out steps in processed layers such as
`
`semiconductor layers, patterned insulators or metal electrodes).
`
`Gate Insulation
`Layer no longer
`acting as a Gate
`Insulation Layer
`
`TFT below
`Organic
`Passivation Layer
`
`Petitioner’s “Expanded and Annotated” Fig. 2 of Yuh
`(Annotated in Red)
`
`42. Mr. Flasck’s proposed modification results in the “insulating film 3,”
`
`previously identified as the “gate insulating film” (Ex.1003, ¶91), to no longer serve
`
`as a gate insulating film because the gate is below the proposed Organic Passivation
`
`Layer. Moreover, carrying the proposed combination into the TFT region presents
`
`further complications as shown in the modified version of Mr. Flasck’s annotated
`
`Fig. 33 of Yuh below.
`
`–17–
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`
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`JDI/PLD - EX. 2010
`TIANMA MICROELECTRONICS
`CO. LTD. v. JDI/PLD
`IPR2021-01060
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`
`
`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
`
`Unclear how the Proposed
`Organic Passivation Layer
`carries into TFT region
`
`Drain Electrode
`Amorphous Silicon
`
`Passivation Film
`Source Electrode
`
`Proposed Organic
`Passivation Layer
`
`Petitioner’s Annotated Fig. 33 of Yuh
`(Annotated by Patent Owner in Red)
`
`43. Mr. Flasck doesn’t explain how the Proposed Organic Passivation
`
`Layer would be combined in the TFT region of Yuh. This organic layer cannot serve
`
`as the Gate Insulating Film because in the channel region between the Gate Line and
`
`Source/Drain Electrodes, the separation would be too large for the TFT to operate.
`
`Thus, a POSITA would at least need to add another insulating layer as the gate
`
`insulating layer. Moreover, if the organic layer extends over the TFT in some
`
`fashion, a POSITA would need to account for how the Source Electrode 71 and
`
`–18–
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`
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`JDI/PLD - EX. 2010
`TIANMA MICROELECTRONICS
`CO. LTD. v. JDI/PLD
`IPR2021-01060
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`
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`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
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`Drain Electrode 72 will connect to the signal line and pixel electrode, respectively.
`
`Thus, it is my opinion that the addition of an Organic Passivation Layer as proposed
`
`by Mr. Flasck will require the addition and modification as several other features
`
`and the end result would be a dramatically different device, not contemplated by
`
`either Yuh or Ohta.
`
`44.
`
`In Yuh, the counter electrode and gate line are on the same layer, so
`
`Mr. Flasck’s proposal would result in the organic layer also going under the gate
`
`layer (i.e., the TFT element). But Ohta does not teach forming an Organic
`
`Passivation Layer on a bare substrate.
`
`45. Mr. Flasck also fails to recognize that Yuh already includes a
`
`passivation film 80 in the location taught by Ohta, which renders his proposal
`
`redundant. See Yuh, 20:46-51, Fig. 33. This passivation layer is not organic nor
`
`does it meet any of the other structural limitations in claim 1.
`
`46.
`
`For at least these reasons, it is my opinion that a POSITA would not
`
`combine Yuh and Ohta in a manner that would cure the deficiency in Yuh and
`
`certainly not in the way that Mr. Flasck proposes. Thus, it is further my opinion that
`
`the combination of Yuh and Ohta fails to render claim 1 obvious.
`
`–19–
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`
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`JDI/PLD - EX. 2010
`TIANMA MICROELECTRONICS
`CO. LTD. v. JDI/PLD
`IPR2021-01060
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`
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`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
`
`3.
`
`Yuh in view of Ohta does not render obvious limitations 1(i),
`1(m), and 1(n).
`47. Mr. Flasck relies on the same combination of Yuh and Ohta for
`
`limitations 1(i), 1(m), and 1(n), which all include further limitations related to the
`
`organic insulation layer. Because it would not be obvious for a POSITA to combine
`
`Yuh and Ohta to include an organic passivation layer as required by claim 1, this
`
`combination also fails to render obvious each of these claim limitations as well.
`
`4.
`
`Yuh in view of Ohta does not render obvious limitations 1(l),
`“wherein the counter electrode is connected to a common
`layer,” and 1(n), “wherein the counter electrode is connected
`to the common layer via a through hole within the organic
`insulation layer.”
`48. Yuh does not disclose a common layer that meets the claims limitations
`
`of claim 1(l) and 1(n). I disagree with Mr. Flasck that “a POSA would have been
`
`motivated and found it obvious to replace the ITO common signal transmitter [24]
`
`and aluminum redundant common signal transmitter [33] in Yuh with a single metal
`
`counter line, as disclosed by Ohta.” Ex.1003, ¶124. In my opinion, a POSITA would
`
`not look to combine an FFS structure (Yuh) with an IPS structure (Ohta) for the
`
`reasons previously discussed related to the different space, electric field, and other
`
`considerations required for the different devices.
`
`49. Mr. Flasck has also fails to articulate any advantage or motivation to
`
`combine Yuh and Ohta. In fact, it is my opinion that Mr. Flasck’s purported
`
`motivations to combine actually demonstrate reasons not to combine Yuh and Ohta.
`
`–20–
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`
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`JDI/PLD - EX. 2010
`TIANMA MICROELECTRONICS
`CO. LTD. v. JDI/PLD
`IPR2021-01060
`
`
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`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
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`For example, Mr. Flasck proposes modifying the seventh embodiment of Yuh, which
`
`discloses a “common signal transmitter 24” that is “connected to the common
`
`electrode 20 via the connection 23, and located near the right edge of the substrate
`
`100.” Yuh at 21:35-38, Fig. 35A (annotated below).
`
`Connections
`
`Redundant
`Connections
`
`Common Electrode
`
`Gate Line
`Redundant Gate Line
`Yuh, Fig. 35A (Embodiment 7, annotated)
`
`Right Edge of
`Substrate
`
`Common
`Signal
`Transmitter
`
`Redundant
`Common
`Signal
`Transmitter
`
`50. Mr. Flasck states that a POSITA would have been motived to replace
`
`the “redundant common signal transmitter 34” with Ohta’s counter line for two
`
`reasons: Ohta’s single metal counter line (1) removes the need for any “redundant”
`
`components, as used in Yuh, thereby simplifying Yuh’s device” and (2) would have
`
`–21–
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`
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`JDI/PLD - EX. 2010
`TIANMA MICROELECTRONICS
`CO. LTD. v. JDI/PLD
`IPR2021-01060
`
`
`
`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
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`a lower resistance than the ITO common signal transmitter.” Ex.1003, ¶124. In my
`
`opinion, these motivations are meritless because adding a separate metal counter line
`
`in a different layer is just as redundant as providing a metal line directly under the
`
`common electrode and common signal transmitter. Mr. Flasck’s proposal is actually
`
`even more inefficient because it requires an additional insulation layer between the
`
`metal layers. Moreover, Yuh’s seventh embodiment also uses redundant elements
`
`for other parts of the display (e.g., a “redundant gate line 30”), which would not be
`
`replaced with Ohta’s single metal counter line. Accordingly, there is no benefit to
`
`substituting one redundant layer (e.g., for the common signal transmitter) without
`
`removing all redundant layers (e.g., for the gate line).
`
`51. Regarding Mr. Flasck second motivation to combine that Ohta’s single
`
`metal counter signal line would have a lower resistance than the ITO common signal
`
`transmitter is a false comparison. Ohta addresses the resistance issue with the ITO
`
`material by including a redundant metal line directly under the ITO layer. Ohta’s
`
`metal counter line provides no benefit over Yuh’s redundant metal line because they
`
`are both made of the same material. Yuh’s “redundant common signal transmitter
`
`34” is made of “any conductive material such as Al or Al alloy” and may have a
`
`buffer layer “made of refractory metal such as Cr [Chromium] or MoW
`
`[molybdenum Tungsten] alloy.” Yuh at 21:56-61. Ohta’s counter line is disclosed
`
`as “not limited to the chrome-molybdenum alloy and may have a two layer structure
`
`–22–
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`
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`JDI/PLD - EX. 2010
`TIANMA MICROELECTRONICS
`CO. LTD. v. JDI/PLD
`IPR2021-01060
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`
`
`Credelle Declaration for Inter Partes Review of U.S. Patent No. 10,330,989
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`in which aluminum or aluminum alloy is wrapped by chrome molybdenum for
`
`lowering the resistance.”). In other words, both Yuh and Ohta disclose using a
`
`redundant metal line. For at least these reasons, it is my opinion that a POSITA
`
`would not be motivated to combine Yuh and Ohta where there is no apparent benefit
`
`to Yuh for using the configuration shown in Ohta.
`
`52. Mr. Flasck also fails to acknowledge Embodiment 8 in Yuh, which
`
`shows a configuration of “common electrode lines 33 located at the upper parts of
`
`the common electrodes 20 [and] extend[ing] in the transverse direction to electrically
`
`connect the common electrodes 20,” which appears to be the same configuration
`
`shown in Ohta. Yuh at 23:25-28; compare Yuh, Fig. 40 with Ohta, Fig. 1 (annotated
`
`below). And like Ohta’s counter line, Yuh’s “common electrode lines 33 . . . may
`
`be made of any conductive material such as Al, Al alloy, Mo or Cr” and may include
`
`“a buffer layer made of refractory metal such as Cr or MoW.” Id. at 23:36-40.
`
`–23–
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`
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`JDI/PLD - EX. 2010
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