`(12) Patent Application Publication (10) Pub. No.: US 2006/0215081 A1
`Song et al.
`(43) Pub. Date:
`Sep. 28, 2006
`
`US 20060215081A1
`
`(54) VERTICALLY ALIGNED MODE LIQUID
`CRYSTAL DISPLAY WITH
`DIFFERENTIATED B CELL GAP
`(75) Inventors: Jang-Kun Song, Seoul (KR):
`Kyeong-Hyeon Kim, Suwon-city (KR):
`Jae-Jin Lyu, Kwangju-kun (KR):
`Seung-Hee Lee, Cheongju-city (KR):
`Seung-Beom Park, Seoul (KR):
`Yong-Woo Choi, Suwon-city (KR)
`Correspondence Address:
`F. CHAU & ASSOCIATES, LLC
`130 WOODBURY ROAD
`WOODBURY, NY 11797 (US)
`(73) Assignee: Samsung Electronics, Co., Ltd
`(21) Appl. No.:
`11/444,100
`(22) Filed:
`May 31, 2006
`Related U.S. Application Data
`(63) Continuation of application No. 10/036,305, filed on
`Dec. 28, 2001, now Pat. No. 7,075,600.
`
`(30)
`
`Foreign Application Priority Data
`
`Jul. 12, 2001
`
`(KR)....................................... 2001-42123
`
`Publication Classification
`
`(51) Int. Cl.
`(2006.01)
`G02F L/335
`(52) U.S. Cl. .............................................................. 349/107
`(57)
`ABSTRACT
`A thin film transistor array substrate is provided with a gate
`line assembly, a data line assembly, and thin film transistors.
`The data line assembly crosses over the gate line assembly
`while defining pixel regions. A pixel electrode is formed at
`each pixel region. A color filter substrate is provided with a
`black matrix, and color filters of red, green and blue are
`formed at the black matrix at the pixel regions. An overcoat
`layer covers the color filters, and a common electrode is
`formed on the overcoat layer with an opening pattern. The
`thin film transistor array substrate, and the color filter
`Substrates face each other, and a liquid crystal material is
`injected between the thin film transistor array substrate, and
`the color filter substrate. The blue color filter has a thickness
`Smaller than the red color filter or the green color filter such
`that the liquid crystal cell gap at the blue color filter is larger
`than the liquid crystal cell gap at the red or green color filter.
`
`
`
`is N 77, WN
`
`12-7-900
`
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`Patent Application Publication Sep. 28, 2006 Sheet 1 of 14
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`Patent Application Publication Sep. 28, 2006 Sheet 3 of 14
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`Patent Application Publication Sep. 28, 2006 Sheet 4 of 14
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`US 2006/0215081 A1
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`Patent Application Publication Sep. 28, 2006 Sheet 6 of 14
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`US 2006/0215081 A1
`
`Y
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`s
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`5.
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`s
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`s
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`S.
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`3.
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`Patent Application Publication Sep. 28, 2006 Sheet 7 of 14
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`S.
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`Patent Application Publication Sep. 28, 2006 Sheet 8 of 14
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`US 2006/0215081 A1
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`
`
`
`
`002dºs osz0ý„ 001 026 008 016 00;
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`Patent Application Publication Sep. 28, 2006 Sheet 9 of 14
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`US 2006/0215081 A1
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`FIG.9
`
`
`
`dan/C : C = 0.47 (TN), C = 0.27( VA))
`
`FIG.O
`
`O.O 0.1
`
`O2 O.3 0.4 O5 06 0.7 O.8 O.9
`dAn/CC
`0.47(TN), C=0.27(VA)
`
`1.O
`
`
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`Patent Application Publication Sep. 28, 2006 Sheet 10 of 14
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`FIG.11
`
`k(um)
`
`FIG.12A
`
`
`
`Voltage(V)
`
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`Patent Application Publication Sep. 28, 2006 Sheet 11 of 14
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`FIG.12B
`
`FIG12C
`
`
`
`(
`
`Voltage(V)
`
`Voltage(V)
`
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`Patent Application Publication Sep. 28, 2006 Sheet 12 of 14
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`Voltage(V)
`
`FIG.14
`
`O08
`
`OO7
`
`B-0.1
`
`Amount of color shift(CIS) pursuant to
`difference in cell gap between yellow
`region and blue region
`
`OO6 N
`g2 O-O5
`N
`d
`004
`2 003
`C
`
`n
`
`OO2
`
`
`
`OO1
`
`O
`-O 5
`
`-005
`
`OO5
`
`B+0.19
`
`B.o.
`e.g
`B-0.3
`- B+0.4 T
`
`O35
`O25
`O.15
`cell gap (Y-B)
`
`O45
`
`Page 13
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`Patent Application Publication Sep. 28, 2006 Sheet 13 of 14
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`FIG.15
`
`125
`
`120
`
`115
`
`10
`
`105
`
`100
`-0.15
`
`FIG.16
`
`
`
`-0.05
`0.05
`0.15
`0.25
`Difference in cell gap(Yellow-Blue)
`
`O.35
`
`0.45
`
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`Patent Application Publication Sep. 28, 2006 Sheet 14 of 14
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`FIG.17
`
`
`
`Good
`
`i
`O
`S
`O.
`a-
`O
`8
`
`color property
`
`Processing efficiency
`and Yield
`
`High
`
`U
`
`m 8
`2
`()
`AD
`s
`O.
`aC
`o
`
`Poor
`-at-
`''
`LOW
`OO O. 1 O2 O3 O.4 0.5 0.6 0.7 0.8 O.9 10 11 12 13
`Acellgap
`
`Page 15
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`Sep. 28, 2006
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`VERTICALLY ALIGNED MODE LIQUID CRYSTAL
`DISPLAY WITH OFFERENTATED B CELL GAP
`
`CROSS-REFERENCE TO RELATED UNITED
`STATES APPLICATION
`0001. This application is a continuation application of
`U.S. application Ser. No. 10/036,305 filed on Dec. 28, 2001,
`the disclosure of which is herein incorporated by reference
`in its entirety.
`
`BACKGROUND OF THE INVENTION
`0002) (a) Field of the Invention
`0003. The present invention relates to a vertically aligned
`mode liquid crystal display and, more particularly, to a
`vertically aligned mode liquid crystal display where a pixel
`region is partitioned into a plurality of micro-domains to
`obtain wide viewing angle.
`0004 (b) Description of the Related Art
`0005 Generally, a liquid crystal display has a structure
`where a liquid crystal bearing dielectric anisotropy is sand
`wiched between a color filter substrate and a thin film
`transistor array substrate. The color filter substrate has a
`common electrode, color filters and a black matrix, and the
`thin film transistor array substrate has a thin film transistor
`and a pixel electrode. An electric field is applied to the liquid
`crystal while being varied in strength, thereby controlling
`the light transmission and displaying the desired picture
`image.
`0006 Such a liquid crystal display usually involves nar
`row viewing angle. In order to obtain a wider viewing angle,
`various techniques have been developed. One such tech
`nique involves vertically aligning the liquid crystal mol
`ecules with respect to the Substrates while forming opening
`or protrusion patterns at the pixel electrode and the common
`electrode.
`0007. In an opening pattern formation technique, an
`opening pattern is formed at the pixel electrode and the
`common electrode, respectively. Fringe fields are formed
`due to the opening patterns, and the inclined direction(s) of
`the liquid crystal molecules is controlled by way of the
`fringe fields, thereby widening the viewing angle.
`0008. In a protrusion formation technique, a protrusion is
`formed at the pixel electrode and the common electrode,
`respectively. The electric field formed between the pixel
`electrode and the common electrode is deformed due to the
`protrusions, thereby controlling the inclined direction(s) of
`the liquid crystal molecules.
`0009 Furthermore, it is also possible that an opening
`pattern is formed at the pixel electrode, while a protrusion is
`formed at the common electrode. Fringe fields are formed
`due to the opening pattern and the protrusion, and the
`inclined directions of the liquid crystal molecules are con
`trolled by way of the fringe fields, thereby partitioning the
`pixel region into a plurality of micro-domains.
`0010 Meanwhile, in such a vertically aligned (VA) mode
`liquid crystal display, the variation in light transmission
`based on Voltages is diffused at the respective wavelengths
`of light, and this causes the inter-gray scale color shift.
`
`Particularly, when the gray Scale reaches a higher number
`the white color becomes yellowish, deteriorating picture
`quality.
`
`SUMMARY OF THE INVENTION
`0011. It is an object of the present invention to provide a
`vertically aligned mode liquid crystal display which
`enhances picture quality while reducing color shift.
`0012. This and other objects may be achieved by a liquid
`crystal display wherein the cell gap at the blue region is
`differentiated from the cell gap at the red or green region.
`0013. According to one aspect of the present invention,
`the liquid crystal display includes a first insulating Substrate,
`and a first wiring line assembly formed on the first insulating
`substrate with a plurality of first wiring lines. A second
`wiring line assembly crosses over the first wiring line
`assembly with a plurality of second wiring lines while
`defining pixel regions. The second wiring line assembly is
`insulated from the first wiring line assembly. A pixel elec
`trode is formed at each pixel region with a first opening
`pattern. A thin film transistor is connected to the first wiring
`line assembly, the second wiring line assembly, and the pixel
`electrode. A second insulating Substrate faces the first insu
`lating substrate. Color filters of red, green and blue are
`formed on the second insulating Substrate. A common elec
`trode is formed on the second insulating substrate with the
`color filters while bearing a second opening pattern. A liquid
`crystal layer is sandwiched between the first and the second
`insulating Substrates with liquid crystal molecules. The
`liquid crystal molecules of the liquid crystal layer are
`vertically aligned with respect to the first and the second
`substrates with no application of an electric field between
`the pixel electrode and the common electrode. Assuming
`that an R cell gap indicates the thickness of the liquid crystal
`layer at the region of the red color filter, a G cell gap
`indicates the thickness of the liquid crystal layer at the
`region of the green color filter, and the B cell gap indicates
`the thickness of the liquid crystal layer at the region of the
`blue color filter, the B cell gap is differentiated from the R
`cell gap or the G cell gap.
`0014. The B cell gap is established to be smaller than the
`R cell gap or the G cell gap by 0.2+0.15um. The B cell gap,
`the R cell gap and the G cell gap may be differentiated from
`each other while satisfying the following mathematical
`formula: R cell gap-G cell gap.<G cell gap-B cell gap.
`0015 The first and the second opening patterns partition
`the pixel region into a plurality of micro-domains. The
`micro-domains are classified into left and right domains, and
`upper and lower domains. The Volume occupied by the
`upper and lower domains is larger than the Volume occupied
`by the left and right domains. The distance between the two
`neighboring second wiring lines is repeatedly varied per a
`predetermined length, and the pixel electrode has lateral
`sides positioned close to the second wiring lines with the
`same outline such that the pixel electrode bears a narrow
`portion and a wide portion.
`0016. According to another aspect of the present inven
`tion, a color filter substrate for the liquid crystal display
`includes an insulating Substrate, and a black matrix formed
`on the insulating Substrate while defining pixel regions.
`Color filters of red, green and blue are formed at the pixel
`
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`Sep. 28, 2006
`
`regions. An overcoat layer covers the color filters. A trans
`parent electrode is formed on the overcoat layer with an
`opening pattern. The blue color filter has a thickness larger
`than the red color filter or the green color filter. Preferably,
`the thickness of the blue color filter is larger than the red
`color filter or the green color filter by 0.2+0.15 um.
`0017 According to still another aspect of the present
`invention, a process of manufacturing a liquid crystal dis
`play is provided, comprising the steps of forming a first
`insulating Substrate; forming a first wiring line assembly
`with a plurality of first wiring lines on the first insulating
`Substrate; forming a second wiring line assembly with a
`plurality of second wiring lines crossing over the first wiring
`line assembly while defining pixel regions, the second
`wiring line assembly being insulated from the first wiring
`line assembly; forming a pixel electrode at each pixel region
`with a first opening pattern; forming a second insulating
`Substrate facing the first insulating Substrate; forming color
`filters of red, green and blue on the second insulating
`Substrate; forming a common electrode on the second insu
`lating Substrate with the color filters having a second open
`ing pattern; forming a liquid crystal layer sandwiched
`between the first and the second insulating substrates with
`liquid crystal molecules, the liquid crystal molecules of the
`liquid crystal layer being vertically aligned with respect to
`the first and the second substrates when no electric field is
`applied between the pixel electrode and the common elec
`trode; and differentiating a B cell gap from an R cell gap or
`a G cell gap, the R cell gap indicates the thickness of the
`liquid crystal layer at the region of the red color filter, the G
`cell gap indicates the thickness of the liquid crystal layer at
`the region of the green color filter, and the B cell gap
`indicates the thickness of the liquid crystal layer at the
`region of the blue color filter. Preferably, the B cell gap is
`formed to be smaller than the R cell gap or the G cell gap
`by 0.2+0.15 um and at least one of the first and second
`opening patterns partitions the pixel region into a plurality of
`micro-domains.
`BRIEF DESCRIPTION OF THE DRAWINGS
`0018. A more complete appreciation of the invention, and
`many of the attendant advantages thereof, will be readily
`apparent as the same becomes better understood by refer
`ence to the following detailed description when considered
`in conjunction with the accompanying drawings in which
`like reference symbols indicate the same or the similar
`components, wherein:
`0.019
`FIG. 1 is a plan view of a liquid crystal display
`according to a first preferred embodiment of the present
`invention where an opening pattern of a pixel electrode is
`illustrated;
`0020 FIG. 2 illustrates an opening pattern of a common
`electrode for the liquid crystal display shown in FIG. 1;
`0021
`FIG. 3 illustrates the arrangement of the opening
`patterns of the pixel and the common electrodes for the
`liquid crystal display shown in FIG. 1;
`0022 FIG. 4 is a cross sectional view of the liquid crystal
`display taken along the IV-IV line of FIG. 3;
`0023 FIG. 5 is a plan view of a liquid crystal display
`according to a second preferred embodiment of the present
`invention where an opening pattern of a pixel electrode is
`illustrated;
`
`0024 FIG. 6 illustrates an opening pattern of a common
`electrode for the liquid crystal display shown in FIG. 5;
`0025 FIG. 7 illustrates the arrangement of the opening
`patterns of the pixel and the common electrodes for the
`liquid crystal display shown in FIG. 5:
`0026 FIG. 8 is a cross sectional view of the liquid crystal
`display taken along the VIII-VIII' line of FIG. 7:
`0027 FIG. 9 is a graph illustrating the difference in light
`transmission as a function of And at the wavelengths of 450
`nm and 600 nm,
`0028 FIG. 10 is a graph where the values at the vertical
`axis of the graph of FIG. 9 are divided by the light
`transmission at the wavelength of 550 nm:
`0029 FIG. 11 is a graph illustrating the optimum RGB
`cell gaps in case the value of An is 0.08;
`0030 FIGS. 12A to 12C are graphs illustrating the V-T
`curves pursuant to the RGB cell gaps;
`0031
`FIG. 13 is a graph illustrating the difference in the
`V-T curve at the single-domain structure and at the multi
`domain structure;
`0032 FIG. 14 is a graph illustrating the amount of color
`shift pursuant to the difference in cell gap at the yellow
`region (the average between the red region and the green
`region) and at the blue region;
`0033 FIG. 15 is a graph illustrating the brightness ratio
`(blue/yellow) pursuant to the difference in cell gap between
`the yellow region and the blue region;
`0034 FIG. 16 is a graph illustrating the difference in
`color temperature per gray scales pursuant to the difference
`in cell gap between the yellow region and the blue region;
`and
`0035 FIG. 17 is a graph illustrating the color property,
`and processing efficiency and variation in yield as a function
`of cell gaps.
`
`DETAILED DESCRIPTION OF PREFERRED
`EMBODIMENTS
`Preferred embodiments of this invention will be
`0.036
`explained with reference to the accompanying drawings.
`0037 FIG. 1 is a plan view of a liquid crystal display
`according to a first preferred embodiment of the present
`invention wherein an opening pattern of a pixel electrode is
`illustrated, and FIG. 2 illustrates an opening pattern of a
`common electrode for the liquid crystal display. FIG. 3
`illustrates the arrangement of the opening patterns of the
`pixel and the common electrodes for the liquid crystal
`display. FIG. 4 is a cross sectional view of the liquid crystal
`display taken along the IV-IV line of FIG. 3.
`0038. As shown in FIG. 1 to FIG. 4 of the drawings, a
`gate line assembly and a storage capacitor line assembly are
`formed on an insulating Substrate 10. The gate line assembly
`includes gate lines 20 arranged along a horizontal direction,
`and gate electrodes 21 protruded from the gate lines 20. The
`storage capacitor line assembly includes storage capacitor
`lines 30 arranged along the horizontal direction substantially
`parallel to the gate lines 20. First to fourth storage capacitor
`electrodes 31 to 34 are branched from the storage capacitor
`
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`line 30 together with storage capacitor electrode connectors
`35 and 36. The first storage capacitor electrode 31 is directly
`connected to the storage capacitor line 30 while proceeding
`in the vertical direction. The second and the third storage
`capacitor electrodes 32 and 33 are connected to the first
`storage capacitor electrode 31 while proceeding in the
`horizontal direction. The fourth storage capacitor electrode
`34 is connected to the second and the third storage capacitor
`electrodes 32 and 33 while proceeding in the vertical direc
`tion. The storage capacitor electrode connectors 35 and 36
`interconnect the fourth storage capacitor electrode 34 at one
`pixel and the first storage capacitor electrode 31 at a neigh
`boring pixel.
`0.039 Agate insulating layer 40 is formed on the gate line
`assembly and the storage capacitor line assembly. A semi
`conductor pattern 50 is formed on the gate insulating layer
`40 over the gate electrodes 21 with amorphous silicon.
`Ohmic contact patterns 61 and 62 (not shown) are formed on
`the semiconductor pattern 50 with amorphous silicon where
`in type impurities such as phosphorous (P) are doped at high
`concentration. The ohmic contact patterns 61 and 62 are
`separated from each other around the gate electrode 21.
`0040. A data line assembly is formed at the substrate 10.
`The data line assembly includes source electrodes 71 formed
`on the one-sided ohmic contact pattern 61, drain electrodes
`72 formed on the other-sided ohmic contact pattern 62, and
`data lines 70 formed on the gate insulating layer 40 while
`proceeding in the vertical direction. The source electrodes
`71 are connected to the data lines 70.
`0041 A protective layer 80 is formed on the data line
`assembly with contact holes 81 exposing the drain elec
`trodes 72. Pixel electrodes 90 are formed on the protective
`layer 80 such that they are connected to the drain electrodes
`72 through the contact holes 81. The pixel electrodes 90 are
`formed with a transparent conductive material Such as
`indium tin oxide (ITO) and indium zinc oxide (IZO).
`0042. The pixel electrode 90 is separated into first to third
`electrode portions 91 to 93, and the first to third electrode
`portions 91 to 93 are connected to each other by way of
`connectors 94 to 96. The first electrode portion 91 is formed
`at the lower half side of the pixel region with a rectangular
`shape with four corner edges cut off. The first electrode
`portion 91 is connected to the drain electrode 72 through the
`contact hole 81. The second and the third electrode portions
`92 and 93 are formed at the upper half of the pixel region,
`each also having a rectangular shape with four corner edges
`cut off. The second electrode portion 92 is connected to the
`first electrode portion 91 by way of the first and the second
`connectors 94 and 96, and the third electrode portion 93 is
`connected to the second electrode portion 92 by way of the
`third connector 95.
`0043. The second storage capacitor electrode 32 is posi
`tioned between the first and the second electrode portions 91
`and 92. The third storage capacitor electrode 33 is positioned
`between the second and the third electrode portions 92 and
`93. The first and the fourth storage capacitor electrodes 31
`and 34 are positioned between the pixel electrode 90 and the
`neighboring data lines 70, respectively.
`0044) Each of the first to the third electrode portions 91
`to 93 has a first side proceeding parallel to the data lines 70.
`and a second side proceeding parallel to the gate lines 20.
`
`The first side of the first electrode portion 91 is longer than
`the second side thereof. The first side of the second and the
`third electrode portions 92 and 93 is shorter than the second
`side thereof. The second and the third electrode portions 92
`and 93 are overlapped with the first and the fourth storage
`capacitor electrodes 31 and 34, whereas the first electrode
`portion 91 is not overlapped with the first and the fourth
`storage capacitor electrodes 31 and 34. The storage capacitor
`line 30 is positioned between the gate line 20 and the third
`electrode portion 93. An electric potential to be applied to a
`common electrode of a color filter substrate would be also
`applied to the storage capacitor lines 30, the storage capaci
`tor electrodes 31 to 34, and the storage capacitor electrode
`connectors 35 and 36.
`0045. As described above, when the storage capacitor
`lines or the storage capacitor electrodes to be applied with a
`common electric potential are arranged between the data line
`and the pixel electrode or between the gate line and the pixel
`electrode, they prevent the electric field at the pixel region
`from being influenced by the data line electric potential and
`the gate line electric potential, thereby securing domain
`stability.
`0046. A color filter substrate for the liquid crystal display
`will be explained with reference to FIGS. 2 to 4.
`0047 As shown in the drawings, a black matrix 200 is
`formed on a transparent glass substrate 100 while defining
`the pixel regions. The black matrix 200 preferably includes
`a double-layered structure with a chrome-based layer and a
`chrome oxide-based layer. Color filters of red (R), green (G)
`and blue (B) 310, 320 and 330 are formed at the pixel
`regions. The color filters are different in thickness. Prefer
`ably, the thickness of the R color filter 310 is smaller than
`that of the G color filter 320, that is in turn smaller than that
`of the B color filter 330. This thickness differentiation is to
`make the cell gap differ at the respective pixel regions. An
`overcoat layer 600 covers the RGB color filters 310,320 and
`330 to protect them, and a common electrode 400 is formed
`on the overcoat layer 600 with a transparent conductive
`material. An opening pattern is formed on the common
`electrode 400 at each pixel region with first to third opening
`portions 410, 420 and 430. The first opening portion 410
`bisects the lower half of the pixel region in the horizontal
`direction, and the second and the third opening portions 420
`and 430 trisect the upper half of the pixel region in the
`vertical direction. Both ends of each opening portion 410.
`420 or 430 are gradually enlarged to form a triangular shape,
`preferably an isosceles triangle. The first to third opening
`portions 410, 420 and 430 are separated from each other.
`0048. The thin film transistor array substrate is combined
`with the color filter substrate, and a liquid crystal material
`900 is injected between the substrates. At this time, the
`directors of the liquid crystal molecules are vertically
`aligned with respect to the Substrates. Two polarizing plates
`11 and 101 are externally attached to the substrates 10 and
`100 such that the polarizing axes thereof are perpendicular
`to each other.
`0049. In this state, the electrode portions 91 to 93 of the
`pixel electrode 90 and the first to third opening portions 410
`to 430 of the common electrode 400 are overlapped with
`each other while partitioning the pixel region into a plurality
`of micro-domains. Each of the electrode portions 91 to 93 of
`the pixel electrode 90 has two longsides and two short sides,
`
`Page 18
`
`JAPAN DISPLAY INC. - EX. 2006
`TIANMA MICROELECTRONICS CO. LTD. v. JAPAN DISPLAY INC
`IPR2021-01058
`
`
`
`US 2006/0215081 A1
`
`Sep. 28, 2006
`
`and the long sides of each electrode portion proceed in a
`direction parallel to the data lines 70 or the gate lines 20
`while being inclined with respect to the polarizing axes of
`the polarizing plates by 45°.
`0050. In case the long side of each electrode portion is
`positioned close to the data lines 70 or the gate lines 20, the
`storage capacitor lines 30 or the storage capacitor electrodes
`31 to 34 are arranged between the data lines 70 and the long
`sides of the electrode portion, or between the gate lines 20
`and the long sides of the electrode portion.
`0051 Meanwhile, it is preferable that the storage capaci
`tor line assembly be not disposed close to the short sides of
`the electrode portions 91 to 93 of the pixel electrode 90. In
`a case wherein the storage capacitor line assembly was
`disposed there, it would be entirely covered by the pixel
`electrode 90, or positioned distant from the pixel electrode
`90 by 3 um or more. This is because the electric potential of
`the data lines 70 or the gate lines 20 works in the direction
`of obstructing the domain formation at the place where the
`data lines 70 or the gate lines 20 is positioned close to the
`long sides of the pixel electrode portions 91 to 93, whereas
`the electric potential of the data lines 70 or the gate lines 20
`works in the direction of helping the domain formation at the
`place where the data lines 70 or the gate lines 20 is
`positioned close to the short sides of the pixel electrode
`portions 91 to 93.
`0.052 Meanwhile, the liquid crystal material 900 is
`injected between the common electrode 400 and the pixel
`electrodes 91. As described above, since the RGB color
`filters 310 to 330 are differentiated in thickness, the distance
`between the common electrode 400 and the pixel electrode
`90 is differentiated at the RGB pixel regions. That is, the cell
`gap is differentiated at the RGB pixel regions. The R cell gap
`at the R pixel region is larger than the G cell gap at the G
`pixel region that is in turn larger than the B cell gap at the
`B pixel region. The B cell gap is Smaller than the average
`value of the R cell gap and the G cell gap by 0.2+0.15 um.
`Furthermore, the difference Ad between the G cell gap and
`the B cell gap is greater than the difference Ad between the
`R cell gap and the G cell gap. That is, Ad-Ada. In case the
`RGB cell gaps are differentiated, the inter-gray scale color
`shift can be reduced.
`0053 FIG. 5 is a plan view of a liquid crystal display
`according to a second preferred embodiment of the present
`invention wherein an opening pattern of a pixel electrode is
`illustrated, and FIG. 6 illustrates an opening pattern of a
`common electrode for the liquid crystal display. FIG. 7
`illustrates the arrangement of the opening patterns of the
`pixel and the common electrodes for the liquid crystal
`display. FIG. 8 is a cross sectional view of the liquid crystal
`display taken along the VIII-VIII' line of FIG. 7.
`0054 As shown in FIGS. 5 to 8 of the drawings, a gate
`line assembly and a storage capacitor line assembly are
`formed on an insulating Substrate 10. The gate line assembly
`includes gate lines 20 proceeding in a horizontal direction,
`and gate electrodes 21 protruded from the gate lines 20. The
`storage capacitor line assembly includes storage capacitor
`lines 30 proceeding in the same direction as the gate lines 20.
`The storage capacitor line 30 has a plurality of linear
`portions with a large width and connectors interconnecting
`the linear portions having a smaller width. The linear
`portions are arranged around an imaginative straight line up
`
`and down in an alternate manner. First and second storage
`capacitor electrodes 33 and 31 are connected to the storage
`capacitor line 20 while proceeding in a vertical direction,
`and third storage capacitor electrodes 32 are connected to
`the second storage capacitor electrode 31 while proceeding
`in the horizontal direction.
`0055 Agate insulating layer 40 is formed on the gate line
`assembly and the storage capacitor line assembly.
`0056. A semiconductor pattern 50 is formed on the gate
`insulating layer 40 with hydrogenated amorphous silicon
`such that it is overlapped with the gate electrodes 21.
`0057 Ohmic contact patterns (not shown) are formed on
`the semiconductor pattern 50 with n+ hydrogenated amor
`phous silicon where n-type impurities are doped at high
`concentration. The ohmic contact patterns are separated
`from each other around the gate electrode 21.
`0058. A data line assembly is formed on the gate insu
`lating layer 40. The data line assembly includes data lines 70
`formed on the gate insulating layer 40 while proceeding in
`the vertical direction. The data line 70 has a plurality of
`linear portions, and connectors interconnecting the linear
`portions. The linear portions are arranged around an imagi
`native straight line left and right in an alternate manner. The
`distance between the neighboring linear portions placed
`around the imaginative straight line up and down or left and
`right is controlled in consideration of the occupation ratios
`of upper and lower domains, and left and right domains. As
`the neighboring data lines 70 are opposite to each other in
`the alternating order of the linear portions, narrow and wide
`regions are alternately present between the data lines 70.
`This structure is the same in the left and right directions as
`well as in the upper and lower directions. The data lines 70
`are overlapped with the storage capacitor lines 30 and the
`gate lines 20. The overlapping of the data lines 70 and the
`storage capacitor lines 30 is made at the connectors thereof.
`0059) A protective layer 80 is formed on the data lines 70.
`A pixel electrode 90 is formed on the protective layer 80 at
`each pixel region with indium tin oxide (ITO) or indium zinc
`oxide (IZO). The pixel electrode 90 is connected to the drain
`electrode 72 through the contact hole 81. The pixel electrode
`90 has a wide portion, and a narrow portion. Furthermore,
`the pixel electrode 90 bears an opening pattern. The opening
`pa