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`US. Patent
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`Dec. 2, 2003
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`Sheet 1 of 18
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`US 6,657,260 B2
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`US. Patent
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`Dec. 2, 2003
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`Sheet 3 of 18
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`US 6,657,260 B2
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`US. Patent
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`Dec. 2, 2003
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`Sheet 4 of 18
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`US 6,657,260 B2
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`US. Patent
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`Dec. 2, 2003
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`Sheet 5 of 18
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`US. Patent
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`Dec. 2, 2003
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`US. Patent
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`Dec. 2, 2003
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`Sheet 9 of 18
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`US 6,657,260 B2
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`Page 10 of 33
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`US. Patent
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`Dec. 2, 2003
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`Sheet 10 of 18
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`US 6,657,260 B2
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`US. Patent
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`Dec. 2, 2003
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`Sheet 12 of 18
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`US. Patent
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`Dec. 2, 2003
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`Sheet 14 0f18
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`US 6,657,260 B2
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`US. Patent
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`Dec. 2, 2003
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`Dec. 2, 2003
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`US. Patent
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`Dec. 2, 2003
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`US. Patent
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`Dec. 2, 2003
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`Sheet 18 0f18
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`US 6,657,260 B2
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`US 6,657,260 BZ
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`1
`THIN FILM TRANSISTORS HAVING
`SOURCE WIRING AND TERMINAL
`PORTION MADE OF THE SAME MATERIAL
`AS THE GATE ELECTRODES
`
`BACKGROUND OF THE. INVENTION
`
`1. Field of the Invention
`
`The present invention relates to a semiconductor device
`having a circuit composed of
`thin film transistors
`(hereinafter referred to as TITTs) and a manufacturing
`method thereof. The present
`invention relates to,
`for
`example, a device represented by a liquid crystal display
`device (on which a liquid crystal module is mounted) and an
`electronic device on which such a device is mounted as a
`part.
`Note that the semiconductor device in this specification
`indicates a device in general, which can function by utilizing
`a semiconductor characteristic, and an electro-optical
`device, a light emitting device, a semiconductor circuit, and
`an electronic device each are the semiconductor devices.
`
`2. Description of the Related Art
`In recent years, a technique for constructing a thin film
`transistor (TFT) using a semiconductor thin film (about
`several to several hundreds nm in thickness) formed on a
`substrate having an insulating surface has been noted. The
`thin film transistor is widely applied to an electronic device
`such as an I(_‘ or an electro-optical device and its develop-
`ment as a switching element of an image display device is
`particularly demanded.
`Conventionally, a iiqu id crystal display device is known
`as the image display device. Since a high resolution image
`is obtained as compared with a passive liquid crystal display
`device, an active matrix liquid crystal display device is used
`in many cases. According to the active matrix liquid crystal
`display device, when pixel electrodes arranged in matrix are
`driven. a display pattern is formed on a screen. In more
`detail, when a voltage is applied between a selected pixel
`electrode and an opposite electrode corresponding to the
`selected pixel electrode, a liquid crystal
`layer located
`bcIWeen the pixel electrode and the opposite electrode is
`optically modulated and the optical modulation is recog-
`nized as the display pattern by an observer.
`The range of use of such an active matrix liquid crystal
`display device is increased. Demands for a higher resolution,
`a higher opening ratio, and high reliability are increased
`along with increase in a screen size. Simultaneously,
`demands for improvement of productivity and cost reduction
`are aLso increased.
`
`Conventionally, when a TFT is manufactured using alu-
`minum as a material ofa gate wiring of the above-mentioned
`TFT, a protrusion such as hillock or a whisker is produced
`by thermal treatment and an aluminum atom is diffused to a
`channel forming region. Thus, an operation failure of the
`'l‘F'l‘ and a deterioration of a 'l‘t’l‘ characteristic are caused.
`In order to solve this, a metallic material which can be
`resistant to thermal treatment, typically. a metallic element
`having a high melting point is used. However, a problem in
`which a wiring resistance is increased due to increase in a
`screen size arises, and increase in power consumption and
`the like are caused.
`
`SUMMARY OF THE INVENTION
`
`Therefore, an object of the present invention is to provide
`a structure of a semiconductor device in which low power
`
`IO
`
`15
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`35
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`40
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`45
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`55
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`till
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`65
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`2
`realized even when a screen size is
`consumption is
`increased, and a manufacturing method thereof
`According to the present
`invention, a gate electrode
`structure is made to be a laminate structure in which a
`material tilm containing mainly TaN or W is used as a lirst
`layer for preventing diffusion to a channel forming region,
`a low resistance material film containing mainly Al or Cu is
`used as a second layer, and a material film containing mainly
`Ti is used as a third layer. Thus, a resistance of a wiring is
`reduced.
`
`According to a structure of the present invention disclosed
`in this specification, a semiconductor device including a
`TFT which is composed of a semiconductor layer formed on
`an insulating surface, an insulating film formed on the
`semiconductor layer, and a gate electrode formed on the
`insulating film is characterized by comprising: a pixel por-
`tion including a lirst n—channel TFF having a source wiring
`made of the same material as the gate electrode; a driver
`circuit including a circuit which is composed of a second
`nchannet TH" and a third n—channel ”WI": and a terminal
`portion made of the same material as the gate electrode.
`In the above-mentioned structure,
`the gate electrode is
`characterized by having a laminate structure of a material
`lilm containing mainly TaN [a first layer), a material [ilm
`containing mainly A1 (a second layer), and a material L'tlm
`containing mainly Ti (a third layer). Also, the gate electrode
`is characterized by having a laminate structure of a material
`film containing mainly W (a first
`layer), a material film
`containing mainly A1 (a second layer), and a material film
`containing mainly Ti (a third layer).
`According to such agate electrode structure, when an ICP
`(inductively coupled plasma) etching method is used, end
`portions of the gate electrode can be formed into a taper
`shape. Note that a taper angle in this specification indicates
`an angle formed by a horizontal surface and a side surface
`of a material layer. Also, in this specification, a side surface
`having the taper angle is caller] a taper shape and a portion
`having the taper shape is called a taper portion.
`Also, in the above-mentioned structure, the present inven-
`tion is characterized in that the second n-channel TFT and
`the third n-channel TPT compose an EEMOS circuit or an
`EDMOS circuit. The driver circuit of the present invention
`is made from an NMOS circuit composed of only n—channet
`’l‘l—“Fs, and the ’l'F'l‘s of the pixel portion are also composed
`of n—channel TFl‘s. Thus, a process is simplified. A general
`driver circuit is designed based on a (.‘MOS circuit com-
`p0scd of an n—channel semiconductor element and a
`p»channel semiconductor element, which are complemen-
`tally combined with each other. Ilowever, according to the
`present invention, the driver circuit is composed of a com-
`bination of only n-channe] TFTs.
`Further,
`in order
`to achieve the above-mentioned
`structure, according to a structure of the present invention,
`there is provided a method of manufacturing a semiconduc-
`tor device including a driver circuit, a pixel portion, and a
`terminal portion, which are located on an insulating surface,
`the method comprising the steps of:
`forming a semiconductor layer on the insulating surface;
`forming a first insulating film on the semiconductor layer;
`forming a gate electrode, a source wiring of the pixel
`portion, and an electrode of the terminal portion on the
`first insulating film;
`adding an impurity element for providing an n-type to the
`semiconductor layer using the gate electrode as a mask
`to form an n-type impurity region;
`
`Page 20 of 33
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`US 6,657,260 BZ
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`Ill
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`15
`
`3
`etching the gate electrode to form a taper portion;
`fonrting a second insulating film which covers the source
`wiring ofthe pixel portion and the terminal portion; and
`forming a gate wiring and a source wiring of the driver
`circuit on the second insulating film.
`In the above—mentioned structure, it
`is characterimd in
`that, in the step of forming the gate electrode, the source
`wiring of the pixel portion, and the electrode 01‘ the terminal
`portion, a material ['ilrn containing mainly TaN, a material
`film containing mainly A], and a material film containing
`mainly 'Ti are formed to be laminated, and then etched using
`a mask to form the gate electrode, the source wiring of the
`pixel portion, and the electrode of the terminal portion. Also,
`in the above-mentioned structure, it is characterized in that,
`in the step of forming the gate electrode, the source wiring
`of the pixel portion, and the electrode of the terminal
`portion, a material lilm containing mainly W, a material film
`containing mainly Al, and a material film containing mainly
`Ti are formed to be laminated, and then etched using a mask
`to form the gate electrode, the source wiring of the pixel
`portion, and the electrode of the terminal portion.
`Also, according to the present invention, a liquid crystal
`display device having the pixel portion and the driver circuit
`as described in the above-mentioned structure or a light
`emitting device with an OLED having the pixel portion and '
`the driver circuit as described in the above-mentioned struc-
`ture can be manufactured.
`Also, according to the present invention, since a step of
`manufacturing a p—ehannet 'I‘FT is omitted, a manufacturing
`step of a liquid crystal display device or a light emitting
`device is simplified and a manufacturing cost can be
`reduced.
`
`31]
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`In the accompanying drawings:
`FIGS. 1A to IC Show manufacturing steps of an
`AM-LCD;
`FIGS. 2A and 2B show manufacturing steps of the
`AM-LCD;
`FIG. 3 shotvs manufacturing steps of the AM—LCD;
`FIG. 4 is a top view of a pixel;
`FIG. 5 shows an appearance of a liquid crystal module;
`FIG. 6 is a cross sectional view of a transmission type
`liquid crystal display device;
`FIGS. 7A and 7B show structures of NMOS circuits;
`FIGS. 8A and 8}} show structures of a shift resistor;
`FIG. 9 is a top view of a pixel portion of the present
`invention;
`FIG. 10 is a cross sectional view ofthe pixel portion of the
`present invention;
`FIGS. llA to 11C show examples of electronic devices;
`FIGS. 12A and 128 show examples of electronic devices;
`FIG. 13 is an observation SEM picture after etching;
`FIG. 14 is an observation SEM picture after etching:
`FIG. 15 shows a relationship between reliability (20-
`hours assurance voltage and ill-years assurance voltage) and
`a Lov length in a 'I‘l-T of a driver circuit;
`FIGS. 16A and 163 are a top view of an El. module and
`a cross sectional view thereof, respectively;
`FIG. 17 is a cross sectional view of an EL module;
`FIG. 18 shows a structure of a gate side driver circuit;
`FIG. 19 is a timing chart of decoder input signals; and
`FIG. 20 shows a structure of a source side driver circuit.
`
`35
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`40
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`45
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`55
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`till
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`Page 21 of 33
`Page 21 of 33
`
`4
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`
`An embodiment mode of the present invention will he
`described below.
`
`First, a base insulating film is formed on a substrate and
`then a semiconductor layer having a predetermined shape is
`formed by a first photolithography step.
`Next, an insulating film (including a gate insulating film)
`covering the semiconductor layer is formed. A first conduc—
`tive film, a second conductive film, and a third conductive
`film are laminated on the insulating film. First etching
`processing is performed for the laminated films by a second
`photolithography step to form a gate electrode made from a
`first conductive layer and a second conductive layer, a
`Source wiring of a pixel portion, and an electrode of a
`terminal portion. Note that, in the present invention, after the
`gate electrode is formed, a gate wiring is formed on an
`interlayer insulating film.
`Next, with a state in which a resist mask formed in the
`second photolithography step is left as it
`is, an impurity
`element (phosphorus or the like) for providing an n-type is
`added to the semiconductor layer to form n-type impurity
`regions (having high concentrations) in self alignment.
`Next, with a state in which the resist mask formed in the
`second photolithography step is left as it
`is, an etching
`condition is changed and second etching processing is
`performed to form a first conductive layer (first width), a
`second conductive layer (second width), and a third con-
`ductive layer (third width), which have taper portions. Note
`that the first width is wider than the second width, and the
`second width is wider than the third width. Here, an elec—
`trode composed of the first conductive layer, the second
`conductive layer, and the third conductive layer becomes a
`gate electrode of an n—ehannel 'l‘Fl‘ (first gate electrode).
`A material film containing mainly "l‘aN or W may he used
`as the first conductive layer which is in contact with the
`insulating film in order to prevent diffusion to a channel
`forming region. Also, a low resistance material film com
`taining mainlyAl or C‘u may be used as the second conduc—
`tive layer. Further, a material
`film containing mainly "l‘i,
`which has a low contact resistance, may be used as the third
`conductive layer.
`Next, alter the resist mask is removed, an impurity
`element for providing an n-type is added to the semicon-
`ductor layer through the insulating film using the first gate
`electrode as a mask.
`
`After that, a resist mask is formed by a third photolilhog-
`raphy method (step) and an impurity element for providing
`an n-type is selectively added in order to reduce an elf
`current of a ‘l‘FT in the pixel portion.
`Next, an interlayer insulating film is formed and a trans-
`parent conductive film is formed thereon. The transparent
`conductive film is patterned by a fourth photolithography
`method (step) to form a pixel electrode. Then, contact holes
`are formed by a fifth photolithography step. Here, contact
`holes which reach impurity regions, a contact hole which
`reaches the gate electrode, and a contact hole which reaches
`a source wiring are formed.
`Next, a conductive film made of a low resistance metallic
`material is termed. A gate wiring, an electrode for connect—
`ing the source wiring and the impurity region, and an
`electrode for connecting the pixel electrode and the impurity
`region are formed by a sixth photoiithography step. in the
`present invention, the gate wiring is electrically connected
`with the first gate electrode or a second gate electrode
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`through a contact hole provided in the interlayer insulating
`lilm. Also, the source wiring is electrically connected with
`the impurity region (source region) through a contact hole
`provided in the interlayer insulating film. Further, the elec-
`trode connected with the pixel electrode is electrically
`connected with the impurity region (drain region) through a
`contact hole provided in the interlayer insulating film.
`Thus, an element substrate including a pixel portion
`having a pixel TFI‘ (n-channel 'l‘F'1') and a driver circuit
`having an EEMOS circuit (n-channel TFI‘s) as shown in
`FIG. 7A can be formed by performing a photolithography
`step for six times in total, that is, by using six masks. Note
`that the example in which a transmission type display device
`is manufactured is indicated here. However, a reflection type
`display device can be also manufactured using a material
`having a high rellecting property for the pixel electrode.
`when the reflection type display device is manufactured,
`since the pixel electrode can be formed being simultaneous
`with the gate wiring, the element substrate can be formed by
`using live masks.
`Also, an active matrix light emitting device having an
`OLED (organic light emitting device) can be manufactured.
`Even in case of the light emitting device, the whole driver
`circuit is composed of n-channel "l‘F'l‘s and the pixel portion
`is also composed of a plurality of n-channel TFTs. In the '
`light emitting device employing the OLEI), at least a 'l‘FT
`which functions as a switching element and a TFT for
`supplying a current to the OLE!) are provided in each pixel.
`Irrespective of a circuit structure of a pixel and a driving
`method, a 'I‘Fl‘ which is electrically connected with the
`OLE!) and supplies a current
`thereto is made to be an
`n-channe] ’I‘F’I‘.
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`'I‘he 0115.1) has a layer including an organic compound
`{organic light emitting material) in which luminescence
`produced by applying an electric field thereto (electro
`luminescence) is obtained (hereinafter referred to as an
`organic light emitting layer}, an anode, and a cathode. The
`luminescence in the organic compound includes light emis-
`sion produced when it is returned from a singlet excitation—
`state to a ground state (fluorescence) and light emission
`produced when it is returned from a triplet excitation—state to
`a ground state (phosphorescence).
`In case of the light
`emitting device of the present
`invention, of the above—
`mentioned light emissions, either light emission may be
`used or both the light emissions may be used.
`Note that in this specification, all layers formed between
`the anode and the cathode in the OLED are defined as an
`organic light emitting layer. Concretely,
`the organic light
`emitting layer includes a light emitting layer, a hole injection
`layer, an electron injection layer, a hole transport layer, and
`an electron transpon layer. Basically,
`the OLED has a
`structure in which the anode, the light emitting layer, and the
`cathode are laminated in order. In addition to this structure,
`there is a case where the ()1 .ED has a structure in which the
`anode, the hole injection layer, the light emitting layer, and
`the cathode are laminated in order or a structure in which the
`anode, the hole injection layer, the light emitting layer, the
`electron transport layer, and the cathode are laminated in
`order.
`Also, when an EDMOS circuit as shown in MG. TB is
`formed by combining an enhancement type and a depletion
`type, before the formation of the conductive film, a mask is
`formed in advance, and an element belonging to the group
`15 of the periodic table (preferably, phosphorus) or an
`element belonging to the group 13 of the periodic table
`(preferably, boron) may be selectively added to the semi-
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`6
`conductor layer which is to be the channel forming region.
`In this case, the element substrate can be formed by using
`seven masks.
`
`Also, description has been made using the n-channe] TFT
`here. However, it goes without saying that a pchannel TE-T
`can be formed by using a p-type impurity element instead of
`the n-type impurity element. In this case, the whole driver
`circuit is composed of p-channel TFTs and the pixel portion
`is also composed of the p-channel 'l'F'I‘s.
`The present invention made by the above structure will be
`described in more detail based on the following embodi-
`ments.
`
`Embodiment
`
`Embodiment 1
`An embodiment of the present invention will be described
`using FIGS. 1A to IC to FIG. 6. Ilcre, a method of
`simultaneously manufacturing 'l'l't'I's composing a pixel por-
`tion and TFTs (only n-channel TFTs) composing a driver
`circuit provided in a periphery of the pixel portion on the
`same substrate will be described in detail.
`In FlG. 1A, a glass substrate, a quartz substrate, a ceramic
`substrate, or the like can be used as a substrate 100.Asilicon
`substrate, a metallic substrate, or a stainless substrate,
`in
`which an insulating film is formed on the surface. may also
`be used. Also, a plastic substrate having a heat resistance,
`which is resistant
`to a processing temperature in this
`embodiment may be used.
`Then, as shoWIt
`in FIG. 1A, a base insulating film 101
`made from an insulating film such as a silicon oxide film, a
`silicon nitride film, or a silicon oxynitride film (SiO,.N,.) is
`formed on the substrate 100. As a typical example, a
`laminate structure is used in which a two-layered structure
`is used for the base insulating film 101, and a first silicon
`oxynitridc film lflln is formed with a thickness of SD nm to
`[00 nm using Si1'1,,, N113, and N20 as reactive gases and a
`second silicon oxynitride lilm 101i) is formed with a thick-
`ness of 100 nm to 150 um using Si11,,, and N30 as reactive
`gases. Also, a silicon nitride film having a film thickness of
`10 nm or less may be used as the base insulating 11an 101.
`When the silicon nitride film is used,
`it has an effect of
`improving gettering efliciency in a gettering step which will
`be performed later in addition to an effect such as a blocking
`layer. Nickel tends to move to a region having a high oxygen
`concentration at gettering. Thus, it is extremely effective to
`use the silicon nitride film as the base insulating film which
`is in contact with a semiconductor film. Also, a three-layered
`structure may be used in which the tirst silicon oxynitride
`film,
`the second silicon oxynitride film, and the silicon
`nitride film are laminated in order.
`The semiconductor film as an active layer is obtained by
`crystallizing an amorphous semiconductor lilm formed on
`the base insulating film 101. The amorphous semiconductor
`film is formed with a thickness of 30 nm to 60 nm. After that,
`a metallic element (nickel in this embodiment) having a
`catalytic action for promoting crystallization is used and a
`nickel acetate solution including nickel at 1 ppm to 100 ppm
`in weight conversion is applied onto the surface of the
`amorphous semiconductor film with a spinner to form a
`catalytic contained layer.
`With keeping a state in which the amorphous semicon-
`ductor film is in Contact with the catalytic element contained
`layer, thermal treatment for crystallization is performed. In
`this embodiment, the thermal treatment is performed by an
`RTA method. A lamp light source for heating is tuned on for
`1 second to 60 seconds, preferably, 30 seconds to 60 seconds
`and this operation is repeated for 1
`time to 10 times,
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`US 6,657,260 BZ
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`7
`preferably, for 2 times to 6 times. Although the light emis-
`sion intensity of the lamp light source is set to be an arbitrary
`intensity,
`the semiconductor film is heated so as to be
`instantaneously heated at 600° C. to 10000 (3., preferably,
`about 650° C. to 750° C. Even if such a high temperature is
`obtained, the semiconductor film is just heated in a moment
`and there is no case where the substrate 100 itself is distorted
`and deformed. In this way, the amorphous semiconductor
`film can be crystallized to obtain the crystalline semicon-
`ductor film.
`In order to increase a crystallization ratio (a percentage of
`crystalline components in the entire volume of the film)
`further and to repair a defect left in a crystal grain, laser light
`is irradiated to the crystalline semiconductor film. As the
`laser light, excimer laser light having a wavelength of 400
`nm or less, a second harmonic of a YAG laser, or a third
`harmonic thereof can be also used. In any of the cases, pulse
`laser light having a repetition frequency of about 10 Hz to
`1000 II: is used,
`the laser light
`is condensed to be 100
`m.llcm2 to 400 mchm2 by an optical system, and laser
`processing for a crystalline semiconductor film 104 may be
`performed at an overlap ratio of 90% to 95%.
`Note that an example using the pulse laser is indicated
`here. However, a continuous oscillation laser may also be
`used. In order to obtain a crystal with a large grain size at
`crystallization of the amorphous semiconductor film,
`it is
`preferable that a solid laser capable of producing continuous
`oscillation is used and one of a second harmonic to a fourth
`harmonic of a
`fundamental wave is applied. Typically, a
`second harmonic (532 nm) or a third harmonic (355 nm) of
`an NszVOA laser (fundamental wave: 1064 nm) may be
`applied. When the continuous oscillation laser is used, laser
`light emitted from the continuous oscillation YVO, laser
`having an output of 10 W is converted into a harmonic by
`a non—linear optical element. Also, there is a method of
`locating a YVO, crystal and a non-linear optical element in
`a resonator and entitling a harmonic. Then, laser light is
`preferably formed into a rectangular shape or an elliptical
`shape on an irradiating surface by an optical system and
`irradiated to an object
`to be processed. At
`this time, an
`energy density of about 0.01 MW'lcm2 to 100 l’t/lchm2
`(preferably, 0.1 MVWcm2 to 10 MWi’cmz) is required. Then,
`the semiconductor film may be moved relatively to laser
`light at a speed of about
`It] cmfs to 2000 cmls to he
`irradiated.
`light after
`irradiating laser
`Note that a technique for
`thermal crystallization using nickel as a metallic element for
`promoting crystallization of silicon is used here. However,
`an amorphous silicon film may be crystallized by the con-
`tinuous oscillation laser (the second harmonic of the YVO,l
`laser) without adding nickel thereto.
`Next, the following gettering processing is performed to
`remove a catalytic element included in the crystalline semi-
`conductor film. A barrier layer is fomied on the crystalline
`semiconductor film. As the barrier layer, a porous film is
`formed Such that
`the catalytic element (nickel) can be
`moved to a gettering cite by thermal treatment and further an
`etching solution used in a step of removing the gettering cite
`does not penetrate. For example, a chemical oxide film
`formed by processing using omne water or a silicon oxide
`(SiO‘r) film maybe used. In this specification, a film having
`such a properly is particularly called a porous film.
`Next, a semiconductor film including a noble gas element
`is formed as a gettering cite. In this embodiment, at a stage
`of film formation by a plasma CVD method, a sputtering
`method, or the like or at a stage of addition by an ion doping
`method or an ion implantation method after
`the film
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`formation, a semiconductor film including a noble gas
`element at a concentration of lxlO‘Wch to lxlOzzr’Cm“,
`preferably, lxlfll‘ufcrn3 to lxlflallcm3 is formed.
`After that,
`thermal
`treatment such as an RTA method
`using a lamp light source or thermal
`treatment using a
`furnace is performed to move the catalytic element to the
`gettering cite in a longitudinal direction. This thermal treat-
`ment also serves as anneal. With respect
`to a heating
`condition, a lamp light source for heating is tuned on for I
`second to 60 seconds, preferably, 30 seconds to 60 seconds,
`and this operation is repeated 1 time to It] times, preferably,
`2 times to 6 times. Although the light emission intensity of
`the lamp light source is set to be an arbitrary intensity, the
`semiconductor film is heated so as to be instantaneously
`heated at 600° C. to 1000” C., preferably, about 700° C. to
`150° C .
`After the completion of the gettering step, the gettering
`cite made of the amorphous semiconductor is selectively
`etched to remove it. As an etching method, dry etching
`without plasma by CIF3 or wet etching by an alkali solution
`such as an aqueous solution including hydrazine or tetra-
`cthylamrnonium hydroxide (chemical
`formula:
`(CH3)
`,,NOl-I) can be used. At
`this time, a barrier layer 106
`functions as an etching stopper. Also, the barrier layer 106
`may be removed by hydrofluoric acid in a later step. In order
`to improve the crystallization, laser light may be irradiated
`after the crystallization step.
`After that, the obtained crystalline semiconductor film is
`processed by etching in a predetermined shape to form
`semiconductor layers 102 to 106 separated in an island
`shape.
`After the semiconductor layers 102 to 106 are formed, an
`impurity element
`for providing a p-type may be added
`thereto in order to control a threshold value (Vth) of an
`n—channel 'l‘Fl‘. An element belonging to the group 13 of the
`periodic table, such as boron (B), aluminum (Al), or gallium
`(Ga) is known as the impurity element for providing a p-type
`to a semiconductor.
`Next, a gate insulating film 10? covering the semicon-
`ductor layers 102 to 106 separated in an island shape is
`formed. The gate insulating film 107 is formed by a plasma
`CVD method or a sputtering method and made from an
`insulating film including silicon, having its thickness set to
`be 40 nm to 150 nm. 01' course, the gate insulating film 107
`can be used as a single layer of the insulating film including
`silicon or a laminate structure thereof.
`When a silicon oxide film is used, 'I‘EOS (tetraethyl ortho
`silicate) and 02 are mixed by a plasma CV!) method, a
`reactive pressure is set to be 40 Pa, and a substrate tem-
`perature is set to be 300° C. to 400° C. Then, discharge is
`performed at a high frequency (13.56 MIlZ) power density
`of 0.5 Wt’cm3 to 0.8 Wtcm2 to form the silicon oxide lilm.
`After that, when thermal anneal