`
`
`
`VOL. sc-22, NO. 6, DECEMBER 1987
`
`IEEE JOURNAL OF SOLID-STATE CIRCUITS,
`
`1091
`
`Charge Injection in Analog
`
`
`MOS Switches
`
`GEORGE WEGMANN, STUDENT MEMBER, IEEE, ERIC A. VITTOZ, SENIOR MEMBER, IEEE,
`
`
`
`AND FOUAD RAHALi
`
`Abstract-Charge injection in MOS analog switches, also called pass
`
`
`
`
`
`
`
`transistors or transmission gates, is approached by using the continuity
`
`
`
`
`
`equation. Experimental results show the negligible influence of substrate
`
`
`
`
`
`current which leads to a unidimensional model. An easy-to-handle simplified
`
`
`
`
`model is deduced and its predictions compared to the injections obtained
`
`
`by measurements. It is shown that this model, which can be used to
`
`
`
`
`
`implement various strategies to reduce charge injection, is valid in any
`
`realistic situation.
`
`
`
`
`
`
`
`
`
`(pass transistor). analysis Fig. 1. Circuit for charge injection
`
`
`
`I.INTRODUCTION
`
`Further assumptions are equilibrium before switching
`
`OST modem analog MOS circuits include an
`
`
`M
`
`
`
`
`elementary sample-and-hold circuit that combines a
`
`
`
`sampling switch, implemented by at least one transistor,
`
`
`
`with a holding capacitor. The major limitation to the
`
`
`
`accuracy of this circuit is the disturbance of the sampled
`
`
`voltage when the transistor is turned off. One cause is
`tFALL
`�e
`Fig. 2. Definition of the applied gate voltage for an n-channel tran­
`
`
`
`
`
`
`
`noise, which results in random sequences of small pertu'r­
`
`sistor. Ve is assumed
`
`
`to decrease linearly with time from its ON value
`
`
`bations. The other is charge injection due to carriers
`Ve ON to its OFF value VcoFF· Effective
`
`threshold VTE is reached
`after
`fall time (FALL·
`
`
`
`
`released from the channel and to coupling through gate­
`
`
`to-diffusion overlap capacitances.
`
`
`This problem had been identified in the very first
`vohage VTE will be assumed to depend
`
`gate threshold
`
`
`
`publications on switched-capacitor circuits [l], where
`
`, according to
`
`linearly ori the input voltage v;0
`
`
`
`
`first-order compensations were already proposed. A model
`
`based oh the circuit of Fig. 1, to which most practical
`
`
`
`
`charge injection problems can be reduced, was derived and
`where Vro is the threshold
`for v;0 = 0 and n O = 1 +
`Voltage
`
`
`
`
`resulted in a universal chart [2]-[4]. This model allows one
`
`
`y / � . y is the usual body effect parameter and «1>1 the
`
`
`
`
`to choose and implement the best possible design strategy
`
`
`Fermi level. The constant slope during switching off is
`
`
`
`for any given situation. It has been rederived first with a
`
`
`
`zero signal source resistance [5] and then for the general
`(2)
`
`case [6], [7], with exactly the same results.
`
`
`The purpose of this paper is to validate this model by
`where t FALL is the time needed for the gate voltage
`to
`
`
`
`
`
`providing physical support, theoretical proof, and experi­
`VTE .
`
`reach the threshold voltage
`
`
`
`
`
`
`mental evidence and to define its limits of validity.
`
`
`
`
`The analysis assumes a symmetrical transistor and a
`off and
`
`VG (with respect to the
`
`linear variation of the gate voltage
`VGoN and Vcopp, as
`
`bulk) between ON and OFF values
`(3)
`
`
`shown in Fig. 2 for an n-channel transistor. The effective
`
`
`which allows one to neglect the effect of the signal source
`
`
`
`
`during switching off.
`
`
`Other important values are the total gate capacitance
`Manuscript received May 1, 1987; revised July 7, 1987.
`
`
`
`C0v and the
`
`
`Ca, which includes both overlap capacitances
`
`
`G.Wegmann and F. Rahali are with the Electronics Laboratory, Swiss
`
`
`
`
`
`
`Federal Institute of Technology (EPFL), CH-1007 Lausanne, Switzer­
`total charge
`
`Q,01 released at switching off
`
`land.
`
`
`
`
`E. A. Vittoz is with the Centre Suisse d'Electroniqµe et de Micro­
`
`
`
`
`
`technique S.A. (CSEM), Maladiere 71, CH-2000 Neuchatel 7, Switzer­
`land.
`
`
`
`IEEE Log Number 8716795.
`
`(4)
`
`This charge increases if the transistor is widened to reduce
`
`
`
`
`
`
`
`
`
`0018-9200/87 /1200-1091$01.00 ©1987 IEEE
`
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`
`

`

`1092
`
`[BEE JOURNAL OF SOLID-STATE
`
`CIRCUITS,
`
`VOL. SC-22, NO. 6, DECEMBER 1987
`
`> ‘GOFF
`
`[v]
`
`1
`
`20 .
`
`I
`0
`
`I
`
`I
`
`I I
`
`l-l
`
`T n-ch ‘/L - S4%2
`
`C= - 12PF
`
`v ~N - 5V
`
`QToT_ 54 PC
`-
`9.5”s
`
`To
`
`-3
`
`-2
`
`Fig. 3. Measured total charge injected Qinj at drain and source as a
`function of the gateOFF voltageVGOFF. N-channelwith W’\L = 840/42,
`CG =12 pF, VT&= 0.5 V, VGo~ = 5 V, Q,o, = 54 pC, and TO= 9.5 ns.
`Different
`fall
`times t~~LL are considered:
`tFA~~/To = 0.63, (b)
`(a)
`rFALL/To = 42.
`tFALL/To = 2.4, and (C)
`
`‘in/
`
`[P~
`
`v
`, FLATBAND
`
`c b
`
`a
`
`*
`
`:
`
`“
`
`‘+j’L -IJ4742
`
`T p-ch
`
`/CG
`
`I
`I
`
`I
`
`I
`
`I
`
`I
`
`40
`
`P--k””a
`
`20II
`
`01
`
`Io
`
`/
`
`=
`
`12°F
`
`VWN-
`-5V
`QTm - 54,c
`To -
`
`27ns
`
`1
`
`2
`
`3
`
`-
`
`‘GOFF
`
`[v]
`
`Fig. 4. Measured totaf charge injected Qi.j at drain and source as a
`function of the gate OFF voltage VGOFF.P-channel with W/L= 840/42,
`CG=12 pF, VT~ = –0.45 V, V~oN= – 5 V, Q,O,= 54 PC, and To=
`27 ns. Different
`fall times t~ALLare considered: (a)
`t~A~~/TO= 0.22,
`=15.
`tFALL/To = 0.85 and (C)
`(b)
`tFALL/To
`
`times, an increase of the charges flowing
`fall
`At short
`into the substrate is observed while V~o~~ decreases until
`the flat-band voltage is reached. These charges going to the
`substrate reduce the total amount of injected charge at the
`drain and source. Beyond flat-band voltage V~~, charge
`injection
`remains
`constant. The physical explanation
`is
`that most of the channel charge has not yet flown back to
`the drain’ and source when the gate voltage V~ reaches V~~.
`If V~ is reduced further, most of the mobile charges will be
`prevented
`from escaping to the substrate by the surface
`potential barrier. This barrier is progressively lowered when
`Vc OFF is reduced, which explains why an increasing pro-
`portion
`of
`the channel charge escapes to the substrate.
`Therefore Qi.j
`is progressively reduced and saturation is
`reached when V~o~~ is approximately
`equal
`to the flat-
`band voltage V~~, which eliminates the barrier.
`Fig. 4 shows an equivalent
`situation for a p-channel
`transistor.
`lengths
`Measurements with more realistic short-channel
`did not allow us to show such dependence
`because the
`short
`fall
`time conditions
`could not be achieved experi-
`
`this
`that
`It can be pointed out
`time constant.
`the transfer
`.,
`charge
`is a linear
`function of VT~, and thus a linear
`function of Vi. as far as (1) is valid. It results in a linear
`dependence
`of charge injection with Vi., which has been
`confirmed experimentally [8].
`The longest
`time needed by mobile charges to reach one
`end of the channel
`is proportional
`to
`-vE)}
`
`‘O=nOL2/’{p(vGON
`
`(5)
`
`where p is the carrier mobility and L the effective channel
`length [9], [10]. By switching off the transistor
`the mobile
`charges of the inversion charge layer are shared between
`drain,
`source, and substrate and change the value of the
`voltage across the capacitors. The fraction of charge AQ2
`of
`the total
`channel
`charge released onto the holding
`capacitor Cz causes an error voltage of
`
`AV2= AQ2/C2.
`
`(6)
`
`This error voltage limits the accuracy of high-perfor-
`mance analog CMOS circuits as they need large transistors
`(which entails a high channel charge) and small capacitors
`to reduce the transfer
`time constant.
`The prediction of the error voltage AV2 in the general
`case of Fig. 1 will be based on the following qualitative
`physical description of the charge injection phenomenon in
`the MOS transistor. A rapid variation of the gate voltage
`causes a variation of the surface potential as the amount of
`mobile charges cannot change instantaneously. The surface
`potential
`induces an immediate variation of the depletion
`width, which compensates
`the excessive charge. Equi-
`librium corresponding
`to the new gate voltage is reached
`by the subsequent
`charge flow to drain and source. A
`fraction of the charge in the channel escapes to the substrate
`leading
`to charge pumping [11]–[13], which is due to
`trapping
`at
`the interface
`and to recombination
`in the
`channel and into the substrate.
`The fact that a part of the channel charge does not
`back to the drain or source has to be analyzed.
`
`flow
`
`H.
`
`CHARGES LEAKING TO THE SUBSTRATE
`
`of the collected charge at the drain and
`Measurements
`source ( Qii j) as a function of the gate OFF voltage V~o~~
`and the fall
`time t~A~~ are represented in Fig. 3 for an
`n-channel
`device. Long transistors have been chosen to
`allow measurements with To/t FALL larger
`than 1, corre-
`sponding to a short fall time situation.
`At long fall times (the switch-off time is longer than the
`channel
`transit
`time), nearly all the channel charge of the
`transistor
`is collected by the drain or source and even a
`low voltage V~o~~ does not change the amount of injected
`charge. The inversion charge layer can follow the gate
`voltage variation. When the gate voltage V~ reaches V~~,
`most of the channel charge has already been injected and
`the total
`injected charge QiHj at drain and source does not
`vary with V~o~~.
`
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`
`

`

`1093
`
`-1
`
`TIME/To
`
`Qs i =F(t
`
`i me )
`
`J
`—
`Fig. 5. Evolutionof the minority-carrierdensityalongthe channelas a
`functionof timeandpositionfora falltimet~~~~/~O= 1, C2\Cl = 10,
`C’l=10 C~,and Cz=100 C~.
`
`CHRNNEL
`
`CHRRGE
`
`DENSITY
`
`I1
`
`’I
`
`I
`
`—1
`
`VTE
`
`2)
`
`CHFINNEL
`
`CHRRGE
`
`DENSITY
`
`Q’sl=F(tl
`
`me)
`
`TIME/To
`
`WEGMANN
`
`et al.: CHARGE INJECTION
`
`IN ANALOG MOS SWITCHES
`
`mentally and because the dependence
`
`were merged
`
`by the
`
`injections due to the overlap capacitances.
`
`Summarizing,
`
`if the fall titie is longer than the channel
`
`transit time
`
`TO and
`
`the gate OFF voltage ~G OFF is just
`
`slightly smaller than the threshold voltage ~TE, then the
`
`substrate current is negligible.In the practical case of short
`
`transistors, as used for pass transistors,which have a very
`
`short-channel
`
`transit time TO, one can assume
`
`that the
`
`charges lost through the substrate can be neglected.
`
`III. MODELS
`
`A. General Model
`
`in the channel
`The flow of mobile charges
`expressed using the continuity equation [14]:
`
`can be
`
`dn(x,
`
`y,t)
`
`at
`
`1
`=idiv(.l(x,
`
`y))+ G-U
`
`(7)
`
`.l(x,y) stands for the current density, q for
`the
`where
`elementary charge, and n(x, y, t) for the carrier density. y
`refers
`to the axis along the channel and x to the one
`to it, into the substrate. G and U stand for
`perpendicular
`the generation and recombination rate, respectively.
`It has been shown in Section 11 that
`the charge leaking
`to the substrate
`due to mobile carriers is within a few
`percents
`in practical cases. Therefore it can be assumed
`that
`the current density .l(x, y) depends only on y and
`that
`(U – G) = O. Using the
`simple
`linear
`expression
`between the induced channel charge density Q,i ‘and the
`quasi-Fermi
`level O. of the mobile charges
`
`Q.i=cox(~G
`
`(8)
`
`- VTO- ~orDn)
`
`Fig. 6. Evolutionof the minoritv-carrierdensitvalorwthe channelin
`{he case of a asymmetrical situa~ion as a functi~n of t~me and position
`for a short fall time f~~~c/TO = 0.1. C2/Cl = 10, Cl = 0.01 C~, and
`C2 = 0.1 CG.
`
`where
`
`Cox is the gate oxide capacitance per unit area, and
`
`introducing the relation between
`
`the quasi-Fermi
`
`level and
`
`the current density .l(y, t),one can transform the continuity
`
`equation (7) into (9)
`
`;Q,i(d=+vj
`
`where
`
`[
`
`Qsi(y>~) = -~q~(x,~,t)dx
`
`1
`
`The
`
`nonlinear
`
`and nonstationary
`
`differential equation
`
`(9) may
`
`be solved numerically
`
`using the finite-element
`
`method
`
`coupled
`
`with the simple
`
`Runge–Kutta
`
`method
`
`Qsi(Y~~)&.i(y>t)(9)~[151”
`From the numerical solution Q,i( y, i) one can firid the
`variation of the quasi-Fermi
`level along the channel using
`(2) and derive the charge injection values at drain and
`source by integrating (10).
`t)
`The evolution of
`the mobile charge density Q,i(y,
`along
`the channel
`(y axis) as a function of time and
`
`Q,i iSa un~own fu?ction of time and Y only which we
`have to calculate.
`
`The
`
`boundary
`
`conditions
`
`may
`
`be
`
`expressed
`
`if the
`
`on the drain and source side are
`impedances
`terminating
`specified. Using the sample-and-hold
`circuit of Fig. 1 they
`
`can be expressed as follows (assuming that Cov is equal to
`
`@ Figs. 5-7.
`position is shown
`At short fall times (Fig. 5) the mobile charges follow a
`curved profile with a higher conductance
`in the center of
`the channel
`than at both extremities, because those in the
`
`center do not have enough
`
`time to flow to the drain or
`
`zero):
`
`aQ
`pw
`——
`Qsi~
`n~C~
`
`dV1
`=cl—
`dt
`
`source
`
`+—
`gQ
`
`i3Q~i
`—
`“ dy
`
`dVz
`= c2—
`dt
`~,ti~
`
`where W is fhe channel width.
`
`resulting electric field in the channel pushes
`source. The
`the carriers to each side. As soon as pinch-off is reached at
`(lOa)both ends
`the terminal
`impedances
`have no influence
`anymore.
`If this occurs early enough half the total channel
`charge is collected by the source and drain.
`A nonsyrnmetrical
`electric field along the channel (Fig.
`6) may
`only be obtained with a very short fall time and
`
`(lOb)
`
`with
`
`a value of Cl or C2 much
`
`smaller than the gate
`
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`
`

`

`1094
`
`IEEEJOURNAL OF SOLID-STATECIRCUITS,VOL. SC-22,NO. 6,DECEMBER 1987
`
`IGON
`
`VTE
`
`2)
`
`CHRNNEL
`
`CHflRGE
`
`DENSITY
`
`Qsl=F(time)
`
`TIME/To
`
`Fig. 7. Evolution of the minority-carrier density along the channel as a
`function of time and position for a long fall time t~~LL/TO = 10. C2/C1
`=10, Cl =10 C~, and C2=100 C~.
`
`J- LIJ-L1
`Ov
`
`g
`
`v,Clq~V2
`
`‘c
`
`0
`“Ov
`
`c,
`
`Fig. 8. Model of the channel for chsrge injection anafysis. Substrate
`current is assumed to be negligible.
`
`capacitance C~. However,
`practical case.
`Long fall times will be considered in the next section.
`
`it does not correspond to any
`
`B. Simplified Modelization (Electrical Model)
`
`Fig. 7 shows that for long fall times with
`
`‘FALL
`
`‘>
`
`‘O
`
`(11)
`
`and large enough
`
`capacitor values
`
`is homogeneous all along the channel. The
`the profile
`channel
`conductance
`can therefore be represented
`as a
`time variable conductance g
`
`g[vG(t)]
`
`=f3(vG(t)-vTE)
`
`=B(v~()~
`
`-at
`
`- F’..)
`
`(13)
`
`with ~ = ( W/L)pCox, while the gate voltage V~ is higher
`than the effective threshold voltage. For a gate voltage
`lower than the effective threshold voltage VT~ the channel
`,.
`conductance N assumed to be equal
`to zero, which means
`that weak inversion effects are neglected: Thus,
`the tran-
`sistor can be represented as a time-variable conductance g
`associated with the distributed gate oxide capacitance and
`the two overlap capacitances Cov, as shown in Fig. 8 [2],
`[4]. Drain and diffusion capacitances
`are included in Cl
`and Cz.
`
`Fig. 9. Final simplified model for charge injection analysis.
`
`the variation
`(11) and (12) are satisfied,
`If conditions
`the surface potential
`at any point of
`the
`with time of
`channel
`is negligible with respect
`to that of the gate. Thus
`the linear decrease of V~ with slope a across the distribut-
`ed gate capacitance
`CG is equivalent to a constant current
`source of total value (aC~) flowing symmetrically to both
`ends. This leads to the final model of Fig. 9.
`Resolving this circuit yields the following normalized
`differential
`equation:
`
`dV/dT= (T- B)[(l+ C;l/’C1)17+2TC,
`
`/’C1] -1
`
`(14)
`
`where
`
`the normalized
`
`factors are
`
`V= AV,/[(CG/2)~m]
`
`T= t/’{~fl)
`
`B= (Vco~–V~~)~-.
`
`(15a)
`
`(15b)
`
`(15C)
`
`the
`values of
`for different
`solution
`The numerical
`(14) during the
`capacitor
`ratio Cz/C1
`by integrating
`time (O < T < B) leads to the diagram of Fig. 10
`switch-off
`the charge injection ratio AQ2/Qfot
`representing
`as a
`function of the characteristic switching parameter B [2].
`This diagram shows that for small values of B, equirepar-
`tition of charge is obtained independently of capacitance
`ratio C2/C1. For large values of B, which are reached if
`the fall
`time
`is very long, voltage
`equilibrium is ap-
`proached asymptotically, which yields a charge repartition
`proportional
`to C2/Cl.
`For
`intermediate
`cases, corre-
`sponding to most realistic situations,
`the charge repartition
`strongly depends on the switching parameter B.
`The effect of nonsymmetrical overlap capacitances has
`to be taken into account because for short
`transistors
`(as
`used for pass transistors)
`their difference ACO” can be an
`fraction of the toti~lgate capacitance. Therefore
`important
`the two symmetrical current sources of a value of aC~/2
`on each side (Fig. 9) have to be replaced by one of a value
`of a(C~ + ACOV)/2and by cme of a(C~ – ACOV)/2.
`Assuming that
`the charge redistribution
`is not affected
`by a small variation of B, a first-order correction can be
`obtained
`by adding the charge difference due to the asym-
`
`metrical overlap capacitances leading to
`
`AV2a,ymmetncd= AV2(1+ ACo~/C~)
`
`(16)
`
`where
`
`the positive sign corresponds
`
`to the case of larger
`
`overlap capacitance
`
`on side 2,.
`
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`
`

`

`WEGMANNet al.: CHARGEINJECTIONIN ANALOGMOSSWITCmS
`
`1095
`
`1
`
`.0
`
`.2
`
`0
`
`.01
`
`CHRRGE INJECTION
`
`IN Cz
`
`c ~
`1
`{
`100
`10
`
`3
`
`1
`
`0.3
`
`0.1
`0
`
`. 1
`
`1
`
`10
`
`)IAEI.5
`B=(VGON–VTE)*[13/(a*C2
`diagram showing the amount of charge injected in C2 as a function of switching parameter
`Fig. 10. Norn+ed
`B = ( VGON – VTE)[ ~/( aC2 )] 0.5 and capacitance ratio C2/C1. Various points calculated from the numerical model for
`marginaf situations (see Table I) are reported for C2/C1 =10 (X) and C2\Cl = 0.1 (O). None of the points showing visible
`discrepancy (7–13) corresponds to a realistic case.
`
`TABLE I
`VARIOUSPOINTSCALCULATEDFORDIFFERENTVALUESOFc2 /cG
`ANDtFALL/~O IN THECASEOFC2/Cl=KlA NDC2/Cl= 0.1
`
`No
`
`TFALLITO
`
`c~l~
`
`c~/c,
`
`COMMENTS
`
`I
`
`2
`
`3
`
`4
`
`5
`
`6
`
`7
`8
`
`9
`10
`II
`
`12
`
`13
`
`100
`
`I 00
`
`I00
`
`10
`
`10
`
`1
`
`I
`
`I
`01
`01
`001
`
`0.0 I
`
`0001
`
`10
`100
`
`I
`I00
`01
`IOu
`
`01
`
`001
`
`01
`
`001
`
`01
`
`001
`
`01
`
`0.1
`10
`10
`10
`10
`
`10
`
`10
`
`01
`
`10
`
`01
`
`10
`
`01
`01
`
`FIGURE 7
`
`FIGURE 5
`
`FIGURE 6
`
`the parameters of this simplified model are
`In summary,
`the gate voltage VGON,the effective threshold voltage V~~
`(which includes
`the effect of
`the substrate modulation
`the slope a of the gate voltage, the value
`according to (l)),
`of the capacitor Cz, the ratio Cz/C1,
`the transfer parame-
`ter ~ of the transistor,
`and the difference of the overlap
`capacitances ACOV
`To check the importance of conditions (11) and (12) for
`the validity of this simplified model, various points corre-
`sponding to various values of tFALL/To and CJCG were
`calculated numerically with (9) and (10). Some of these
`points are given in Table I and reported in the diagram of
`
`is perfect
`the correspondence
`Fig. 10. It can be seen that
`for all points satisfying (11) and (12) (only points 1, 2, and
`4 of
`this category have been reported for
`the sake of
`clarity). Even when the conditions
`are only marginally
`fulfilled (points 3 and 5–7), results still agree within a few
`percent. All
`the points
`for which a large discrepancy is
`observed correspond to nonrealistic situations.
`At short
`fall
`times the channel
`is quickly pinched off
`and is no longer homogeneous as assumed in the simplified
`model. However,
`the fact that
`the channel conductance is
`not uniform does not
`influence the equal sharing of the
`channel charge to drain and source predicted by the model
`for small values of B, but only the time needed to evacuate
`all the mobile charges from the device.
`
`IV.
`
`EXPERIMENTAL RESULTS
`
`by
`out
`carried
`verification was
`experimental
`The
`measuring the circuit of Fig. 1. To increase the accuracy of
`the measurements
`and to reduce parasitic,
`a guard box,
`large transistors,
`and load capacitors were used. Each
`measurement point
`is the mean value of over 200 samples,
`which reduces the effect of added noise, especially for low
`injections.
`All device, parameters were individually measured. Care
`was taken to respect
`the conditions discussed in Section 1[1
`for negligible charge flow to the substrate. Calibration of
`the total channel charge was obtained for each measure-
`ment by connecting the drain to the source. The precision
`of
`the measurements
`is estimated to be within a few
`percent
`in the worst cases.
`The influence of all
`the parameters mentioned before
`has been separately tested.
`In Fig. 11 the experimented
`
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`

`

`1096
`
`IEEEJOURNALOFSOLID-STATECIRCUITS,VOL.SC-22,NO.6, DECEMBER1987
`
`the amount of charge injection as a
`to predict
`designers
`function of different parameters.
`It has been shown theo-
`retically and experimentally that
`this model remains valid
`in any practical
`situation, as long as the amount of charge
`leaking to the substrate is negligible. For short
`fall times
`(t~*~L.<T~)
`this must beensured
`byavoidinggateom
`voltage values that are much lower
`than threshold V~~.
`Experimental
`results obtained by varying the different
`parameters
`agreed with the injections obtained
`by the
`models. The simplified model concentrates all the relevant
`parameters
`in an injection diagram (Fig. 10) and allows
`one to predict quickly the amount of charge injection in
`order
`to decide on a possible strategy.
`than Cz
`A first strategy is to choose Cl much larger
`(very low impedance of the signal source) and the switching
`parameter B much larger
`than 1, so that all the charges
`released into Cz flow back into Cl during the decay of the
`gate voltage and AQZ tends to zero (some easily calculable
`additional
`charge is due to the coupling through overlap
`capacitances
`after switching off). The drawback is the long
`time needed for switching off.
`A second possibility is to equilibrate the values of both
`capacitors
`[16]. By symmetry, half
`the channel
`charge
`flows in each capacitor and can be compensated by half-
`sized dummy switches that are switched on when the main
`switch is blocked [1].
`A third solution eliminates the need for equal capacitor
`values by choosing a value of B much smaller
`than 1,
`which also ensures equipartition of the total charge. Charge
`compensation
`can be achieved using a single half-sized
`dummy switch.
`If
`the switch is implemented with a pair of comple-
`mentary
`transistors
`controlled by complementary
`clock
`signals,
`the two types of charge released may partially
`compensate
`each other. This kind of compensation is not
`very efficient since it depends on the input voltage Vi. and
`since no real matching exists between p- and n-channel
`transistors.
`In addition,
`the residual charge injection can
`be shown to depend on the timing and skew of the two
`complementary
`clocks, which may translate
`jitter
`into
`amplitude noise [17]. A good procedure is therefore to turn
`off completely the first transistor before switching off the
`second. The problem can then easily be reduced to that of
`a single switch.
`the
`and
`unavoidable mismatch
`the
`In
`any
`case,
`achievable
`parameters
`limit
`the
`the
`uncertainty
`of
`compensation
`of charge injection. To ensure the best pos-
`sible compensation,
`the dummy switches must have the
`same configuration and be as close as possible to the main
`switch. Such carefully implemented compensation
`allows
`one to reduce charge injection by one, maybe two orders of
`magnitude.
`Further
`improvements
`require special circuit
`techniques,
`such as full differential
`implementation
`and
`active compensation
`by low-sensitivity auxiliary intmt [31,
`.
`.
`.
`..
`[18], [19].
`
`CHRRGE
`
`INJECTION
`
`IN C2
`
`=2/cl
`
`1 .
`
`8
`
`.6
`
`.4
`
`.2
`
`0
`
`+J
`
`0
`
`$ N
`
`2
`
`.01
`
`.1
`
`1
`
`B=(VGON-VTE)*[8/(a*C2)
`
`10
`lAEi.5
`
`Fig. 11. Measured injections for symmetrical transistors, 1) N-channel,
`CG = 79 PF, VTE = 0.5 V, C2/C = O, and Cz =
`W/L = 10000/22,
`39.3 nF. Gate ON voltage VGON = 2 V (0); gate ON vo
`tage VGON = 3.5
`i
`CG = 12 pF, VTE = – 0.45 V,
`V (A).
`2) P-channel, W/L=
`840/42,
`C2/Cl = 10, C2 = 27.3 nF, and Cl= 2.9 nF. Gate ON voltage VGON =
`– 5 V (X, +). The slope a is the independent variable.
`
`4
`
`c,
`
`CHRRGE
`
`INJECTION
`
`IN C2
`
`c
`
`1
`
`.8
`
`,6
`
`“2F#mT
`
`0
`
`.01
`
`.1
`
`1
`
`10
`
`100
`10
`
`3
`
`1
`
`0,3
`
`0.1
`0
`
`B=(VGON–VTE
`)*[8/(a*C2)l
`AD. 5
`Fig, 12. Measured injections
`for asymmetrical overlap capacitances
`CG = 6 pF,
`ACov/C~ = + 0.17. P-channel, W/L= 1000/10,
`VTE =
`– 0.45 V, C2/Cl = O, C2= 2.9 nF, and VGON = – 5 V. Cov larger on
`Cz side: measured (0); after correction with (16) (+). C ~ smaller on
`after correction with (16) ( X), ~he slope a is
`C2 side: measured (A);
`always the independent variable,
`
`(W/L= 10000/22 and C2/Cl = O)
`results for an n-channel
`(W/L = 840/42 and Cz/C1 =10)
`are
`and a p-channel
`reported.
`results for a ratio Cz/C1
`Fig. 12 shows the experimental
`= O and a p-channel
`transistor
`(W/L= 1000/10) having a
`large
`asymmetry
`of overlap capacitances
`(ACov/CG =
`0.17). After correcting by (16), a good agreement
`is ob-
`tained with the theoretical curve, which demonstrates
`the
`validity of this equation.
`Several other measurements have been carried out by
`using other
`transistors
`and other capacitances. Where it
`was possible
`the experiments were made with p- and
`n-channel
`transistors of the same dimensions. All results
`show a good correlation with the theoretical curves.
`
`V. CONCLUSIONS
`
`Charge injection has been approached using numerical
`modeling
`to support
`a simplified model, which allows
`
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`

`

`WEGMANN et al.: CHARGE INJECTION
`IN ANALOG MOS SWITCHES
`
`1097
`
`George Wegmann (S'82) was born in Bergan10,
`
`
`
`Italy, on May 20, 1960. He received the M.S.
`
`
`
`degree in electrical engineering from the Swiss
`
`
`
`Federal Institute of Technology, Lausanne
`
`(EPFL), in 1985.
`Since 1985 he has been a Research Assistant at
`
`
`
`EPFL, where he is currently working towards the
`
`
`
`Ph.D. degree on the subject of micropower ana­
`log CMOS circuits.
`
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`Eric A. Vittoz
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`Lausanne, Switzerland, on May 9, 1938. He
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`nology in Lausanne, Switzerland (EPFL) in 1961
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`
`tant, he joined the Centre Electronique Horlog,er
`
`
`vol. SC-22, no. 2, pp. 277-281, Apr. 1987.
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`S.A.. (CEH), Neuchatel,
`
`Switzerland, in 1962,
`[8]W. B. Wilson, H. Z. Massoud, E. J. Swanson, R. T. George, and
`
`
`
`
`
`where he became involved in micropower
`
`
`
`
`R. B. Fair, "Measurement and modeling of charge feedthrough in
`
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`integrated circuit developments for watchc:s,
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`n-channel MOS analog switches,"
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`SC-20, no. 6, pp. 1206-1213, Dec. 1985.
`
`
`
`while preparing a thesis in the same field. In 1971 he became Vice-Dire:c­
`
`
`
`
`[9]C. Turchetti, P. Mancini, and G. Masetti,. "A CAD-oriented non­
`
`
`
`
`tor of CEH, supervising advanced developments in electronic watches
`
`
`
`
`quasi-static approach for the transient analysis of MOS IC's,"
`
`
`
`and other micropower systems. Since 1984 he has been Director of the
`
`
`vol. SC-21, no. 5, pp. 827-836, Oct.
`
`IEEE J. So/id-State Circuits,
`
`
`Centre Suisse d'Electronique et de Microtechnique S.A., which was
`1986.
`
`
`
`
`created by merging CEH laboratories with other institutes, where he is in
`
`
`
`
`[10]J.B. Kuo, R. W. Dutton, and B. A. Wooley, "Tum-off transients in
`
`
`
`charge of the Division of Circuits and System Design. His field of
`
`
`circular geometry MOS pass transistors,"
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`
`
`
`
`
`
`
`personal research interest is the design of low-power analog circuits in
`
`
`vol. SC-21, no. 5, pp. 837-844, Oct. 1986.
`Circuits,
`
`
`
`CMOS technologies. Since 1975 he has also been lecturing and supervi­
`
`
`
`
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`
`
`vol. ED-16, pp. 297-302, Mar. 1969.
`
`
`
`
`sing student work in integrated circuit design at EPFL, where he becarne
`
`
`IEEE Trans. Electron Devices,
`
`
`
`
`
`[12]M. Declercq and P. G. Jespers, "Analysis of interface properties in
`
`
`Titular Professor in 1982.
`
`
`
`MOS transistors by means of charge pumping measurement,"
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`
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`
`Telecom. SITEL, Belgium,
`
`
`[13]F. B. Heinan and G. Warfield, "The effects of oxide traps on the
`MOS-capacitance,"
`
`vol. ED-12, pp.
`was born in Oran, Algeria, on foly
`
`
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`Fouad Rahali
`
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`
`23, 1955. He received the M.S. and Ph.D. degrees
`
`
`New York: Wiley,[14]S. M. Sze, Physics of Semiconductor Devices.
`
`
`
`in electrical engineering from the Swiss Federal
`1981.
`
`
`
`
`Institute of Technology, Lausanne (EPFL), in
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`
`
`
`
`1978 and 1984, respectively.
`
`
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`
`la Methode des Elements Finis," Ph.D. dissertation, No. 518, Swiss
`
`From 1978 to 1984 he was a Research Assis­
`
`
`
`
`Federal Inst. Technol., Lausanne, 1984.
`
`
`tant at the Electronics Laboratory of the EPFL,
`[16]L. Bienstman and H. J. de Man, "An eight-channel 8-bit micro­
`
`
`
`
`
`processor compatible NMOS converter with programmable scaling,"
`
`
`where he become involved in simulation of
`
`
`vol. SC-15, pp. 1051-1059, Dec. 1980.
`
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`
`semiconductor devices. He presented his Ph.D.
`
`IEEE J. Solid-State Circuits,
`
`
`
`
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`
`
`
`dissertation on the numerical simulation of MOS
`
`
`
`
`
`switches," Ph.D. dissertation, Louvain la Neuve, Belgium, 1986.
`
`transistors. From.1984 to 1986 he was lecturing
`
`
`
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`
`
`
`on the physics of semiconductors and electronics at Oran Universilty,
`
`
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`
`IEEE J. Solid-State Circuits,
`
`
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`
`Algeria, where he became the Research Supervisor in the Department of
`
`
`
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`
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`
`
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`
`EPFL as Research Associate.
`
`
`31-34.Papers (Edinburgh, Scotland), Sept. 1984, pp.
`
`
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