`Secure Dual Interface PKI Smart Card Controller
`Rev. 1.0 — 2004 March 26
`Short Form Specification
`
`1. General description
`
`1.1 Family description
`
`Philips Semiconductors SmartMX (Memory eXtension) multiple interface option platform
`features a significantly enhanced smart card IC architecture. New powerful opcodes are
`available beyond the compatible classic 80C51 instruction set. The SmartMX family
`manufactured in most advanced CMOS 0.18 mm 5 metal layer technology is positioned to
`service high volume, mono- and multi-application markets such as eGovernment (e.g.
`Smart Passport), banking/finance, mobile communications, public transportation, pay TV,
`conditional access and network access.
`
`SmartMX enables the easy implementation of state-of-the-art operating systems and
`open platform solutions including Java Card Global Platform and MULTOS by offering
`optimized features like linear addressing and an enhanced instruction set together with
`the highest levels of security. Within its targeted segments, the new platform is the most
`advanced solution available, combining exceptionally powerful co-processors for public
`and secret key encryption supporting RSA, ECC, DES and AES, with the high security,
`ultra low power, performance optimized design concept of Philips Semiconductors’
`handshaking technology. For further details on general SmartMXplatform features please
`refer to the “SmartMX platform features” short form specification.
`
`1.2 Description P5CD009 device
`
`u 10 Kbytes EEPROM
`u 96 Kbytes User ROM
`u 4608 bytes RAM
`u PKI (Public Key Infrastructure) co-processor (RSA, ECC)
`u Dual / Triple key DES-3 co-processor
`u ISO/IEC 7816 contact interface
`u ISO/IEC 14443A contactless interface
`
`The P5CD009 is a Secure Dual Interface PKI Smart Card Controller of the SmartMX
`platform featuring 96 Kbytes of ROM, 4608 bytes of RAM and 10 Kbytes of EEPROM,
`which can be used as data memory and as program memory. The non-volatile memory
`consists of high reliability memory cells to guarantee data integrity, which is especially
`important when the EEPROM is used as program memory.
`
`Operated both in contact mode (ISO/IEC 7816) and in contactless mode (ISO/IEC 14443)
`the user defines the final function of the chip with his chip operating system (COS). This
`allows the same level of security, functionality and flexibility for the contact interface as
`well as for the contactless interface.
`
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`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`The field proven RF interface technology (according ISO/IEC 14443-2) is well established
`in all products of the MIFARE® interface platform and provides reliable communication
`and secure processing, even in electro-magnetically harsh environments like in buses or
`train stations. Compatibility with existing MIFARE® reader infrastructure and the optional
`free of charge emulation modes of MIFARE® 1K and MIFARE® 4K enable fast system
`integration and backward compatibility of standard MIFARE® and ProX family based
`cards.
`
`Bi-directional communication with the contact interface of the device can be performed
`through three serial IOs. These IOs are under full control of the application software in
`order to allow conditional controlled access to the different internal memories.
`
`The on-chip hardware is software controlled via Special Function Registers (SFRs). Their
`function and usage is described in the respective sections of this specification as the
`SFRs are correlated to the activities of the CPU, Interrupt, IO, EEPROM, Timers, etc.
`
`The P5CD009 provides two power saving modes with reduced activity: the IDLE and the
`SLEEP or CLOCKSTOP Mode. These two modes are activated by software.
`
`The device operates either with a single 1.8V, 3 V or 5 V (voltage classes C, B, A) power
`supply at a maximum external clock frequency of 10 MHz supplied by the contact pads
`(internally up to 30 MHz) or with a power supply generated from the RF-field emitted by an
`RF-reader.
`
`1.2.1 Different Configurations of the P5CD009
`Depending on the application requirements the P5CD009 can be configured according to
`options described in the data sheet chapter “ORDER ENTRY FORM”.
`
`There are three different configurations (A, B1 and B4) possible as shown in Table [1]. The
`MIFARE® option configuration has impact on the access conditions for the EEPROM and
`influences the User OS development.
`
`Note that the contactless interface can be used in any of the following configurations to
`communicate via any protocol (T=CL as specified in ISO/IEC 14443-4 or a self defined
`protocol), also concurrently to the MIFARE® protocol available in configuration B1 and B4.
`
`1.2.1.1 Configuration A
`In configuration A all memory resources are available and under full control of the dual
`interface User OS. No MIFARE® functionality is available.
`
`1.2.1.2 Configuration B1
`In configuration B1 the contactless MIFARE® Classic OS provided by Philips is
`implemented on the P5CD009. 1 Kbyte of the EEPROM can be accessed by the
`MIFARE® Classic OS offering the same command set and functionality as a MIFARE® 1K
`hardwired logic chip. The access conditions for the user OS to the MIFARE® memory area
`can be configured via the so called ACM (Access condition matrix). The MIFARE® Classic
`OS offers a backward compatibility to support existing infrastructure based on the
`MIFARE® Classic functionality.
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
`
`© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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`Philips Semiconductors
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`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`1.2.1.3 Configuration B4
`In configuration B4 the MIFARE® Classic OS provided by Philips Semiconductors offers
`the same functionality and command set as the MIFARE® 4K hardwired chip. This
`emulation offers the possibility to access 4 Kbytes of EEPROM memory using the
`MIFARE® command set. Access rights for the user OS and the MIFARE® 4K emulation on
`accessing the EEPROM memory can be configured via the so called ACM (Access
`Condition Matrix).
`
`For secure separation of the user OS and the MIFARE® OS a dedicated built in hardware
`protection controls the access to the EEPROM, RAM and ROM.
`
`For detailed explanation of MIFARE® 1K and MIFARE® 4K functionality please refer also
`to the following documents:
`
`• MIFARE® MF CM500 Product Specification
`• MIFARE® Standard IC MF1 ICS50 Functional Specification
`• MIFARE® Standard 4 Kbyte Card IC MF1 ICS70
`
`Configurations of the P5CD009
`Table 1:
`Configuration
`EEPROM
`A
`10 Kbytes for access with user OS
`B1
`9 Kbytes for access with user OS via EEPROM SFR
`1 Kbyte for access with MIFARE® Classic OS and user OS [1]
`6 Kbytes for access with user OS via EEPROM SFR
`4 Kbytes for access with MMIFARE® Classic OS and user OS [1]
`
`B4
`
`[1]
`
`In configuration B1 and B4 the MIFARE® OS allocates 128 bytes of the RAM.
`
`CONFIGURATION A
`
`CONFIGURATION B
`
`CONFIGURATION B4
`
`RAM
`4608 bytes
`
`RAM
`4480 bytes
`
`RAM
`4480 bytes
`
`EEPROM
`10 Kbytes
`
`128 bytes MIFARE® OS
`
`128 bytes MIFARE® OS
`
`EEPROM
` 9 Kbytes
`
`1 Kbytes
`MIFARE® OS
`
`EEPROM
` 6 Kbytes
`
`4 Kbytes
`MIFARE® OS
`
`ROM
`96 Kbytes
`
`ROM
`96 Kbytes
`
`ROM
`96 Kbytes
`
`Fig 1. Configurations of the P5CD009.
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
`
`© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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`
`2. Features
`
`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`2.1 Product Specific Features
`n 10 Kbytes EEPROM (including 192 bytes reserved manufacturer/security area)
`n 96 Kbytes User ROM
`n 4608 bytes RAM
`u 256 bytes + 3 Kbytes CXRAM
`u 1280 bytes FXRAM usable for FameXE
`n Memory Management and Protection Unit (MMU)
`u for more details see 2.2. Security Features
`n Contactless Interface Unit (CIU) fully compatible with ISO/IEC14443A
`u fully supports the T=CL protocol acc. ISO/IEC14443-4
`u Data Transfer rates supported (106/212/424 kbit/s)
`n MIFARE® RF contactless interface acc. ISO/IEC14443-2
`u 13.56 MHz operating frequency
`u Reliable communication due to 100% ASK
`u High speed (106/212/424 kbit/s, efficient frame support)
`u True anticollision
`u High speed CRC co-processor according to CCITT
`n MIFARE® reader infrastructure compatibility
`n High speed DES-3 co-processor (64 bit parallel processing DES engine)
`n PKI Co-processor FameXE
`u The major Public Key Cryptosystems like RSA, El’Gamal, DSS, Diffie-Hellmann,
`Guillou-Quisquater, Fiat-Shamir and Elliptic Curve are supported
`u 4096 bits maximum key length for RSA with randomly chosen modulus
`u 32-bit interface
`u Boolean operations for acceleration of standard, symmetric cipher algorithms
`u Performance example:
`RSA Modular Exponentation (Straight forward) < 35 ms
`(2048 bit key length and 17 bit exponent)
`n Optional free of charge MIFARE®1K and MIFARE® 4K functionality
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
`
`© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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`Philips Semiconductors
`
`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`2.2 Security Features
`n Enhanced Security Sensors
`u Low / high clock frequency sensor
`u Low / high temperature sensor
`u Single Fault Injection (SFI) attack detection
`u Light sensors
`n Electronic fuses for safeguarded mode control
`n Unique ID for each die
`n Clock Input Filter for protection against spikes
`n Power-up / Power-down reset
`n Optional programmable “Card Disable” feature
`n Memory Security (encryption and physical measures) for RAM, EEPROM and ROM
`n Memory Management and Protection Unit (MMU)
`u Secure multi application operating systems via two different operation modes
`- System Mode and Application Mode
`u OS controlled access restriction mechanism to pheripherals in Application Mode
`u Memory mapping up to 8 Mbytes Code memory
`u Memory mapping up to 8 Mbytes (-64K) Data memory
`n Memory protection (encryption and physical measures) for RAM, EEPROM and
`ROM
`n Optional disabling of ROM read instructions by code executed in EEPROM
`n Optional disabling of any code execution out of RAM
`n EEPROM programming:
`u No external clock
`u Hardware sequencer controlled
`u On-chip high voltage generation
`u Enhanced error correction mechanism
`n 64 or 128 EEPROM bytes for customer-defined Security FabKey. Featuring batch-,
`wafer- or die-individual security data, incl. encrypted diversification features on request
`n 14 bytes User Write Protected Security area in EEPROM (byte access, inhibit
`functionality per byte)
`n 32 bytes Write Once Security area in EEPROM (bit access)
`n 32 bytes User Read Only area in EEPROM (byte access)
`n Customer specific EEPROM initialization optional
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
`
`© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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`Philips Semiconductors
`
`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`2.3 Family Standard Features
`n Dedicated Secure_MX51 Smart Card CPU (Memory eXtended / enhanced 80C51)
`u 0.18 m 5 metal layer CMOS technology
`u operating in contact and contactless mode (dependent on family type option)
`u featuring a 24 bit universal memory space, 24 bit program counter
`u combined universal program/data linear address range up to 16 Mbyte
`u additional instructions to improve
`- pointer operations
`- performance
`- code density of both C and Java source code
`n Low power / low voltage design using Philips handshaking technology
`n Development and portation support of existing P8WE / P8RF family masks
`n Multiple source vectorized interrupt system with four priority levels
`n Watch exception provides for software debugging facility
`n Multiple source RESET system
`n Two 16-bit timers
`n High reliable EEPROM for both data storage and program execution
`u Bytewise EEPROM programming and read access
`u EEPROM endurance: minimum 100.000, typical 250.000 programming cycles
`u EEPROM data retention time: 10 years minimum
`n Versatile EEPROM programming of 1 to 64 byte at a time
`n Typical EEPROM page erasing time: 2.5 ms
`n Typical EEPROM page programming time: 1.5 ms
`n Power-saving IDLE Mode
`u Wake-up from IDLE Mode by RESET or any activated interrupt
`n Power-saving SLEEP (power down) Mode or CLOCKSTOP Mode
`u Wake-up from SLEEP or CLOCKSTOP Mode by RESET or External Interrupt
`n Contact configuration and serial interface according to ISO/IEC 7816: GND, VCC,
`CLK, RST, IO1
`n ISO/IEC 7816 UART supporting standard protocols T=0 and T=1 as well as high
`speed personalization at 1Mbit/s
`n External or internally generated configurable CPU clock
`n 1 MHz to 10 MHz operating external clock frequency range
`n Internal CPU clock up to 30 MHz with synchronous operation
`u Internal clocking independent of externally applied frequency
`n High speed Triple-DES co-processor (two or three keys loadable)
`n DES3 performance < 50 ms
`n High speed 16 bit CRC Engine according to CCITT polynom definition
`n Low power Random Number Generator (RNG) in hardware, FIPS140-2 compliant
`n 1.62V to 5.5V extended operating voltage range for class C, B and A
`n -25 to +85(cid:176)C operating ambient temperature range
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
`
`© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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`Philips Semiconductors
`
`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`2.4 Design-in Support
`n Approved Development Tool Chain
`u Keil PK51 development tool package incl. Vision2/dScopeC51 simulator, additional
`specific hardware drivers incl. simulation of contactless interface and ISO/IEC 7816
`card interface board. A “SmartMX DBox” allows software debugging and
`integration tests. (www.keil.com)
`u Ashling Ultra-Emulator platform, stand alone ROM prototyping boards and
`ISO/IEC 7816 and ISO/IEC14443 card interface board. Code coverage and
`performance measurement software tools for real time software testing.
`(www.ashling.com)
`u Dual Interface dummy modules OM6711 (PDM 1.1 - SOT658) with special antenna
`bonding on C4 and C8 for testing the implanting process and antenna connection.
`n Software Libraries
`u Libraries supporting contactless communication according to ISO/IEC 14443, Part
`3 and 4
`u EEPROM Read / Write routines
`u Tutorial library with source code example routines
`
`3. Ordering information
`
`Ordering information
`Table 2:
`Type number
`Package
`Name
`P5CD009EW1/Tvsrrffo FFC
`P5CD009EV0/Tvsrrffo Module
`P5CD009EV1/Tvsrrffo Module
`
`P5CD009EV3/Tvsrrffo Module
`
`Description
`sawn wafer 150 m on film frame carrier
`Dual Interface Modules on super 35 mm format (8-contact)
`Dual Interface Modules on super 35 mm format (8-contact) with
`Antenna connected to C4/C8
`pure contactless module MOB2 on super 35 mm format
`
`Version
`-
`SOT658 BA3
`SOT658 BA3
`
`SOT500 AA3
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
`
`© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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`
`4. Block diagram
`
`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`LA
`
`LB
`
`IO1
`
`RF
`INTERFACE
`
`CIU
`ISO 14443
`
`PROGRAMM-
`ABLE
`IO
`
`UART
`ISO 7816
`
`ROM
`
`96 Kbytes
`PROGRAM
`MEMORY
`
`EEPROM
`
`10 Kbytes
`DATA &
`PROGRAM
`MEMORY
`
`RAM
`
`4608 bytes
`DATA
`MEMORY
`
`Memory Management Unit (MMU)
`
`FameXE
`
`enhanced PUBLIC
`KEY CO-
`PROCESSOR e.g.
`RSA, ECC
`
`CLK
`
`CLOCK
`FILTER
`
`CLOCK
`GENERATION
`
`SECURE_MX51 CPU
`
`TIMERS
`
`16
`BIT
`T0
`
`16
`BIT
`T1
`
`CRC16
`
`Fast
`RNG
`
`TRIPLE-DES
`CO-PROCESSOR
`
`RST
`
`SECURTIY SENSORS
`RESET GENERATION
`
`VOLTAGE REGULATOR
`
`VDD
`
`VSS
`
`VDD
`
`C1
`
`C5
`
`VSS
`
`CONTACTS
`
`Symbol
`
`Symbol
`
`Description
`
`ISO 7816
`
`Dual Interface
`(“Standard”)
`
`P5CD009
`
`C1
`
`C2
`
`VCC
`
`RST
`
`VDD
`
`RST
`
`Power supply voltage input
`
`Reset input, active LOW
`
`RST
`
`CLK
`
`N.C.
`
`C2
`
`C3
`
`C4
`
`*
`LA
`
`*
`
`LB
`
`C6
`
`C7
`
`C8
`
`N.C.
`
`IO1
`
`N.C.
`
`* Antenna contacts are placed on module backside
`
`C3
`
`C4
`
`C5
`
`C6
`
`C7
`
`C8
`
`-
`
`-
`
`CLK
`
`-
`
`GND
`
`VPP
`
`IO
`
`-
`
`-
`
`-
`
`CLK
`
`N.C.
`
`VSS
`
`N.C.
`
`IO1
`
`N.C.
`
`LA
`
`LB
`
`Clock input
`
`not connected
`
`Ground (reference voltage) input
`
`not connected
`
`Input/Output #1 for serial data
`
`not connected
`
`antenna coil connection
`
`antenna coil connection
`
`Fig 2. Block diagram and pinning information P5CD009.
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
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`
`5. Limiting values
`
`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`Absolute maximum ratings [1]
`Table 3:
`In accordance with the Absolute Maximum Rating System (IEC 60134).
`Symbol
`Parameter
`Conditions
`Supply voltage
`VDD
`Input voltage on any signal pad
`VI
`II; IO
`DC input or output current on IO1, IO2 or IO3
`pad
`Latch up current
`Electrostatic discharge voltage [2]
`on pads VDD, VSS, CLK, RST, IO1, IO2, IO3
`on all other pads
`Total power dissipation per package [3]
`Storage temperature range
`
`Ilatchup
`VESD
`
`Ptot
`Tstg
`
`VI < 0 or VI > VDD
`
`Min
`-0.5
`-0.5
`-
`
`-
`
`Max
`+6.0
`VDD +0.5
`– 15.0
`
`100
`
`Unit
`V
`V
`mA
`
`mA
`
`– 4.0
`-
`– 2.0
`-
`1
`-
`Table note [4] Table note [4]
`
`kV
`kV
`W
`
`[1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
`device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
`absolute-maximum-rated conditions for extended periods may affect device reliability.
`[2] MIL Standard 883-D method 3015; Human body model; C = 100 pF, R = 1.5 kW
`; Tamb = -25 to +85 (cid:176) C.
`[3] Depending on appropriate thermal resistance of the package.
`
`[4] Depending on delivery type, refer to “Philips General Specification for 8” Wafers” and to “Philips Contact & Dual Interface Chip Card
`Module Specification”.
`
`Table 4:
`Symbol
`VDD (5.0)
`VDD (3.0)
`VDD (1.8)
`VI
`
`Tamb
`
`Recommended operating conditions
`Parameter
`Supply voltage
`
`DC input voltage on digital inputs and
`digital IO pads
`Operating ambient temperature
`
`Conditions
`5 V operation
`3 V operation
`1.8 V operation
`
`Min
`4.5
`2.7
`1.62
`0
`
`-25
`
`Typ.
`5.0
`3.0
`1.8
`
`Max
`5.5
`3.3
`1.98
`VDD
`
`+85
`
`Unit
`V
`V
`V
`V
`
`(cid:176)C
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
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`Philips Semiconductors
`
`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`6. Data sheet status
`
`Level Data sheet status [1]
`
`Product status [2] [3]
`
`Definition
`
`Objective data
`
`Development
`
`This data sheet contains data from the objective specification for product development. Philips
`Semiconductors reserves the right to change the specification in any manner without notice.
`
`This data sheet contains data from the preliminary specification. Supplementary data will be published
`at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
`order to improve the design and supply the best possible product.
`
`This data sheet contains data from the product specification. Philips Semiconductors reserves the
`right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
`changes will be communicated via a Customer Product/Process Change Notification (CPCN).
`
`I
`
`II
`
`Preliminary data
`
`Qualification
`
`III
`
`Product data
`
`Production
`
`[1]
`
`[2]
`
`Please consult the most recently issued data sheet before initiating or completing a design.
`
`The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
`URL http://www.semiconductors.philips.com.
`
`[3]
`
`For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
`
`7. Definitions
`
`8. Disclaimers
`
`Short-form specification — The data in a short-form specification is
`extracted from a full data sheet with the same type number and title. For
`detailed information see the relevant data sheet or data handbook.
`
`Limiting values definition — Limiting values given are in accordance with
`the Absolute Maximum Rating System (IEC 60134). Stress above one or
`more of the limiting values may cause permanent damage to the device.
`These are stress ratings only and operation of the device at these or at any
`other conditions above those given in the Characteristics sections of the
`specification is not implied. Exposure to limiting values for extended periods
`may affect device reliability.
`
`Application information — Applications that are described herein for any
`of these products are for illustrative purposes only. Philips Semiconductors
`make no representation or warranty that such applications will be suitable for
`the specified use without further testing or modification.
`
`Life support — These products are not designed for use in life support
`appliances, devices, or systems where malfunction of these products can
`reasonably be expected to result in personal injury. Philips Semiconductors
`customers using or selling these products for use in such applications do so
`at their own risk and agree to fully indemnify Philips Semiconductors for any
`damages resulting from such application.
`
`Right to make changes — Philips Semiconductors reserves the right to
`make changes in the products - including circuits, standard cells, and/or
`software - described or contained herein in order to improve design and/or
`performance. When the product is in full production (status ‘Production’),
`relevant changes will be communicated via a Customer Product/Process
`Change Notification (CPCN). Philips Semiconductors assumes no
`responsibility or liability for the use of any of these products, conveys no
`licence or title under any patent, copyright, or mask work right to these
`products, and makes no representations or warranties that these products are
`free from patent, copyright, or mask work right infringement, unless otherwise
`specified.
`
`9. Contact information
`
`For additional information, please visit http://www.semiconductors.philips.com
`For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.0 — 2004 March 26
`
`© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
`10 of 11
`
`Samsung Ex. 1010, Page 10 of 11
`Samsung Electronics America, Inc. v. RFCyber Corp.
`IPR2021-00980
`
`
`
`Philips Semiconductors
`
`10. Tables
`
`P5CD009
`Secure Dual Interface PKI Smart Card Controller
`
`Table 1: Configurations of the P5CD009 . . . . . . . . . . . . .3
`Table 2: Ordering information . . . . . . . . . . . . . . . . . . . . . .7
`
`Table 3: Absolute maximum ratings [1] . . . . . . . . . . . . . . 9
`Table 4: Recommended operating conditions . . . . . . . . . 9
`
`11. Figures
`
`Fig 1. Configurations of the P5CD009. . . . . . . . . . . . . . .3
`
`Fig 2. Block diagram and pinning information P5CD009. 8
`
`12. Contents
`
`1
`1.1
`1.2
`1.2.1
`1.2.1.1
`1.2.1.2
`1.2.1.3
`2
`2.1
`2.2
`2.3
`2.4
`3
`4
`5
`6
`7
`8
`9
`
`General description . . . . . . . . . . . . . . . . . . . . . . 1
`Family description. . . . . . . . . . . . . . . . . . . . . . . 1
`Description P5CD009 device . . . . . . . . . . . . . . 1
`Different Configurations of the P5CD009 . . . . . 2
`Configuration A . . . . . . . . . . . . . . . . . . . . . . . . . 2
`Configuration B1 . . . . . . . . . . . . . . . . . . . . . . . . 2
`Configuration B4 . . . . . . . . . . . . . . . . . . . . . . . . 3
`Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
`Product Specific Features. . . . . . . . . . . . . . . . . 4
`Security Features . . . . . . . . . . . . . . . . . . . . . . . 5
`Family Standard Features. . . . . . . . . . . . . . . . . 6
`Design-in Support. . . . . . . . . . . . . . . . . . . . . . . 7
`Ordering information . . . . . . . . . . . . . . . . . . . . . 7
`Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 8
`Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
`Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 10
`Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
`Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
`Contact information . . . . . . . . . . . . . . . . . . . . 10
`
`© Koninklijke Philips Electronics N.V. 2003
`All rights are reserved. Reproduction in whole or in part is prohibited without the prior
`written consent of the copyright owner. The information presented in this document does
`not form part of any quotation or contract, is believed to be accurate and reliable and may
`be changed without notice. No liability will be accepted by the publisher for any
`consequence of its use. Publication thereof does not convey nor imply any license under
`patent- or other industrial or intellectual property rights.
`
`Date of release: 2004 March 26
`Document order number: 9397 750 XXXXX
`
`Published in The Netherlands
`
`Samsung Ex. 1010, Page 11 of 11
`Samsung Electronics America, Inc. v. RFCyber Corp.
`IPR2021-00980
`
`