`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`Rev. 1.1 - 2004 August 27
`
`Short Form Specification L(cid:127)
`
`1. General description
`
`1.1 Family description
`
`Philips Semiconductors SmartMX (Memory extension) multiple interface option platform
`features a significantly enhanced smart card IC architecture. New powerful opcodes are
`available beyond the compatible classic 80C51 instruction set. The SmartMXfamily
`manufactured in most advanced CMOS 0.18 µm 5 metal layer technology is positioned to
`service high volume, mono- and multi-application markets such as eGovernment (e.g.
`Smart Passport), banking/finance, mobile communications, public transportation, pay TV,
`conditional access and network access.
`
`SmartMX enables the easy implementation of state-of-the-art operating systems and
`open platform solutions including Java Card Global Platform and MULTOS by offering
`optimized features like linear addressing and an enhanced instruction set together with
`the highest levels of security. Within its targeted segments, the new platform is the most
`advanced solution available, combining exceptionally powerful co-processors for public
`and secret key encryption supporting RSA, ECC, DES and AES, with the high security,
`ultra low power, performance optimized design concept of Philips Semiconductors'
`handshaking technology. For further details on general SmartMXplatform features please
`refer to the "SmartMX platform features" short form specification.
`
`1.2 Description P5CD036 device
`
`• 36 Kbytes EEPROM
`• 160 Kbytes User ROM
`• 4608 bytes RAM
`• PKI (Public Key Infrastructure) co-processor (RSA, ECC)
`• Dual / Triple key DES-3 co-processor
`
`•
`ISO/IEC 7816 contact interface
`•
`ISO/IEC 14443A contactless interface
`• EEPROM data retention time: 20 years minimum
`
`The P5CD036 is a Secure Dual Interface PKI Smart Card Controller of the SmartMX
`platform featuring 160 Kbytes of ROM, 4608 bytes of RAM and 36 Kbytes of EEPROM,
`which can be used as data memory and as program memory. The non-volatile memory
`consists of high reliability memory cells to guarantee data integrity, which is especially
`important when the EEPROM is used as program memory.
`
`PHILIPS
`
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`
`
`Philips Semiconductors
`
`(cid:127) _]
`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`
`Operated both in contact mode (ISO/IEC 7816) and in contactless mode (ISO/IEC 14443)
`the user defines the final function of the chip with his chip operating system (COS). This
`allows the same level of security, functionality and flexibility for the contact interface as
`well as for the contactless interface.
`
`The field proven RF interface technology (according ISO/IEC 14443-2) is well established
`in all products of the Ml FARE® interface platform and provides reliable communication and
`secure processing, even in electro-magnetically harsh environments like in buses or train
`stations. Compatibility with existing Ml FARE® reader infrastructure and the optional free of
`charge emulation modes of Ml FARE® 1 Kand Ml FARE® 4K enable fast system integration
`and backward compatibility of standard MIFARE® and ProX family based cards.
`
`Bi-directional communication with the contact interface of the device can be performed
`through three serial IOs. These IOs are under full control of the application software in
`order to allow conditional controlled access to the different internal memories.
`
`The on-chip hardware is software controlled via Special Function Registers (SFRs). Their
`function and usage is described in the respective sections of this specification as the
`SFRs are correlated to the activities of the CPU, Interrupt, 10, EEPROM, Timers, etc.
`
`The P5CD036 provides two power saving modes with reduced activity: the IDLE and the
`SLEEP or CLOCKSTOP Mode. These two modes are activated by software.
`
`The device operates either with a single 1.8V, 3 V or 5 V (voltage classes C, B, A) power
`supply at a maximum external clock frequency of 10 MHz supplied by the contact pads
`(internally up to 30 MHz) or with a power supply generated from the RF-field emitted by an
`RF-reader.
`
`1.2.1 Different Configurations of the P5CD036
`Depending on the application requirements the P5CD036 can be configured according to
`options described in the data sheet chapter "ORDER ENTRY FORM".
`
`There are three different configurations (A, 81 and 84) possible as shown in Table ill. The
`Ml FARE® option configuration has impact on the access conditions for the EE PROM and
`influences the User OS development.
`
`Note that the contactless interface can be used in any of the following configurations to
`communicate via any protocol (T=CL as specified in ISO/IEC 14443-4 or a self defined
`protocol), also concurrently to the Ml FARE® protocol available in configuration 81 and 84.
`
`1.2.1.1 Configuration A
`In configuration A all memory resources are available and under full control of the dual
`interface User OS. No Ml FARE® functionality is available.
`
`1.2.1.2 Configuration B1
`In configuration B1 the contactless MIFARE® Classic OS provided by Philips is
`implemented on the P5CD036. 1 Kbyte of the EEPROM can be accessed by the
`Ml FARE® Classic OS offering the same command set and functionality as a Ml FARE® 1 K
`hardwired logic chip. The access conditions for the user OS to the Ml FARE® memory area
`can be configured via the so called ACM (Access condition matrix). The Ml FARE® Classic
`OS offers a backward compatibility to support existing infrastructure based on the
`Ml FARE® Classic functionality.
`
`9397 750 XXXXX
`
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`© Koninklijke Philips Electronics N. V. 2003. All rights reserved.
`2 of 11
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`GOOG-1022
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`
`
`Philips Semiconductors
`
`(cid:127) _]
`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`
`1.2.1.3 Configuration B4
`In configuration B4 the Ml FARE® Classic OS provided by Philips Semiconductors offers
`the same functionality and command set as the Ml FARE® 4K hardwired chip. This
`emulation offers the possibility to access 4 Kbytes of EEPROM memory using the
`Ml FARE® command set. Access rights for the user OS and the Ml FARE® 4K emulation on
`accessing the EEPROM memory can be configured via the so called ACM (Access
`Condition Matrix).
`
`For secure separation of the user OS and the Ml FARE® OS a dedicated built in hardware
`protection controls the access to the EEPROM, RAM and ROM.
`
`For detailed explanation of Ml FARE® 1 Kand Ml FARE® 4K functionality please refer also
`to the following documents:
`
`• MIFARE® MF CM500 Product Specification
`
`• MIFARE® Standard IC MF1 ICS50 Functional Specification
`
`• MIFARE® Standard 4 Kbyte Card IC MF1 ICS70
`
`Table 1: Configurations of the P5CD036
`Configuration
`EEPROM
`A
`36 Kbytes for access with user OS
`81
`35 Kbytes for access with user OS via EEPROM SFR
`1 Kbyte for access with Ml FARE® Classic OS and user OS I!!
`32 Kbytes for access with user OS via EEPROM SFR
`4 Kbytes for access with MMIFARE® Classic OS and user OS 1!!
`
`84
`
`[1]
`
`In configuration B1 and B4 the Ml FARE® OS allocates 128 bytes of the RAM.
`
`CONFIGURATION A
`
`CONFIGURATION B
`
`CONFIGURATION B4
`
`RAM
`4608 bytes
`
`RAM
`
`4480 bytes
`
`RAM
`
`4480 bytes
`
`EEPROM
`
`36 Kbytes
`
`128 bytes
`
`MIFARE®
`
`OS
`
`128 bytes
`
`MIFARE®
`
`OS
`
`EEPROM
`
`35 Kbytes
`
`1 Kbytes
`MIFARE®
`OS
`
`EEPROM
`
`32 Kbytes
`
`4 Kbytes
`MIFARE®
`OS
`
`ROM
`
`160 Kbytes
`
`ROM
`
`160 Kbytes
`
`ROM
`
`160 Kbytes
`
`Fig 1. Configurations of the P5CD036.
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`© Koninklijke Philips Electronics N. V. 2003. All rights reserved.
`3 of 11
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`
`Philips Semiconductors
`
`(cid:127) _]
`
`2. Features
`
`Secure Dual Interface PKI Smart Card Controller
`
`P5CD036
`
`2.1 Product Specific Features
`(cid:127)
`36 Kbytes EEPROM (including 192 bytes reserved manufacturer/security area)
`(cid:127)
`160 Kbytes User ROM
`(cid:127)
`4608 bytes RAM
`• 256 bytes + 3 Kbytes CXRAM
`• 1280 bytes FXRAM usable for FameXE
`(cid:127) Memory Management and Protection Unit (MMU)
`• for more details see 2.2. Security Features
`(cid:127) Contactless Interface Unit (CIU) fully compatible with ISO/IEC14443A
`• fully supports the T=CL protocol acc. ISO/IEC14443-4
`• Data Transfer rates supported (106/212/424 kbit/s)
`(cid:127) MIFARE® RF contactless interface acc. ISO/IEC14443-2
`• 13.56 MHz operating frequency
`• Reliable communication due to 100% ASK
`• High speed (106/212/424 kbit/s, efficient frame support)
`• True anticollision
`• High speed CRC co-processor according to CCITT
`(cid:127) MIFARE® reader infrastructure compatibility
`(cid:127) High speed DES-3 co-processor (64 bit parallel processing DES engine)
`(cid:127) PKI Co-processor FameXE
`• The major Public Key Cryptosystems like RSA, El'Gamal, DSS, Diffie-Hellmann,
`Guillou-Quisquater, Fiat-Shamir and Elliptic Curve are supported
`• 4096 bits maximum key length for RSA with randomly chosen modulus
`• 32-bit interface
`• Boolean operations for acceleration of standard, symmetric cipher algorithms
`• Performance example: RSA Modular Exponentation (Straight forward) < 35 ms
`(2048 bit key length and 17 bit exponent)
`(cid:127) Optional free of charge MIFARE® 1 K and MIFARE® 4K functionality
`(cid:127)
`2 additional 10 ports 102 and 103 for full-duplex serial data communication
`
`9397 750 xxxxx
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`4 of 11
`
`© Koninklijke Philips Electronics N. V. 2003. All rights reserved.
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`
`Philips Semiconductors
`
`(cid:127) _]
`
`Secure Dual Interface PKI Smart Card Controller
`
`P5CD036
`
`2.2 Security Features
`(cid:127) Enhanced Security Sensors
`• Low/ high clock frequency sensor
`• Low/ high temperature sensor
`• Single Fault Injection (SFI) attack detection
`• Light sensors
`(cid:127) Electronic fuses for safeguarded mode control
`(cid:127) Unique ID for each die
`(cid:127) Clock Input Filter for protection against spikes
`(cid:127) Power-up/ Power-down reset
`(cid:127) Optional programmable "Card Disable" feature
`(cid:127) Memory Security (encryption and physical measures) for RAM, EEPROM and ROM
`(cid:127) Memory Management and Protection Unit (MMU)
`• Secure multi application operating systems via two different operation modes
`- System Mode and Application Mode
`• OS controlled access restriction mechanism to pheripherals in Application Mode
`• Memory mapping up to 8 Mbytes Code memory
`• Memory mapping up to 8 Mbytes (-64K) Data memory
`(cid:127) Memory protection (encryption and physical measures) for RAM, EEPROM and
`ROM
`(cid:127) Optional disabling of ROM read instructions by code executed in EEPROM
`(cid:127) Optional disabling of any code execution out of RAM
`(cid:127) EEPROM programming:
`• No external clock
`• Hardware sequencer controlled
`• On-chip high voltage generation
`• Enhanced error correction mechanism
`(cid:127)
`64 or 128 EEPROM bytes for customer-defined Security FabKey. Featuring batch-,
`wafer- or die-individual security data, incl. encrypted diversification features on request
`(cid:127)
`14 bytes User Write Protected Security area in EEPROM (byte access, inhibit
`functionality per byte)
`(cid:127)
`32 bytes Write Once Security area in EEPROM (bit access)
`(cid:127)
`32 bytes User Read Only area in EEPROM (byte access)
`(cid:127) Customer specific EEPROM initialization optional
`
`9397 750 xxxxx
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`5 of 11
`
`© Koninklijke Philips Electronics N. V. 2003. All rights reserved.
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`
`Philips Semiconductors
`
`(cid:127) _]
`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`
`2.3 Family Standard Features
`(cid:127) Dedicated Secure_MX51 Smart Card CPU (Memory extended I enhanced 80C51)
`• 0.18 µ 5 metal layer CMOS technology
`• operating in contact and contactless mode (dependent on family type option)
`• featuring a 24 bit universal memory space, 24 bit program counter
`• combined universal program/data linear address range up to 16 Mbyte
`• additional instructions to improve
`- pointer operations
`- performance
`- code density of both C and Java source code
`(cid:127)
`Low power/ low voltage design using Philips handshaking technology
`(cid:127) Development and portation support of existing P8WE / P8RF family masks
`(cid:127) Multiple source vectorized interrupt system with four priority levels
`(cid:127) Watch exception provides for software debugging facility
`(cid:127) Multiple source RESET system
`(cid:127) Two 16-bit timers
`(cid:127) High reliable EEPROM for both data storage and program execution
`• Bytewise EEPROM programming and read access
`• EEPROM endurance: up to 500 k programming cycles per byte
`• EEPROM data retention time: 20 years minimum
`(cid:127) Versatile EEPROM programming of 1 to 64 byte at a time
`(cid:127) Typical EEPROM page erasing time: 2.5 ms
`(cid:127) Typical EEPROM page programming time: 1.5 ms
`(cid:127) Power-saving IDLE Mode
`• Wake-up from IDLE Mode by RESET or any activated interrupt
`(cid:127) Power-saving SLEEP (power down) Mode or CLOCKSTOP Mode
`• Wake-up from SLEEP or CLOCKSTOP Mode by RESET or External Interrupt
`(cid:127) Contact configuration and serial interface according to ISO/IEC 7816: GND, VCC,
`CLK, RST, 101
`(cid:127)
`ISO/IEC 7816 UART supporting standard protocols T =0 and T =1 as well as high
`speed personalization at 1 Mbit/s
`(cid:127) External or internally generated configurable CPU clock
`(cid:127)
`1 MHz to 10 MHz operating external clock frequency range
`(cid:127)
`Internal CPU clock up to 30 MHz with synchronous operation
`• Internal clocking independent of externally applied frequency
`(cid:127) High speed Triple-DES co-processor (two or three keys loadable)
`(cid:127) DES3 performance < 50 µs
`(cid:127) High speed 16 bit CRC Engine according to CCITT polynom definition
`(cid:127)
`Low power Random Number Generator (RNG) in hardware, FIPS140-2 compliant
`(cid:127)
`1.62V to 5.5V extended operating voltage range for class C, B and A
`(cid:127)
`-25 to +85°C operating ambient temperature range
`
`9397 750 xxxxx
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`6 of 11
`
`© Koninklijke Philips Electronics N. V. 2003. All rights reserved.
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`
`Philips Semiconductors
`
`(cid:127) _]
`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`
`2.4 Design-in Support
`(cid:127) Approved Development Tool Chain
`• Keil PK51 development tool package incl. µVision2/dScope C51 simulator,
`additional specific hardware drivers incl. simulation of contactless interface and
`IS0/IEC 7816 card interface board. A "SmartMXDBox" allows software debugging
`and integration tests. (www.keil.com)
`• Ashling Ultra-Emulator platform, stand alone ROM prototyping boards and
`IS0/IEC 7816 and IS0/IEC14443 card interface board. Code coverage and
`performance measurement software tools for real time software testing.
`(www.ashling.com)
`• Dual Interface dummy modules OM6711 (PDM 1.1 - SOT658) with special antenna
`bonding on C4 and CB for testing the implanting process and antenna connection.
`(cid:127) Software Libraries
`• Libraries supporting contactless communication according to IS0/IEC 14443, Part
`3and 4
`• EE PROM Read/ Write routines
`• Tutorial library with source code example routines
`
`3. Ordering information
`
`Table 2: Ordering information
`Type number
`Package
`t - - - - -~ - - - - - - - - - - - - - - - - - - - - - -~ - - - -
`N am e
`Description
`Version
`sawn wafer 150 µ on film frame carrier
`P5CD036EW1/Tvsrrffo FFC
`P5CD036EV0/Tvsrrffo Module
`Dual Interface Modules on super 35 mm format (8-contact)
`Dual Interface Modules on super 35 mm format (8-contact) with
`Antenna connected to C4/C8
`
`P5CD036EV1 /Tvsrrffo Module
`
`SOT658 BA3
`
`SOT658 BA3
`
`P5CD036EV3/Tvsrrffo Module
`
`pure contactless module MOB2 on super 35 mm format
`
`SOT500 AA3
`
`9397 750 xxxxx
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`7 of 11
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`
`Philips Semiconductors
`
`(cid:127) _]
`
`4. Block diagram
`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`
`LA
`
`LB
`
`101
`
`102
`
`103
`
`RF
`INTERFACE
`
`CIU
`ISO 14443
`
`PROGRAMM-
`ABLE
`101,2,3
`
`UART
`ISO7816
`
`ROM
`
`160 Kbytes
`PROGRAM
`MEMORY
`
`EEPROM
`
`36 Kbytes
`DATA&
`PROGRAM
`MEMORY
`
`RAM
`
`4608 bytes
`DATA
`MEMORY
`
`Memory Management Unit (MMU)
`
`Fame
`
`XE
`
`enhanced PUBLIC
`KEY CO-
`
`PROCESSOR e.g.
`
`RSA, ECG
`
`CLK
`
`CLOCK
`FILTER
`
`CLOCK
`GENERATION
`
`SECURE_MX51 CPU
`
`TRIPLE-DES
`CO-PROCESSOR
`
`SECURTIY SENSORS
`RESET GENERATION
`
`VOLTAGE REGULATOR
`
`VDD
`
`vss
`
`CRC16
`
`Fast
`RNG
`
`16
`BIT
`TO
`
`16
`BIT
`T1
`
`~,c:=
`
`RST
`
`C2
`
`I
`
`CLK
`
`-
`I
`I
`1LB•
`I
`I
`I
`
`I
`LA.I
`
`I
`I
`
`cs
`- [J
`1~-~3 __ ] I
`[__c~_JI
`N.C. ~ [3 N.C.
`
`Dual Interface
`("Standard")
`
`P5CD036
`
`Symbol
`
`Description
`
`VDD
`
`RST
`
`CLK
`
`N.C.
`
`VSS
`
`N.C.
`
`101
`
`N.C.
`
`LA
`
`LB
`
`Power supply voltage input
`
`Reset input, active LOW
`
`Clock input
`
`not connected
`
`Ground (reference voltage) input
`
`not connected
`
`lnpuVOutput #1 for serial data
`
`not connected
`
`antenna coil connection
`
`antenna coil connection
`
`I symbol
`vcc
`RST
`
`CLK
`
`GND
`
`VPP
`
`10
`
`- -
`
`ISO 7816
`
`CONTACTS
`
`C1
`
`C2
`
`C3
`
`C4
`cs
`C6
`
`C7
`ca
`
`Note: 102, 103 and assignments on request.
`
`vss
`
`N.C.
`
`101
`
`Antenna contacts are placed on module backside
`
`Fig 2. Block diagram and pinning information P5CD036.
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`© Koninklijke Philips Electronics N. V. 2003. All rights reserved.
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`Philips Semiconductors
`
`(cid:127) _]
`
`5. Limiting values
`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`
`Absolute maximum ratings r11
`Table 3:
`In accordance with the Absolute Maximum Rating System (/EC 60134).
`Symbol
`Parameter
`Conditions
`Supply voltage
`
`Voo
`
`Input voltage on any signal pad
`DC input or output current on 101, 102 or 103
`pad
`
`Latch up current
`Electrostatic discharge voltage 0
`on pads VDD, VSS, CLK, RST, 101, 102, 103
`on all other pads
`Total power dissipation per package [31
`
`Storage temperature range
`
`l1atchup
`
`P101
`
`Tstg
`
`V1 < 0 or V1 > Voo
`
`-0.5
`-0.5
`
`Max
`+6.0
`
`Voo +0.5
`±± 15.0
`
`100
`
`±4.0
`± 2.0
`
`Unit
`V
`
`V
`
`mA
`
`mA
`
`kV
`
`kV
`w
`
`Table note [4] Table note [4]
`
`[1) Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
`device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
`absolute-maximum-rated conditions for extended periods may affect device reliability.
`
`[2)
`
`MIL Standard 883-D method 3015; Human body model; C = 100 pF, R = 1.5 k ; T
`Q
`
` = -25 to +85 C.
`amb
`
`[3) Depending on appropriate thermal resistance of the package.
`
`[4) Depending on delivery type, refer to "Philips General Specification for 8" Wafers" and to "Philips Contact & Dual Interface Chip Card
`Module Specification".
`
`Table 4:
`Symbol
`Voo (5.0)
`Voo (3.0)
`Voo (1 .8)
`
`V1
`
`Tamb
`
`Recommended operating conditions
`Parameter
`Supply voltage
`
`DC input voltage on digital inputs and
`digital 10 pads
`Operating ambient temperature
`
`Conditions
`5 V operation
`3 V operation
`1.8 V operation
`
`4.5
`2.7
`1.62
`0
`
`-25
`
`Typ.
`5.0
`3.0
`1.8
`
`Max
`5.5
`3.3
`1.98
`
`Voo
`
`+85
`
`Unit
`V
`
`V
`
`V
`
`V
`
`oc
`
`9397 750 XXXXX
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`© Koninklijke Philips Electronics N. V. 2003. All rights reserved.
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`Philips Semiconductors
`
`(cid:127) _]
`
`6. Data sheet status
`
`Data sheet status !!.!
`Objective data
`
`Development
`
`II
`
`Preliminary data
`
`Qualification
`
`Ill
`
`Product data
`
`Production
`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`
`This data sheet contains data from the objective specification for product development. Philips
`Semiconductors reserves the right to change the specification in any manner without notice.
`
`This data sheet contains data from the preliminary specification. Supplementary data will be published
`at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
`order to improve the design and supply the best possible product.
`
`This data sheet contains data from the product specification. Philips Semiconductors reserves the
`right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
`changes will be communicated via a Customer ProducVProcess Change Notification (CPCN).
`
`[1]
`
`[2]
`
`Please consult the most recently issued data sheet before initiating or completing a design.
`
`The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
`URL http://www.semiconductors.philips.com.
`
`[3]
`
`For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
`
`7. Definitions
`
`8. Disclaimers
`
`Short-form specification - The data in a short-form specification is
`extracted from a full data sheet with the same type number and title. For
`detailed information see the relevant data sheet or data handbook.
`
`Limiting values definition -
`Limiting values given are in accordance with
`the Absolute Maximum Rating System (IEC 60134). Stress above one or
`more of the limiting values may cause permanent damage to the device.
`These are stress ratings only and operation of the device at these or at any
`other conditions above those given in the Characteristics sections of the
`specification is not implied. Exposure to limiting values for extended periods
`may affect device reliability.
`Application information - Applications that are described herein for any
`of these products are for illustrative purposes only. Philips Semiconductors
`make no representation or warranty that such applications will be suitable for
`the specified use without further testing or modification.
`
`Life support - These products are not designed for use in life support
`appliances, devices, or systems where malfunction of these products can
`reasonably be expected to result in personal injury. Philips Semiconductors
`customers using or selling these products for use in such applications do so
`at their own risk and agree to fully indemnify Philips Semiconductors for any
`damages resulting from such application.
`Right to make changes - Philips Semiconductors reserves the right to
`make changes in the products - including circuits, standard cells, and/or
`software - described or contained herein in order to improve design and/or
`performance. When the product is in full production (status 'Production'),
`relevant changes will be communicated via a Customer ProducVProcess
`Change Notification (CPCN). Philips Semiconductors assumes no
`responsibility or liability for the use of any of these products, conveys no
`licence or title under any patent, copyright, or mask work right to these
`products, and makes no representations or warranties that these products are
`free from patent, copyright, or mask work right infringement, unless otherwise
`specified.
`
`9. Contact information
`
`For additional information, please visit http://www.semiconductors.philips.com
`For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
`
`9397 750 XXXXX
`
`Short Form Specification
`
`Rev. 1.1 - 2004 August 27
`
`10 of 11
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`© Koninklijke Philips Electronics N. V. 2003. All rights reserved.
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`Philips Semiconductors
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`(cid:127) _]
`
`10. Tables
`
`P5CD036
`Secure Dual Interface PKI Smart Card Controller
`
`Table 1: Configurations of the P5CD036 . . ........... 3
`Table 2: Ordering information . . .... . .. .. ..... . .. . .. 7
`
`Table 3: Absolute maximum ratings .l1.l . . . . ........ . . 9
`Table 4: Recommended operating conditions ... . . . . .. 9
`
`11. Figures
`
`Fig 1. Configurations of the P5CD036 ..... . . . . ...... 3
`
`Fig 2. Block diagram and pinning information P5CD036. 8
`
`12. Contents
`
`1
`1.1
`1.2
`1.2.1
`1.2.1.1
`1.2.1 .2
`1.2.1.3
`2
`2.1
`2.2
`2.3
`2.4
`3
`4
`5
`6
`7
`8
`9
`
`General description . . . . . . . . . . . . . . . . . . . . . . 1
`Family description .. . .. . ....... . ....... . . 1
`Description P5CD036 device . . . . . . . . . . . . . . 1
`Different Configurations of the P5CD036 . . . . . 2
`Configuration A . . . . . . . . . . . . . . . . . . . . . . . . . 2
`Configuration 81 . . . . . . . . . . . . . . . . . . . . . . . . 2
`Configuration 84 . . . . . . . . . . . . . . . . . . . . . . . . 3
`Features ............................... 4
`Product Specific Features. . . . . . . . . . . . . . . . . 4
`Security Features ........ . . .. . ..... . . . . . 5
`Family Standard Features . . ............... 6
`Design-in Support. . . . . . . . . . . . . . . . . . . . . . . 7
`Ordering information. . . . . . . . . . . . . . . . . . . . . 7
`Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 8
`Limiting values .......................... 9
`Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 10
`Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
`Disclaimers ............................ 10
`Contact information .................... 10
`
`© Koninklijke Philips Electronics N.V. 2003
`All rights are reserved. Reproduction in whole or in part is prohibited without the prior
`written consent of the copyright owner. The information presented in this document does
`not form part of any quotation or contract, is believed to be accurate and reliable and may
`be changed without notice. No liability will be accepted by the publisher for any
`consequence of its use. Publication thereof does not convey nor imply any license under
`patent- or other industrial or intellectual property rights.
`
`Date of release: 2004 August 27
`Document order number: 9397 750 XXXXX
`
`Published in The Netherlands
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