`
`Washington, D.C.
`
`
`
` In the Matter of
`
`
`
`
`CERTAIN STATIC RANDOM ACCESS
`MEMORIES AND PRODUCTSCONTAINING
`THE SAME
`
`Inv. No. 337-TA-792
`
`ORDER 29: CONSTRUING THE TERMS OF THE ASSERTED CLAIMS OF
`THE PATENTSATISSUE
`
`(February 9, 2012)
`
`pee,
`
`.
`
`Petitioner STMICROELECTRONICS,INC.,
`Bx. 1011, IPR2021-00702
`Page | of 45
`
`—
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 1 of 45
`
`
`
`TABLE OF CONTENTS
`
`INTRODUCTION 0... cccessscsecssssctssesseeeeesesensssssecsaescesnes seseseuseeeessscsessscsessssssesseseessseee
`
`Il.
`
`IN GENERAL seeseee penegeserees TOPE ROHR SERESE SEDER EV EHTS ERO ERED ED EOHEER EERO EREDED ERD ERED EERE SO DED ESHER ERED ESE OSHEEHSERS2
`
`Tl.
`
`RELE VANT LA W FREAD EUR H OES EOREDAEE DURA EDEES SORE SERS HERHERHES Sheeanasewonenes PO ERH ERO O ESO EHRHR ESM SESECR OSS HOSE serene
`
`LE V EL OF ORDINARY SKILL IN THE ART PORTERS EDD EE ORES TERESA D HARE ORE RNED ssenenas Pennnnsenesen5
`
`V.
`
`Vi.
`
`THE BOS PATENT00.0...eescscesssessectessenesceesesessonseeeshesaceseesetesseneseeeaeesasassensenssenserseenensesi
`A.
`OVELVICW... ci eceeeeetceeees saseeesentsegeseeeencesseeessesaseeseosasees seseeseesceeseeeseeeaneseeses soseseees eeeee
`B.
`Agreed-Uponand Disputed Claim Terms seseaseseeesseesceseneseeesatecseseeeasenseasenessensens
`1.
`Construction of Agreed-Upon Claim Terms.............c:escssseseecreeesesesesnes
`a)
`“ACtIVE TEQIONS”........sccscsscsecescssscssseerssssenesesssessessceecesececesssssenssees
`b)
`“substantially oblong active regions”.........:..eeesssecesseseeneeeesees
`c)
`“substantially oblong polysilicon structures”.........sasesseeeeeeeeasens
`d)
`“substantially oblong local interconnects”............ccssssesereeeed
`Construction of Disputed Claim Term.................sesseeaeseseeseesseassesseeeneeseD
`a)
`“local interconnects”... sesessceescesseeceeseosseseneeesneneseetsceaeeeseeees9
`
`2.
`
`CnrANHN
`
`THE °134 PATENT............ saescesessscesesestesseusencesensscesesseneseasessessesesseassesesessessstsseseasereee lL
`A.
`OVELVICW.... ss eescecsscesteceeeeseeneeneesposteseeaeesacessseesscenssneerenceeseeesees seseeeneeeeeeees vessel I
`B.
`Agreed-UponandDisputed Claim Terms..........cceeeeseeessesseecseasenseeseseaseseeesseve LZ
`1,
`Construction of Agreed-Upon Claim Terms...........ccsccssccsseesteeeesnee dD
`a)
`. “external address Sigal”sssscssssssssssevssssessssesnssssnsenssensenseal2
`b)
`“non-interruptible”..........tseecesessseccesessecceesesesseeenesessseseensteree LD
`c)
`“DULSt”oo. cesseeeeeseeeseceeeeeeeseresees besesceesenseenee sesseessseassacssstacssssenees LO
`Construction of Disputed Claim Terms...........ccssccssessereessereseeseeseene lh 3
`a)
`“internal address signal”.............sscscsssessescseecseceeseeesstsetsessteeeee ho
`b)
`“logic circuit”............ desesenetsceesenes neseatsasesssneseceeees seseaseassatneseseeee LD
`re)
`“predetermined numberof [said] internal address signals.......17
`
`2.
`
`Vil.
`
`A.
`B.
`
`peanenanneneene PETE E UU REE U EOD EEO SHEER EEDEENER SEES EERE SESH TEER HDS OEEERSEEEE SHEE EH EEN EEEOESE OER ES 9
`OVELVICW .....ecccesssssssssseseseescenesieccseccsssescsscsasessesecsnseseeenessessessessssacssssscesssssaseneee lh D
`Agreed-Uponand Disputed Claim Terms.............. senenseseee peeeeseeeeee seseaseeees veveeeedO
`1.
`Construction of Agreed-Upon Claim Terms........ccesessessserssreeseteneeeeQO
`a)
`“sensing read data” .....ccccsssssssssesseeseseesssesscssessssasssssseseeseseness0)
`b)
`“sending write data acrossa write path”...sevseseeeneQO)
`c)
`“multiplexer”...eeceeceeessssseessscsesssssssssssecestassescensseseesssensasesesDO
`d)
`“Gnparallel”........cesssssssessssessesesssssersssesssnsesesssseesssesseseseenesseesesQO
`e)
`“While”oo. .ececssccseceerseseessesecsecesees vecseneeeeee sasesesesadsssenaceaeessenesseenede
`Construction ofDisputed Claim Terms............eecssseeseeeessseeterteereeeedil
`a)
`“storing” and “sending” 0.0.0... eseseeeeeteeees setentessescessessensaveensade lL
`b)
`“holding the write address held within a‘set ofregisters”.......24
`
`2.
`
`ae
`
`~ Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 2 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 2 of 45
`
`
`
`VI. THE °937 PATENT................ pessnecesssnsnsescesnssseassasensanseseascessenssseosssensdeseassoseasesessonestedte27
`A.
`OVELVICW ....sesescstessceseteneescescssscecsececsencesnsneesasesceenensescessesseseensesseneneeaseacenssetonss27
`B.
`Agreed-Uponand Disputed Claim Terms.......0cessesssnessasesesoseenssssanens28
`1.
`Construction of Agreed-Upon Claim Term...............ascesessasenesveneenests28
`a)
`“periodic signal”.......eeeeeseeeeeeeeesesesceseesscuneeensescesseeenssseneese28
`Construction of Disputed Claim Terms............cecsccstsssseeeseseneeeseee2d
`a)
`“wherein said periodic signal is configured to control data
`transfer OperatiONs”..........ccscsssseeecesesseseeseeesceseseeentenenateaseues28
`“in response to a... transition of said periodic signal”..........32
`“EPANSITION” .......sccscecssecsssesscessseessseseseesencasseassessssesesssseasseeeseesenensD
`“complementary”.........sccsscsscecsesecensensersencecssssssssseesseessessssesseessGO
`
`b)
`c)
`d)
`
`2.
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 3 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 3 of 45
`
`
`
`1.
`
`INTRODUCTION
`
`This Investigation was instituted by the Commission on July 28, 2011 to determine
`
`whethercertain static random access memories and products containing sameinfringe U.S.
`
`Patent Nos. 6,534,805 (the “’805 patent”); 6,651,134 (the “134 patent”); 7,142,477 (the “’477
`patent”); and 6,262,937 (the “’937 patent”).’ See Fed. Reg. 45,295-96 (July 28, 2011). The
`
`named respondents are GSI Technology, Inc.; Telefonaktiebolaget LM Ericsson; Ericsson Inc.; |
`
`Motorola Mobility, Inc.; Motorola Solutions, Inc.; Tellabs, Inc.; Cisco Systems, Inc.; Avnet, Inc.;
`
`and Hewlett-Packard Company/TippingPoint (collectively, “Respondents”).
`
`Pursuant to Ground Rule 5A, a Markmanhearing was held on October 14, 2011
`regarding the interpretation ofcertain terms ofthe asserted claims ofthe patents at issue, namely:
`
`e Claims 1, 2, and 4—6 of the ’805 patent;
`
`e Claims 1, 2 and 12-15 ofthe 134 patent;
`
`e Claims 8 and 9 of the ’477 patent; and
`
`e Claims 1, 2, 6, 12, and 13 of the ’937 patent.
`Prior to the hearing, Complainant Cypress Semiconductor Corp. (“Cypress”) and
`Respondents met and conferred in an effort to reduce the numberofdisputed claim terms to a
`
`minimum. Theparties also filed initial and reply claim construction briefs, wherein each party
`
`offered its construction for the claim terms in dispute, along with support for its proposed
`
`interpretation. After the hearing and pursuant to Order No.7, the parties submitted anupdated
`
`Joint Claim Construction Chart.
`
`‘ Complainant Cypress Semiconductor Corp.is presently the owner, by assignment, ofthe patents-in-suit. (2d Am.
`rompl. at7.1.3; Ex. 4 to 2d Am. Compl.)
`2 The claim termsdiscussed in detail in this Order wereidentified in the Updated Joint Proposed Claim Construction
`Chart as being agreed upon or remaining in dispute.
`.For convenience, the briefs and chart submitted by the parties
`for the Markman hearing are referred to hereafter as follows:
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 4 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 4 of 45
`
`
`
`Il.
`
`IN GENERAL
`
`The claim terms construed in this Order aredone so for the purposes ofthis Section 337
`
`Investigation. Those terms not in dispute need not be construed. See Vanderlande Indus.
`NederlandBVvy. Int’l Trade Comm’n, 366 F.3d 1311, 1323 (Fed. Cir. 2004) (noting that the
`administrative lawjudge need only construe disputed claim terms).
`|
`
`Hereafter, discovery and briefing in this Investigation shall be governed bythis
`construction ofthe claim terms. All other claim terms shall be deemed undisputed and shall be
`interpreted by the undersigned in accordance with “their ordinary meaning as viewed by one of
`
`ordinary skill in theart.” Apex Inc. v. Raritan Computer, Inc., 325 F.3d 1364, 1371 (Fed. Cir.
`
`2003), cert. denied, 540 U.S. 1073 (2003).
`
`Til.
`
`RELEVANT LAW
`
`“An infringement analysis entails two steps. Thefirst step is determining the meaning
`
`and scope ofthe patent claims asserted to be infringed. The second step is comparing the
`
`properly construed claimsto the device accused of infringing.” Markman v. Westview
`
`Instruments, Inc., 52 F.3d 967, 976 (Fed. Cir. 1995) (en banc) (internal citations omitted), aff'd,
`517 US.370 (1996). Claim construction is a “matter oflaw exclusively for the court.” Jd. at
`
`970-71. “The construction of claims is simply a way of elaborating the normally terse claim
`
`language in order to understand and explain, but not to change, the scope ofthe claims.”
`
`Embrex, Inc. y. Serv. Eng’g Corp., 216 F.3d 1343, 1347 (Fed.Cir. 2000).
`
`
`
`
`
`
`
`
`|RMIB__| Respondents’MarkmanInitialBrief
`
`
`LRMRB=|Respondents’ MarkmanReplyBrief_____. "J
`
`
`
`
`-2-
`
`Petitioner STMICROELECTRONICS,INC.,
`
`Ex. 1011, IPR2021-00702 ©
`Page 5 of 45.
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 5 of 45
`
`
`
`Claim construction focuses on the intrinsic evidence, which consists of the claims:
`
`themselves, the specification, and the prosecution history. See Phillips v. AWH Corp., 415 F.3d
`
`1303, 1314 (Fed. Cir. 2005)(en banc); see also Markman, 52 F.3d at 979. As the Federal Circuit
`
`in Phillips explained, courts must analyze each of these components to determine the “ordinary
`
`and customary meaning of a claim term” as understood by a person of ordinary skill in art at the
`time ofthe invention. 415 F.3d at 1313. “Such intrinsic evidence is the most significant source
`ofthe legally operative meaning ofdisputed claim language.” BellAtl. NetworkServs., Inc. v. |
`
`Covad Commc’ns Grp., Inc., 262 F.3d 1258, 1267 (Fed. Cir. 2001).
`
`“Tt is a ‘bedrock principle’ of patent law that ‘the claims of a patent define the invention
`
`to whichthe patentee is entitled the right to exclude.’” Phillips, 415 F.3d at 1312 (quoting
`
`Innova/Pure Water, Inc. v. Safari Water Filtration Sys., Inc., 381 F.3d 1111, 1115 (Fed. Cir.
`
`2004)). “Quite apart from the written description and the prosecution history, the claims
`
`themselves provide substantial guidance as to the meaning ofparticular claims terms.” Jd.at
`
`1314; see also Interactive Gift Express, Inc. v. Compuserve Inc., 256 F.3d 1323, 1331 (Fed. Cir.
`
`2001) (“In construing claims, the analytical focus must begin and remain centered on the
`language ofthe claims themselves, for it is that language that the patentee chose to use to
`
`‘particularly point [ ] out and distinctly claim [ ] the subject matter which the patentee regardsas
`
`his invention.”). The context in which a term is used in an asserted claim can be “highly
`
`instructive.” Phillips, 415 F.3d at 1314. Additionally, other claims in the same patent, asserted
`
`or unasserted, may also provide guidanceas to the meaning of a claim term. Id.
`The specification “is always highly relevantto the claim construction analysis. Usually it
`is dispositive; it is the single best guideto the meaning ofa disputed term.” Jd. at 1315 (quoting
`
`Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996)). “[T]he specification
`
`_3.. Petitioner STMICROELECTRONICS,INC.,
`Ex. 1011, IPR2021-00702
`Page 6 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 6 of 45
`
`
`
`mayreveal a special definition given to a claim term by the patentee that differs from the
`
`meaning it would otherwise possess. In such cases, the inventor’s lexicography governs.” Jd. at
`
`1316. “In other cases, the specification may reveal an intentional disclaimer, or disavowal, of
`
`claim scope by the inventor.” Jd. As a general rule, however, the particular examples or
`
`embodiments discussed in the specification are not to be read into the claimsas limitations. Id.
`
`at 1323. In the end, “[t]he construction that stays true tothe claim language and mostnaturally
`
`aligns with the patent’s description of the invention willbe .
`
`.
`
`. the correct construction.” Jd. at
`
`1316 (quoting Renishaw PLC v. Marposs Societa’per Azioni, 158 F.3d 1243, 1250 (Fed. Cir.
`
`1998)).
`
`In addition to the claims and the specification, the prosecution history should be
`examined, ifin evidence. Id at 1317; see also Liebel-Flarsheim Co. v. Medrad, Inc., 358 F.3d
`
`898, 913 (Fed. Cir. 2004). The prosecution history can “often inform the meaning ofthe claim
`
`language by demonstrating how the inventor understood the invention and whether the inventor
`
`limited the invention in the course of prosecution, making the claim scope narrowerthan it
`
`would otherwise be.” Phillips, 415 F.3d at 1317; see also Chimie v. PPG Indus. Inc., 402 F.3d
`1371, 1384 (Fed. Cir. 2005) (“The purpose of consulting the prosecution history in construing a
`
`claim is to exclude any interpretation that was disclaimed during prosecution.”).
`
`Whenthe intrinsic evidence does not establish the meaning of a claim, then extrinsic
`
`evidence(i.e., all evidence external to the patent and the prosecution history, including
`dictionaries, inventor testimony, expert testimony, and learned treatises) may be considered.
`Phillips, 415 F.3d at 1317. Extrinsic evidence is generally viewed as less reliable than the patent
`
`itself and its prosecution history in determining howto define claim terms. /d. at 1317. “The
`
`court may receive extrinsic evidence to educate itself about the invention and the relevant
`
`_ 4. Petitioner STMICROELECTRONICS,INC.,
`ae
`Ex. 1011, IPR2021-00702
`Page 7 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 7 of 45
`
`
`
`technology, but the court may not use extrinsic evidence to arrive at a claim constructionthatis
`
`clearly at odds with the construction mandated by the intrinsic evidence.” Elkay Mfg. Co. v.
`
`Ebco Mfg. Co., 192 F.3d 973, 977 (Fed. Cir. 1999).
`
`If, after a review ofthe intrinsic and extrinsic evidence, a claim term remains ambiguous,
`
`the claim should be construed so as to maintainits validity. Phillips, 415F.3d at 1327. Claims,
`however, cannotbe judicially rewritten in orderto fulfill the axiom ofpreserving their validity.
`
`See Rhine v. Casio, Inc., 183 F.3d 1342, 1345 (Fed. Cir. 1999). Thus, “if the only claim
`construction that is consistent with the claim’s language and the written description renders the
`claim invalid, then the axiom doesnot apply and the claim is simplyinvalid.” Jd.
`
`IV.
`
`LEVEL OF ORDINARYSKILL IN THE ART
`
`Neither Cypress nor Respondents set forth aposition as tothe level ofordinary skill in
`
`the art in their briefs. Respondents’ expert, Dr. Robert Murphy, did, however, address this issue
`
`with respect to the °134, ’937, and °477 patents in his initial expert report onclaim construction,
`
`wherein he stated:
`
`A person ofordinary skill in the relevant art of the 134, °937, and
`°477 patents. at that time would have had a BSin Electrical
`Engineering and 5 years experience with direct SRAM design
`experience.
`
`(RX-9 at § 15.)
`
`Accordingly, as to “one of ordinary skill in the art,” the undersigned finds that, with
`
`respect to the °134, °937, and °477 patents, one of ordinary skill in the art for the would be an
`
`engineer with a bachelor’s degreeor higherin electrical engineeringor its equivalent andfive or
`more yearsofexperience in direct SRAM design. The undersigned similarly finds that with
`
`respect to the ’805 patent, one of ordinary skill in the art would be an engineer with a bachelor’s
`
`_5. Petitioner STMICROELECTRONICS,INC.,
`~~
`Ex. 1011, IPR2021-00702
`oe
`Page 8 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 8 of 45
`
`
`
`degree or higherin electrical engineering or its equivalent and five or more years ofexperience
`
`in SRAM design.
`
`V.
`
`THE °805 PATENT
`
`A.
`
`Overview
`
`The ’805 patent is entitled “SRAM Cell Design.” The ’805 patent issued on March 18,
`
`2003 to named inventor Bo Jin, and was subsequently assigned to Cypress. The ’805 patent has
`
`10 claims of which claims 1, 2, and 4-6 are asserted against Respondents. Claim 1 is an
`
`independent claim. Claims 2 and 4-6 are dependent claims. The asserted claims read as follows
`(with thefirst instance ofthe agreed-upon terms highlighted in italics and the first instance ofthe
`
`disputed term highlighted in bold):
`
`1.
`
`|
`
` Amemory cell comprising aseries of four substantially oblong active regions formed
`within a semiconductor substrate and arranged side-by-side with long axes substantially
`parallel, wherein each of the inner active regions of the series comprises a pair of
`source/drain regions for a respective p-channel transistor, and each of the outer active
`regions of the series comprises a pair of source/drain regions for a respective n-channel
`transistor.
`
`2.
`
`4.
`
`5.
`
`6.
`
`The memory cell as recited in claim 1, further comprising a plurality of substantially
`oblongpolysilicon structures arranged above and substantially perpendicular to the active
`regions.
`
`The memory cell as recited in claim 2, further comprising source/drain contacts to the ©
`source/drain regions of transistors, wherein at least one of the source/drain contacts
`comprises a shared contact to one ofthe inner active regions and one of the polysilicon
`structures.
`
`The memorycell as recited in claim 4, further comprising a series ofsubstantially oblong
`local interconnects arranged substantially perpendicular to the active regions, wherein the
`shared contact is connected to another ofthe source/drain contacts by one ofthe local
`interconnects.
`The memory cell as recited in claim 5, wherein thelocal interconnects are dielectrically _
`spaced above the semiconductor substrate.
`
`-6- Petitioner STMICROELECTRONICS,INC.,
`Ex. 1011, IPR2021-00702
`:
`Page 9 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 9 of 45
`
`
`
`B.
`
`Agreed-Upon and Disputed Claim Terms
`
`1. Construction of Agreed-Upon Claim Terms
`
`a) “active regions”
`
`The term “active regions” appears in claim 1 of the ’805 patent. The parties have agreed
`that said term should be interpreted to mean “areas, separated by isolation regions, where active ©
`
`transistors and/or diffusion regions are formed.” (JC at 7.)
`| Accordingly, the undersigned adoptsthe parties’ proposed construction and construesthe
`
`term “active regions” as “areas, separated by isolation regions, where active transistors and/or
`
`diffusion regions areformed.”
`|
`b) “substantially oblong® active regions”
`
`Cypress and Respondents agree that the phrase “substantially oblong active regions,”
`which appears in appears in claim 1 ofthe °805 patent, should be construed as “an active region:
`
`(1) the length of which is substantially constant and the width of which varies by approximately
`one-third or less along the length ofthe region; (2) the length ofwhich issubstantially constant
`
`and the width of which by design varies only with respect to the widths of the access and latch
`transistors; or (3) the length ofwhich is greater than or equal to approximately three timesits
`
`maximum width; and (4) which does not include markedly L-shaped regions.” (See Notice Of
`
`Claim Construction With Respect To “Substantially Oblong” As Used In U.S. Patent No.
`
`|
`6,534,805 (Jan. 9, 2012); JC at 6.)
`Accordingly, the undersigned hereby adopts the parties’ proposed construction andshall
`
`construe “substantially oblong active regions” to mean “an active region: (1) the length of
`
`> Cypress previously proposed the term “substantially oblong”as it is used in claims 1, 2, and 5 ofthe ’805 patent be
`construed. Subsequent to the Markman hearing, Cypress withdrew its proposed construction of “substantially
`oblong”andstipulated to Respondents’ construction of “substantially oblong” as used in the ’805 patent. (See
`Notice Of Claim Construction With Respect To “Substantially Oblong” As Used In U.S.Patent No. 6,534,805 (Jan.
`9, 2012).)
`
`ne!Petitioner STMICROELECTRONICS,INC,
`
`Ex. 1011, IPR2021-00702
`Page 10 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 10 of 45
`
`
`
`which is substantially constant and the width ofwhich varies by approximately one-third or
`less along the length ofthe region; (2) the length ofwhich is substantially constantand the
`
`width ofwhich by design varies only with respect to the widths ofthe access and latch
`
`transistors; or (3) the length ofwhich is greater than or equal to approximately three timesits
`maximum width; and (4) which does not include markedly L-shapedregions.”
`|
`c) gubstantially oblong polysilicon structures”
`
`The term “substantially oblong polysilicon structures”appears in claim 2 of the °805
`patent. Cypress has stipulated to Respondents’ proposed construction for this term,which is “a
`polysilicon structure the length ofwhich is greater than about three timesits width, provided that
`
`a polysilicon structurestill is substantially oblong despite having a substantially wider region.”
`
`(See Notice Of Claim Construction With Respect To “Substantially Oblong” As Used In U.S.
`
`Patent No.6,534,805 (Jan. 9, 2012);JC at 6.)
`Accordingly, the undersigned hereby construes “substantially oblongpolysilicon
`structures”as “apolysiliconstructure the length ofwhich is greater than about three timesits
`
`width,provided that apolysilicon structure still is substantially oblong despite having.a
`substantially widerregion ifthe widerregion solely accommodates a contact region.”
`
`d) “substantially oblong local interconnects”
`_ Cypress and Respondents do not dispute the construction ofthe claim term “substantially
`oblong local interconnects,” which appears in claim 5ofthe ’805 patent. All parties agree that
`said term should be construed as “a local interconnect the length ofwhichis greater than or equal
`to approximately three times its maximum width.” (See Notice OfClaim Construction With
`Respect To “Substantially Oblong” As Used In U.S.Patent No. 6,534,805 (Jan. 9, 2012); JC at~
`6)
`
`-8- Petitioner STMICROELECTRONICS, INC.,
`Ex, 1011, IPR2021.-00702 US
`“Page Ll of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 11 of 45
`
`
`
`Accordingly, the undersigned shall hereby construe “substantially oblong local
`interconnects” to meati “a local interconnect the length ofwhich is greater than or equalto
`
`approximately three times its maximum width.”
`
`2. Construction of Disputed Claim Term
`
`a)
`
`“local interconnects”
`
`The term “local interconnects” appears in claim 5 of the ’805 patent. The parties disagree
`
`on the properclaim construction ofthe term, and have proposed the following constructions:
`
`cell
`
`A relatively short circuit connection that does
`Short, circuit connections confined to a
`
`particular region within a single memory cell|not extend across the entire memory
`
`Cypressasserts that its claim construction comesstraight from the specification. Cypress
`
`cites the following language:“Local interconnectionsare generally used for short runsrelative to
`
`much longer metal conductors used for global connections. Thus, the term “local interconnect’
`mayrefer to the function ofconnecting features within a circuit... .” (CMIB at i (citing °805
`
`patent at 11:17-22).) Cypress states that the prosecution history further confirmsthis definition
`
`of the term wherein the patentee stated that the “local interconnects” are “confinedto a particular
`region within a single memory cell.” (CMIB at 11 (citing Ex, 2 at 4).)
`Cypress argues that, contrary to the position of Respondents, the specification does not
`
`state that “local interconnects” are “relatively short circuit connection[s.]” Cypress argues that
`the specification actually says that “Hocal interconnects are generally used for short runs
`relative to much longer[] global connections.” (CMIBat 11; CMRB at 7 (citing °805 patentat
`11:18-20).) Cypress states that what the specification language is saying is that in comparison to
`global connections, that is “relatively” toglobal connections, localconnections are shorter.
`|
`Thus, Cypress asserts, in this context, it is clear what “relatively” means. (CMRB at 7.)
`
`_g.._ Petitioner STMICROELECTRONICS,INC.,
`Ex. 1011, IPR2021-00702
`eae
`_ Page 12 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 12 of 45
`
`
`
`Cypress disagrees with Respondents’ assertion that the part oftheir construction, “does
`
`not extendacrossthe entire memory cell,” is more “objectively stated” and easier to apply than
`
`the definition given in the prosecution history. Yet, Cypress alleges, Respondents concedethat
`the prosecution history defines the term as “confined to a particular region within a memory
`|
`cell.” (CMRB at8 (citing Ex. 2 at 4).) Cypress also argues that its definition is also consistent
`with the specification, which contemplates that local interconnects may “refer to the function of
`
`connecting features ‘within a circuit.’” (Jd. (citing ’805 patent at 11:20-21 (emphasis added)).)
`Cypress also argues that the prosecution history states that “a local interconnect does not extend
`across the entire cell such that when memory cells are abutted against each other, a local -
`
`interconnect would extend globally across the entire integrated circuit comprising an array of
`
`memory cells.” (/d. (citing Ex. 2 at 4).). Cypress claimsthat this confirmsthat the local
`
`interconnectis used in a single memory cell. (/d.)
`
`—
`
`In support of their claim interpretation, Respondentsarguethat the local interconnects
`
`should be “relatively short,” as opposed to “short,” as proposed by Cypress. Respondents state
`
`that the “relatively short” language comes from both the specification and the prosecution
`history. (RMIB at 19.) Respondents note that the specification states that the “[lJocal
`interconnectionsare generally used for shorter runs relative to much longer metal connections
`used for global connections.” (RMIB at 20; RMRBat8 (citing ’805 patent at 11:18-20).)
`Respondents argue that, during prosecution,the applicant stated, in the context ofdistinguishing
`
`prior art, that “[a] local interconnect is defined in the present specification as one whichis
`relatively short ....” (RMIB at20 (citing RX-3 at 4-5),) Thus, Respondents argue that the
`
`“relatively short” language of Respondents’ proposed construction iswell-supported in the
`
`intrinsic evidence.
`
`-10- Petitioner STMICROELECTRONICS, INC.
`Ex, 1011, IPR2021-00702
`_ Page 13 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 13 of 45
`
`
`
`Second,Respondents note that their construction states that a local interconnect “does not
`
`extend across the entire memory cell,” whereas Cypress states that a local interconnect“is
`
`- confined to a particular region within a memory cell.” Respondents state that both ofthese .
`
`statements come verbatim from the prosecution history except that Cypress adds the word
`
`-“single”to its construction. (RMIB at 20 (citing RX-3 at 4-5).) Respondents state that they
`believe that these two statements make the same point, but “that the point is more objectively :
`
`stated (andthat it is easier to determine whether the claimed feature exists in a memory device)
`
`using the phrase ‘does not extend across the entire memory cell.’” Ud.)
`
`Taking into account the language from the prosecution history cited by the parties (RX-3
`
`at 4-5) and the language ofthe specification (805 patent at 11:18-20), the undersigned hereby
`
`construesthe claim term “local interconnect” to mean “a connection thatis short relative to.a
`much longer metal connection usedfor a global connection, is confined to aparticular region
`
`within a memory cell, and does not extend across the entire memory cell.”
`
`VI.
`
`THE ’134 PATENT
`
`A.
`
`Overview
`
`~The ’134 patent is entitled “Memory Device WithFixed Length Non Interruptible Burst.”
`
`The ’134 patent issued on November18, 2003 to named inventor Cathal G. Phelan, and was
`subsequently assigned to Cypress. The ’134 patenthas 21 claims ofwhich claims 1, 2 and 12—
`
`15 are asserted against Respondents. Claim 1 is an independentclaim. Claim 2, 12, 13, 14, and
`15 depend from claim 1. These claims read as follows (with the first instance ofthe agreed-upon:
`terms highlighted in italics and the first instance ofthe disputed terms highlighted in bold):
`1.
`A circuit comprising: a memory comprising a plurality ofstorage elements each
`configured to read and write data in responseto an internal address signal; and a logic
`circuit configured to generate a predetermined numberofsaid internal address .
`signals in responseto (i) anexternal address signal,(ii) a clock signal and(iii)one or
`
`-ll- Petitioner STMICROELECTRONICS,INC.,
`
`:
`
`Ex. 1011, IPR2021-00702
`Page 14 of45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 14 of 45
`
`
`
`2.
`
`12.
`
`13.
`
`14.
`15.
`
`more control signals, wherein said generationof said predetermined numberofinternal
`address signals is non-interruptible.
`
`The circuit according to claim 1, wherein said predetermined numberofinternal address
`signals is determined by a fixed burst length.
`
`The circuit according to claim 1, wherein said logic circuit comprises a counter
`configured to generate said predetermined numberofinternal address signals.
`
`The circuit according to claim 1, wherein said external address signal comprises an initial
`address for data transfers to and from said memory.
`A memory device according to claim 1, wherein said circuit is an integrated circuit.
`The circuit according to claim 1, further comprising address and control busses
`configured to present said external address signal and said one or more controlsignals,
`wherein said busses are freed up during the generation ofsaid predetermined number of
`internal address signals.
`
`__
`
`B.
`
`Agreed-Upon and Disputed Claim Terms
`1. Construction of Agreed-Upon Claim Terms:
`
`a) “external address signal”
`Cypress and Respondents agree that the term “external address signal,” which appears in |
`
`appears in claims 1, 13, and 15 of the ’134 patent, should be construed as “an address signal that
`
`originates outside of the circuit.” (JC at 7.).
`.
`Accordingly, the undersigned hereby adopts the parties’ proposed construction and shall
`construe “external address signal” to mean “an address signalthatoriginates outside ofthe’
`
`circuit.”
`
`b) “non-interruptible”
`
`Cypress and Respondents do notdispute the construction of the claim term “non-_
`interruptible,” which appears in claim 1 ofthe 7134 patent. All parties agree that said term
`
`should be construed as “cannot be stopped or terminated onceinitiated until the fixed number of
`
`internal addresses has been generated.” (Jd. at 8.)
`
`-12-- Petitioner STMICROELECTRONICS, INC.,
`
`Ex. 1011, IPR2021-00702
`Page 15 of 45
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 15 of 45
`
`
`
`Accordingly, the undersigned hereby construes “non-interruptible” as “cannot be stopped
`
`or terminated onceinitiated until thefixed number ofinternal addresses has been generated.”
`
`c) “burst”
`
`The term “burst” appears in claim 2 ofthe 7134 patent. The parties have agreed that said
`term should beinterpreted to mean “a number ofwordstransferred as a group.” Ud.)
`
`Accordingly, the undersigned shall hereby construe the term “burst” as “a number of
`
`words transferred as a group.”
`
`2. Construction of Disputed Claim Terms
`a) “internal address signal”
`
`The term “internal address signal” appears in claims 1, 2, 12, and 15 of the °134 patent.
`
`The parties disagree on the proper claim construction, and construe the term as follows:
`
`to read and write data to said memo
`
`gnal
`g
`gl
`associated with a memory to enable said
`memory
`
`en
`g
`s
`circuit claimed by the preamble
`
`Cypressasserts that its proposed construction comes directly from the claim language
`itself, namely: “Whatis claimed is: A circuit comprising: a memory ...; and a logic circuit.”
`
`(CMIB at 13 (citing °134 patent at 5:21-26; 10/14/11 Tr. at 56:20-22).) Cypress contendsthat,
`
`|
`
`contrary to Respondents’ objection, its construction does not read the word “internal” out ofthe
`claim for “Cypress’s construction noted that the address signal is generated ‘by’ the ‘logic
`circuit’ and ‘memory,’ the two elements that make upthe‘circuit’ referenced by the preamble in
`
`claim 1.” (CMRB at 11; see also CMIBat 14 (arguing that thesignal is generated inside the
`
`circuit referenced in the preamble).)
`
`_ 43... Petitioner STMICROELECTRONICS,INC,
`Ee
`Ex. 1011, IPR2021-00702
`~~ Page 16 of 45.
`
`Petitioner STMICROELECTRONICS, INC.,
`Ex. 1011, IPR2021-00702
`Page 16 of 45
`
`
`
`Respondents submitthat their proposed construction is consistentwith the plain meaning |
`-of the word “internal.” (RMIB at 25.) Respondents also claim that their constructionis
`consistent with the understandingofthe term to one ofordinary skill in the art, “who understands
`that the internal address signals are