IN THE UNITED STATES DISTRICT COURT
`FOR THE WESTERN DISTRICT OF TEXAS
`WACO DIVISION
`
`JOLED INC.,
`
`v.
`
`Plaintiff,
`
`SAMSUNG ELECTRONICS AMERICA,
`INC., SAMSUNG DISPLAY CO., LTD.,
`AND SAMSUNG ELECTRONICS CO.,
`LTD.,
`
`Defendants.
`
`CASE NO. 6:20-cv-00559-ADA
`
`DEFENDANTS’ PROPOSED CLAIM CONSTRUCTIONS
`
`Pursuant to the Court’s Scheduling Order (Dkt. 24) and the Updated Standing Order
`Governing Proceedings—Patent Cases (Dkt. 22), Defendants Samsung Electronics America, Inc.
`(“SEA”), Samsung Display Co., Ltd. (“SDC”), and Samsung Electronics Co., Ltd. (“SEC”)
`(collectively, “Defendants”) hereby provide the following proposed constructions for claim terms
`from U.S. Patent Nos. 9,728,130 (“the ’130 Patent”), 9,922,597 (“the ’597 Patent”), 9,997,108
`(“the ’108 Patent”), 10,134,336 (“the ’336 Patent”), and 10,198,992 (“the ’992 Patent”)
`(collectively, the “Asserted Patents”) the parties previously identified for construction. The
`proposed constructions listed below are subject to the reservation of rights set forth in Defendants’
`January 25 Identification of Proposed Claim Terms for Construction. In addition, Defendants state
`that their review and analysis of the claim terms, the proposed constructions, and the supporting
`evidence, is ongoing, and the Scheduling Order requires the parties to meet and confer regarding
`their proposed constructions. Defendants reserve the right to add or drop claim terms, modify any
`of the claim language sought to be construed, and/or modify any of their proposed constructions,
`based on their continued review and analysis, the meet-and-confer process, or otherwise.
`
`SAMSUNG EX. 1019 - 1/6
`
`

`

`Defendants’ Proposed Construction
`a gate driver circuit which contains two separate shift
`registers, the first shift register controlling a first gate
`signal line and the second shift register controlling a
`second gate signal line, and which may contain other
`circuitry
`(’130, cls. 1, 13)
`(’597, cls. 1, 16)
`(’108, cls. 1, 16)
`
`the gate driver circuit contains two separate shift
`registers, the first shift register controlling a first gate
`signal line and the second shift register controlling a
`second gate signal line, and may contain other circuitry
`(’336, cls. 10, 18)
`
` gate driver circuit which contains two separate shift
`registers, the first shift register controlling and
`connected to the first gate signal lines and the second
`shift register controlling and connected to the second
`gate signal lines, and which may contain other circuitry
`(’992, cls. 1, 8, 10)
`
`
` a
`
`the first switch transistor is controlled by the first gate
`driver circuit and the second switch transistor is
`controlled by the second gate driver circuit, such that
`the two transistors are, at different points in time, (i)
`both in an on state, (ii) both in an off state, and (iii) in
`opposite states
`(’130, cl. 1)
`
`controlling the first switching transistor by the first
`gate driver circuit and controlling the second switch
`transistor by the second gate driver circuit, such that
`the two transistors are, at different points in time, (i)
`both in an on state, (ii) both in an off state, and (iii) in
`opposite states
`(’130, cl. 13)
`
`wherein the first switch transistor is controlled by the
`first gate driver circuit and the second and third switch
`transistors are controlled by the second gate driver
`circuit, such that the first and second switch transistors
`are, at different points in time, (i) both in an on state,
`(ii) both in an off state, and (iii) in opposite states, and
`the first and third switch transistors are, at different
`
`Term
`“a gate driver circuit which includes a first
`gate driver circuit, a second gate driver
`circuit”
`(’130, cls. 1, 13)
`
`“a gate driver circuit which includes a first
`gate driver circuit and a second gate
`driver circuit”
`(’597, cls. 1, 16)
`(’108, cls. 1, 16)
`
`“the gate driver circuit includes a first
`gate driver circuit and a second gate
`driver circuit”
`(’336, cls. 10, 18)
`
`“a gate driver circuit including a first gate
`driver circuit connected to the plurality of
`first gate signal lines and a second gate
`driver circuit connected to the plurality of
`second gate signal lines”
`(’992, cls. 1, 8, 10)
`
`
`
`Samsung identified
`
`“the first switching transistor and the
`second switching transistor are
`independently on/off controlled by the first
`gate driver circuit and the second gate
`driver circuit”
`(’130, cl. 1)
`
`“independently on/off controlling the first
`switching transistor and the second
`switching transistor by the first gate
`driver circuit and the second gate driver
`circuit”
`(’130, cl. 13)
`
`“wherein, by the first gate driver circuit
`and the second gate driver circuit, the first
`switch transistor is independently on/off
`controlled from the second switch
`transistor and the third switch transistor”
`(’597, cl. 4)
`(’108, cl. 4)
`
`
`
`
`- 2 -
`
`SAMSUNG EX. 1019 - 2/6
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`

`

`Term
`“wherein the first switch transistor and
`the second switch transistor are
`independently on/off controlled by the first
`gate driver circuit and the second gate
`driver circuit”
`(’336, cl. 11)
`
`“the first gate driver circuit and second
`gate driver circuit control the first gate
`signal line and the second gate signal line
`independently”
`(’336, cl. 18)
`
`Samsung identified
`
`“the first gate driver circuit is configured
`to select the plurality of first gate signal
`lines as a block simultaneously”
`(’108, cl. 6)
`(’992, cls. 6, 14)
`
`“selecting, by the first gate driver circuit,
`the plurality of first gate signal lines as a
`block simultaneously”
`(’108, cl. 20)
`
`“selecting the plurality of first gate signal
`lines via the first gate driver circuit as a
`block simultaneously”
`(’992, cl. 8)
`
`Samsung identified
`
`“the source driver circuit [is/being]
`provided as a semiconductor chip and
`[is/being] attached to the EL display
`apparatus”
`(’130, cls. 1, 13)
`
`Samsung identified
`“the second gate driver circuit is arranged
`at a second side of the display screen”
`(’130, cl. 4)
`
`Defendants’ Proposed Construction
`points in time, (i) both in an on state, (ii) both in an off
`state, and (iii) in opposite states
`(’597, cl. 4)
`(’108, cl. 4)
`
`wherein the first switch transistor is controlled by the
`first gate driver circuit and the second switch transistor
`is controlled by the second gate driver circuit, such that
`the two transistors are, at different points in time, (i)
`both in an on state, (ii) both in an off state, and (iii) in
`opposite states
`(’336, cl. 11)
`
`the first gate driver circuit controls the first gate signal
`line and the second gate driver circuit controls the
`second gate signal line, such that the two lines have, at
`different points in time, (i) both an on signal, (ii) both
`an off signal, and (iii) the opposite signals
`(’336, cl. 18)
`
`the first gate driver circuit is configured to output an on
`voltage to the control line, which applies the voltage
`simultaneously to the plurality of first gate signal lines
`as a block
`(’108, cl. 6)
`(’992, cls. 6, 14)
`
`outputting an on voltage, by the first gate driver circuit,
`to the control line, which applies the voltage
`simultaneously to the plurality of first gate signal lines
`as a block
`(’108, cl. 20)
`
`outputting an on voltage by the first gate driver circuit
`to the control line, which applies the voltage
`simultaneously to the plurality of first gate signal lines
`as a block
`(’992, cl. 8)
`Indefinite.
`(’130, cls. 1, 13)
`
`the second gate driver circuit is not located on the same
`side of the display screen as the first gate driver circuit
`(’130, cl. 4)
`
`
`
`- 3 -
`
`SAMSUNG EX. 1019 - 3/6
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`

`

`Defendants’ Proposed Construction
`
`
`
`initially turning off the driving transistor of the pixel
`circuit
`(’597, cls. 1, 16)
`(’108, cls. 1, 16)
`
`initially turns off the driving transistor of the pixel
`circuit
`(’108, cls. 1, 16)
`
`turning off the driving transistor of…[a/the] second
`pixel
`(’597, cls. 16, 17)
`(’108, cls. 16, 17)
`
`initially applies an OFF signal to [a/the] gate terminal
`of the driving transistor to turn the driving transistor
`off
`(’597, cls. 1, 6, 16)
`(’108, cls. 7, 9, 18)
`
`
`an OFF signal is initially applied to a gate terminal of
`the driving transistor to turn the driving transistor off
`(’597, cl. 16)
`
`an OFF signal is applied to [a/the] gate terminal of the
`driving transistor to turn the driving transistor off
`(’597, cl. 17)
`(’108, cls. 17, 19)
`
`
`(See above constructions).
`
`
`Term
`
`
`Samsung identified
`“initially resetting the pixel circuit”
`(’597, cls. 1, 16)
`(’108, cls. 1, 16)
`
`“initially resets the pixel circuit” /
`(’108, cls. 1, 16)
`
`“resetting…[a/the] second pixel”
`(’597, cls. 16, 17)
`(’108, cls. 16, 17)
`
`Samsung identified
`
`“initially resets [a/the] gate terminal of the
`driving transistor” /
`(’597, cls. 1, 6, 16)
`(’108, cls. 7, 9, 18)
`
`“a gate terminal of the driving transistor is
`initially reset” /
`(’597, cl. 16)
`
`
`“[a/the] gate terminal of the driving
`transistor is reset”
`(’597, cl. 17)
`(’108, cls. 17, 19)
`
`Samsung identified
`“initially resetting the pixel circuit”
`(’597, cls. 1, 16)
`(’108, cls. 1, 16)
`
`“initially resets a gate terminal of the
`driving transistor”
`(’597, cls. 1, 6, 16)
`(’108, cls. 7, 9, 18)
`
`“resetting . . . a second
`pixel”
`(’597, cls. 16, 17)
`(’108, cls. 16, 17)
`
`JOLED identified
`
`
`
`- 4 -
`
`SAMSUNG EX. 1019 - 4/6
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`

`

`Defendants’ Proposed Construction
`when the third switch transistor of the Nth row
`initially resets the gate terminal of the driving
`transistor of the Nth row
`(’597, cls. 1, 16)
`
`when the third switch transistor of the Nth pixel
`row initially resets the pixel circuit of the Nth pixel
`row
`(’108, cl. 1)
`
`when the third switch transistor of the Nth pixel
`row initially resets the pixel circuit of the Nth pixel
`row
`(’108, cl. 16)
`the first switch transistor of the Nth row is
`connected to the first gate driver circuit
`or alternatively indefinite.
`(’597, cl. 10)
`
`the first switch transistor of the Nth pixel row is
`connected to the first gate driver circuit
`or alternatively indefinite.
`(’108, cl. 11)
`
`Indefinite
`(’336, cls. 1, 6, 19)
`
`
`
`Term
`“when the third switch transistor initially
`resets the gate terminal of the driving
`transistor”
`(’597, cls. 1, 16)
`
`“when the third switch transistor initially
`resets the pixel circuit”
`(’108, cl. 1)
`
`“when the third switch transistor initially
`resets the pixel circuit”
`(’108, cl. 16)
`
`Samsung identified
`“the first switch transistor of the Nth row
`is controlled in an OFF state by the first
`gate driver circuit”
`(’597, cl. 10)
`
`“the first switch transistor of the Nth pixel
`row is controlled in an OFF state by the
`first gate driver circuit”
`(’108, cl. 11)
`
`Samsung identified
`“the gate driver circuit is configured to
`change a ratio of an area of the plurality of
`band-shaped non-display regions on the
`display screen to an area of the plurality of
`band-shaped display regions on the
`display screen depending on at least one of
`a brightness adjustment, a type of image
`data, or whether a display image is a
`motion image or a still image”
`(’336, cls. 1, 19)
`
`
`“the gate driver circuit is configured to
`change a number of divisions by which the
`display screen is divided into the plurality
`of band-shaped non-display regions and
`the plurality of band-shaped display
`regions depending on the type of image
`data”
`(’336, cl. 6)
`
`“type of image data”
`(’336, cls. 1, 6, 19)
`
`
`
`- 5 -
`
`SAMSUNG EX. 1019 - 5/6
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`

`

`Term
`
`
`Samsung identified
`“the gate driver circuit is configured to
`move up and down the plurality of band-
`shaped non-display regions and the
`plurality of band-shaped display regions
`relative to the display screen”
`(’336, cl. 14)
`
`Samsung identified
`“asymmetrically generate the plurality of
`band-shaped non-display regions and the
`plurality of band-shaped display regions
`on the display screen”
`(’336, cl. 16)
`
`Samsung identified
`
`Defendants’ Proposed Construction
`
`the gate driver circuit is configured to move the
`plurality of band-shaped non-display regions and
`the plurality of band-shaped display regions, on an
`alternating basis, from the top to the bottom of the
`display screen and from the bottom to the top of
`the display screen
`(’336, cl. 14)
`Indefinite
`(’336, cl. 16)
`
`- 6 -
`
`
`
`
`
`SAMSUNG EX. 1019 - 6/6
`
`