(12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY(PCT)
`
`(19) World Intellectual Property
`*
`*
`Organization
`International Bureau
`
`(43) International Publication Date
`7 October 2004 (07.10.2004)
`
`
`(Es
`ey
`S
`(AN PQ
`
`0
`
`aS
`
`PCT
`
`(51) International Patent Classification’:
`
`G09G 3/32
`
`(74)
`
`(21) International Application Number:
`PCT/JP2004/004041
`24 March 2004 (24.03.2004)
`
`(22) International Filing Date:
`
`(81)
`
`(25) Filing Language:
`
`(26) Publication Language:
`
`English
`
`English
`
`(30) Priority Data:
`2003-82465
`
`25 March 2003 (25.03.2003)
`
`JP
`
`(71) Applicant (for all designated States except US): CA-
`SIO COMPUTER CO., LTD. [JP/JP]; 6-2, Honmachi
`1-chome, Shibuya-ku, Tokyo 151-0071 (JP).
`
`(34)
`
`(72) Inventors; and
`SHIRASAKI,
`(75) Inventors/Applicants (for US only):
`Tomoyuki [JP/JP]; 1425-3-234, Sakuragaoka 1-chome,
`Higashiyamato-shi, Tokyo 207-0022 (JP). TAKEI, Man-
`abu [JP/JP]; 2-20-5-B202, Hikarigaoka,, Sagamihara-shi,
`Kanagawa 229-0027 (JP).
`
`(54) Title: A DRIVE DEVICE AND A DISPLAY DEVICE
`
`(10) International Publication Number
`WO 2004/086347 A2
`
`Agent: KASHIMA, Hidemi; 5-4-18, Ozenji Nishi,
`Asao-ku, Kawasaki-shi, Kanagawa 215-0017 (JP).
`
`Designated States (unless otherwise indicated, for every
`kind of national protection available): AE, AG, AL, AM,
`AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ, CA, CH, CN,
`CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, EG, ES, FI,
`GB, GD, GE, GH, GM, HR, HU,ID, IL,IN, IS, KE, KG,
`KP, KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG,
`MK,MN, MW,MX, MZ, NA,NI, NO, NZ, OM,PG, PH,
`PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SY, TJ, TM, TN,
`TR,TT, TZ, UA, UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
`
`Designated States (unless otherwise indicated, for every
`kind of regional protection available): ARIPO (BW, GH,
`GM,KE, LS, MW, MZ, SD, SL, SZ, TZ, UG, ZM, ZW),
`Eurasian (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM), Euro-
`pean (AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR,
`GB, GR,HU,IE, IT, LU, MC, NL, PL,PT, RO, SE, SI, SK,
`TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW,
`ML, MR,NE,SN, TD, TG).
`
`[Continued on next page]
`
`
`DISPLAY DATA
`
`
`
`oe
`
`
`
`130
`DATA
`OeROL
`SIGNALS
`
`
`
`
`
`
`
`
`
`
`
`
`
`ssi =
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`ai
`sSLn L
`
`f
`120
`
`BG
`-
`
`oofA
`JX
`DL ja DLd
`DLj
`
`Petitioner Samsung Ex. 1009 - Page 1 of 94
`
`
`
`
`
`
`
`2004/086347A2IMVIMMNIRNINTIMAMONITAMINEM
`
`(57) Abstract: The display device of the present
`invention
`comprising
`a
`a display panel
`(110)
`which
`comprises
`a plurality of
`scanning
`lines
`(SLia,SLib)arranged in rows and a plurality of data
`CURRENT GENERATION CIRCUIT
`lines (DLja .... DLjd) arranged in columns ; and a
`
`1c
`plurality of display pixels (EM) arranged in matrix form
`
`
`ef *
`
`
`
`
`
`
`
`
`near the intersecting point of the plurality of scanning
`CH
`
`
`sonsCUcuesen
`lines and the plurality of data lines; a scanning driver
`
`SIGNAL
`HOLDING
`CIRCUITS
`Ipix
`circuit (120) which selects simultaneously the display
`Isst
`{
`SCK
`pixels of a plurality of rows connected to some of the
`
`
`plurality of scanning lines of the display panel; and a
`signal driver circuit (130) which comprises a current
`generation circuit (CG) which generates signal currents
`and supplies the display data that provides the display
`gradation for each of the display pixels and have a
`current value according to the value of the display
`data and a plurality of current holding circuits (CH)
`supplied with the signal currents which take in and hold
`the signal currents corresponding to the display pixels
`of the plurality of rows selected by the scanning driver
`circuit (120) and outputs simultaneously the gradation
`currents to cach ofthe plurality of display pixels in the
`plurality of scanning lines based on the signal currents.
`The display panel comprising a plurality of scanning
`‘Line groups (SLi) which constitute sets of the plurality
`of scanning lines through which simultaneousselection
`is performed by the scanning driver circuit; a plurality
`of scanning signal lines (SSLi) which are connected to
`each of the plurality of scanning line groups; and a plurality of data line groups (DLj) which constitute sets of the plurality of data
`lines corresponding to the line count of the display pixels of the plurality of rows connected to each of the scanning line groups
`within the plurality of data lines.
`
`Petitioner Samsung Ex. 1009 - Page 1 of 94
`
`

`

`WO 2004/086347 A2
`
`_IMNINMINIINIMTAIANINNTTIIMA INRIATMNT I
`
`CH, CY, CZ, DE, DK, EE, ES, Fl, FR, GB, GR, HU, LE, IT,
`Declarations under Rule 4.17:
`LU, MC, NL, PL, PT, RO, SE, SI, SK, TR), OAPI patent (BF,
`— as to applicant’s entitlement to apply for and be granted
`BJ, CF, CG, Cl, CM, GA, GN, GO, GW, ML, MR, NE, SN,
`a patent (Rule 4.17/(ii)) for the following designations AE,
`TD, TG)
`AG, AL, AM, AT, AU, AZ, BA, BB, BG, BR, BW, BY, BZ,
`CA, CH, CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, —_of inventorship (Rule 4.17(iv)) for US only
`EG, ES, FI, GB, GD, GE, GH, GM, LR, HU, ID, IL, IN, IS,
`JP. KE, KG, KP. KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA,_Published:
`MD, MG, MK, MN, MW, MX, MZ, NA, NI, NO, NZ, OM, —__without international search report and to be republished
`PG, PH, PL, PT, RO, RU, SC, SD, SE, SG, SK, SL, SY, TS,
`upon receipt of that report
`TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, YU, ZA, ZM,
`ZW, ARIPO patent (BW, GH, GM, KE, LS, MW, MZ, SD,_For two-letter codes and other abbreviations, refer to the "Guid-
`SL, SZ, TZ, UG, ZM, ZW), Eurasian patent (AM, AZ, BY,
`ance Notes on Codes and Abbreviations"appearing at the begin-
`KG, KZ, MD, RU, TJ, TM), European patent (AT, BE, BG,—ning of each regular issue of the PCT Gazette.
`
`Petitioner Samsung Ex. 1009 - Page 2 of 94
`
`Petitioner Samsung Ex. 1009 - Page 2 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`DESCRIPTION
`
`A DRIVE DEVICE AND A DISPLAY DEVICE
`
`Crogs-reference to Related Application
`
`This application is based upon and claims the benefit of
`
`5
`
`priority from the prior Japanese Patent Application No.
`
`2003-082465, filed March 25, 2003, the entire contents of which
`
`is incorporated herein by reference.
`
`Technical Field
`
`This invention relates toadrive device which drives adisplay
`
`10
`
`panel comprising a plurality of display pixels having current
`
`control type display devices, and more particularly a display
`
`device comprising the drive device and associated drive method
`
`with regard to the display device comprising the drive device
`
`and the drive device.
`
`15
`
`Background Art
`
`Inrecent years, the spread of Flat panel type display devices
`
`as monitors and displays of personal computers and video equipment
`
`has been remarkable. Particularly, Liguid Crystal Displays
`
`(hereinafter denoted as “LCD") have many advantages as these
`
`20
`
`devices are thin-shaped, space-saving, low-powered andthe like
`
`as compared to conventional display devices.
`
`Furthermore,
`
`as
`
`the next-generation display device
`
`technology which
`
`supplants
`
`current LCD's, Research and
`
`Petitioner Samsung Ex. 1009 - Page 3 of 94
`
`Petitioner Samsung Ex. 1009 - Page 3 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`Development
`
`(R&D) of a self-luminescence type display devices
`
`(self-luminescence type displays) equipped with a display panel
`
`which performs two-dimensional digital array of the display
`
`pixels is being actively developed. These LCD's comprise a
`
`self- luminescence type display device composed of light emitting
`
`devices to perform luminescent operation according to the display
`
`data and extensively employ organic electroluminescent devices
`
`(hereinafter denoted as “organic EL devices”) or Light Emitting
`
`Diodes (LEDs) and the like.
`
`10
`
`Such self-luminescence type displays as compared to LCD's
`
`have rapid display response speed to moving images and there
`
`isnoangle-of-visibilitydependability. Additionally, because
`
`backlight is not needed like an LCD, higher luminance with a
`
`greater contrast ratio, higher resolution of the display image
`
`15
`
`quality together with using low-powerareattainable. Thesevery
`
`predominant features will lead to extremely thin-shaped and
`
`lightweight models
`and
`full-scale utilization of
`such
`self -luminescence type displays are expected in the near future.
`
`In self-luminescence type display configurations which apply
`
`20
`
`an active-matrix drive method, various drive control mechanisms
`
`and control methods of the display pixels comprising a display
`
`device composed of light emitting devices constituted of a
`
`plurality of switching elements for controlling operation of
`
`the light emitting devices have been proposed.
`
`25
`
`FIGs 154A and 15B are equivalent circuit drawings showing
`
`prior art example configurations as in the case of the display
`
`Petitioner Samsung Ex. 1009 - Page 4 of 94
`
`Petitioner Samsung Ex. 1009 - Page 4 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`pixels applied to organic EL devices OEL as the light emitting
`
`devices in a self-luminescence type display.
`
`The configuration shown in FIG.
`
`15A comprises a voltage
`
`application methodwhich is constitutedwith a light generation
`
`driver circuit DP1 comprising an n-channel
`
`type Thin-Film
`
`Transistor (TFT) Trl11, a p-channel type Thin-Film Transistor
`
`Tr112, a capacitor CP1l and the organic EL devices OEL. The light
`
`generation driver circuit DP1 comprises the n-channel
`
`type
`
`Thin-Film Transistor (TFT) Trill (hereinafter denoted as "Nch
`
`10
`
`transistor”) whereby the gate terminal is connected to the
`
`scanning lines SL, along with the source terminal and the drain”
`
`terminal each other connected to the data lines DL and the contact
`
`point N111 (hereinafter denoted as “contact” for the convenience
`
`of explanation) each near the intersecting point of a plurality
`
`is
`
`of scanning lines SL and data lines DL arranged in matrix form
`
`in the display panel; the capacitor CP1 gate terminal is connected
`
`to contact N111 which is connected in between the p-channel type
`
`Thin-Film Transistor Trl1i2
`
`(hereinafter denoted as
`
`“Pch
`
`transistor”) source terminal by which ground potential Vgnd is
`
`20
`
`applied along with the contact N111 and the Pch transistor Tr112
`
`gate terminal; and the organic EL devices OEL whereby the anode
`
`terminal is connected to the drain terminal of the Pch transistor
`
`Tr112 of the light generation driver circuit DP1l and the low
`
`power supply voltage Vss of low electric potential is applied
`
`25
`
`to the cathode terminal lower than the ground potential Vgnd.
`
`In this configuration,
`
`the gradation signal voltage Vpix
`
`Petitioner Samsung Ex. 1009 - Page 5 of 94
`
`Petitioner Samsung Ex. 1009 - Page 5 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`according to the display data is applied to the data lines DL.
`
`When a high-level scanning signal Vsel is applied to the scanning
`
`lines SL and the display pixels are set to a selection state,
`
`the Nch transistor Trill in the light generation driver circuit
`
`DP1 performs an “ON” operation. The gradation signal voltage
`
`Vpix is applied to the data lines DL via Nch transistor Tr1ll
`
`to the contact N111, specifically the gate terminal of Pch
`
`transistor Tri1l2.
`
`Accordingly,
`
`the Pch transistor Tr112
`
`Lo
`
`performs an “ON” operation by the switch-on state according to
`the
`above-mentioned gradation
`signal voltage Vpix
`and
`predetermined Light generation drive current flows to the low
`
`voltage Vss via the Pch transistor Tr112 and the organic EL devices
`
`OELfrom the ground potential Vgnd. Thus, the organic EL devices
`
`OEL perform luminescent operation by the luminosity gradation
`
`15
`
`according to the above-mentioned display data. Subsequently,
`
`when a low-level scanning signal Vsel is applied to the scanning
`
`lines SL and the display pixels are set to a non-selection state,
`
`the Nch transistor Tr1ll performs an “OFF” operation. Although
`
`the data lines DL and the light generation driver circuit DP1l
`
`20
`
`are electrically blocked out,
`
`the voltage applied to the gate
`
`terminal of Pch transistor Tr112 is stored by the capacitor CP1
`
`(parasitic capacitance) and one frame periods are performed.
`
`Additionally, the configuration shown in FIG. 15B comprises
`
`a current application method which is constituted with the light
`
`25
`
`generation circuit DP2 comprising an Nch transistor Tr1l21, Pch
`
`transistors Tr122 to Trl124, a capacitor CP2 and the organic EL
`
`Petitioner Samsung Ex. 1009 - Page 6 of 94
`
`Petitioner Samsung Ex. 1009 - Page 6 of 94
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`

`

`WO 2004/086347
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`PCT/JP2004/004041
`
`devices OBL. The light generation circuit DP2 comprises the Nch
`
`transistor Tr121 gate is connected to first scanning lines SL1,
`
`along with the source terminal and drain terminal each other
`
`connected to the data lines DL and the contact N121 near the
`
`intersecting point of the first and second scanning lines SL1
`
`and SL2 arranged in parallel to each other and the data lines
`
`DL; the Pch transistor Tr122 gate terminal is connected to the
`
`second scanning lines SL2, along with the source terminal and
`
`drain terminal each other connected to the contact N121 andcontact
`
`10
`
`Ni22;
`
`the Pch transistor Tr123 gate terminal is connected to
`
`the contact N122; along with the drain terminal each other
`
`connected to the contact N121 and the high voltage Vdd applied
`to the source terminal; the Pch transistor Tr124 gate terminal
`
`is connected to the contact N122 and the high voltage Vdd is
`
`15
`
`applied to the source terminal; the capacitor CP2 is connected
`
`between the gate-source of the Pch transistors Tr123 and Tri24;
`
`and the organic EL devices OEL in which the anode terminal is
`
`connected to the drain terminal of Pch transistor Trl24 and the
`
`ground potential is applied to the cathode terminal.
`In this configuration, the gradation current Ipix according
`
`20
`
`to the display data is applied to the data lines DL. When the
`high-level scanning signal Vseli to the scanning lines SL1 and
`the low-level scanning signal Vsel2 to the scanning lines ShL2
`
`are each other applied and the display pixels are set to the
`
`25
`
`selection state, the transistors Tr121 and Tr122 in the light
`
`generation driver circuit DP2 perform an “ON” operation. While
`
`Petitioner Samsung Ex. 1009 - Page 7 of 94
`
`Petitioner Samsung Ex. 1009 - Page 7 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`the gradation current Ipix according to the display data applied
`
`to the data lines DL is taken in at the contact N122 via the
`
`transistors Tr121 and Tr122, the current level of this gradation
`
`current Ipixis converted to the voltage level by the Pch transistor
`
`Trl23 and predetermined voltage is generated between the
`
`gate-source. Subsequently, when the high-level scanning signal
`
`Vsel2 is applied to the scanning lines SL2, the Pch transistor
`
`Tr122 performs an “OFF” operation. Thevoltage generated between
`
`the gate-source of the Pch transistor Trl23 is stored by the
`
`10
`
`capacitor CP2 (parasitic capacitance). Next, when the low-level
`scanning signal Vsell is applied to the scanning lines SLI, the
`
`Nch transistor Tr121 performs an “OFF” operation. The data lines
`
`DL and the light generation driver circuit DP2 are electrically
`blocked out and the Pch transistor performs an “ON” operation
`
`15
`
`according to the electric potential difference based on the
`
`voltage stored inthe above-mentioned capacitorCP2. Asaresult,
`
`predetermined light generation drive current from the high power
`
`supply voltage Vdd flows to ground potential via the Pchtransistor
`
`Tr124 and the organic EL devices OEL, which is controlled so
`
`20
`
`that the organic EL devices OEL emit light by the luminosity
`
`gradation according to the display data and one frame periods
`are performed.
`|
`
`Although the pixel driver circuit of the current application
`
`method as shown in the above-mentioned FIG. 15B has the advantage
`
`25
`
`of not be being easily influenced by the effects of fluctuation
`
`ox varying operating characteristics of each of the Thin-Film
`
`Petitioner Samsung Ex. 1009 - Page 8 of 94
`
`Petitioner Samsung Ex. 1009 - Page 8 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`‘Transistors in the light generation driver circuit as opposed
`
`to the voltage application method as shown in FIG. 15A,
`
`there
`
`is an inherent problem with regard to writing gradation currents
`
`to each of the display pixels at the time of low gradation with
`
`comparatively low luminosity.
`
`Accordingly, although it is necessary to supply and write-in
`
`gradation current to each of the display pixels which has a
`
`relatively low current value at the time of low luminosity
`
`gradation, the operation which writes in gradation currents in
`
`10
`
`the display pixels is equivalent
`
`to charging the capacity
`
`component, such as the wiring capacitor and the like, which is
`
`parasitic onthe datalines topredeterminedvoltage. Forexample,
`
`in the case where the wire length of the data lines is designed
`to be lengthened by enlargement of the display panel and the
`
`15
`
`like, or the number of scanning lines are increased and high
`
`resolution is performed. Therefore, when the selection period
`
`of each of the scanning lines is set briefly to the extent that
`
`the current value of the gradation currents becomes low,
`
`the
`
`charging time period of the data lines requires more time and
`
`20
`
`the time period required for the write-in operation to the display
`
`pixels becomes longer. Furthermore, by using the write-in time
`
`set beforehand,
`
`the pixels become written insufficiently and
`
`luminosity differences occur within the display panel.
`
`FIG.
`
`16 is the simulation results for illustrating the
`
`29
`
`influence of the write-in characteristics on the display data
`
`in various types of display panels.
`
`Petitioner Samsung Ex. 1009 - Page 9 of 94
`
`Petitioner Samsung Ex. 1009 - Page 9 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`FIG. 17 is the simulation results for illustrating the
`
`influence of the write-in characteristics on the wiring capacitor
`
`in various types of display panels.
`
`Here,
`
`the simulation results shown in FIGS.
`
`16 and 17,
`
`illustrated in FIG. 16 as Sa~Se, the size, the number of pixels
`
`and the like of the display panels, as well as the write-in rate
`
`of
`
`the display data in five types of displays which have
`
`respectively different specifications are shown.
`The inclination of the write-in rate of the display data
`
`10
`
`in low gradation drops significantly and the resultant write-in
`
`deficiency is shown as the display panel is enlarged the number
`of display pixels increases.
`In FIG. 16 as illustrated in each
`
`of the characteristic curves Sa-Se,
`
`shown is the correlation
`
`of the write-in rate to the gradation (write-in gradation) of
`
`15
`
`the display data.
`In addition,
`
`the inclination of the write-in rate of the
`
`display data drops significantly and the resultant write-in
`
`deficiency is shown as the display panel is enlarged the wire
`length of the data lines becomes longer and the distance from
`
`20
`
`the data driver becomes lengthier.
`
`In FIG. 17 as illustrated
`
`in each of
`
`the characteristic curves Sa~Se,
`
`shown is the
`
`correlation of the write-in rate to the arrangement position
`
`of the display pixels on the display panel.
`
`25
`
`The present
`
`invention has been made
`
`in view of
`
`the
`
`Disclosure of the Invention
`
`Petitioner Samsung Ex. 1009 - Page 10 of 94
`
`Petitioner Samsung Ex. 1009 - Page 10 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`circumstances mentioned above. Accordingly, it is the primary
`
`object of the present invention to provide a drive device which
`drives a display panel comprising a plurality of display pixels
`
`which have current drive type display devices and set toa display
`
`device comprising this drive device which displays desired image
`information, as well as at the time of the write-in operation
`
`of the display data to the display pixels, deterioration of the
`
`display image quality due to write-in deficiency can be controlled.
`
`Thus,
`
`the present
`
`invention has
`
`an advantage to acquire
`
`10
`
`satisfactory display image quality relative tohigher resolutions
`
`and enlargement of the display panel.
`
`The driver circuit in the present invention for acquiring
`
`the above-mentioned advantage comprises at least a display panel
`
`having a plurality of display pixels comprising at least a pixel
`
`15
`
`selection circuit for setting simultaneously to the selection
`
`state the plurality of the display pixels which are arranged
`
`in a plurality of rows; a current generation circuit in which
`
`gradation signals that provide the display gradation of each
`
`of the display pixels are supplied and for generating signal
`
`20
`
`currents having a current value according to the value of the
`
`gradation signals; and a plurality of current holding circuits
`
`in which the signal currents are supplied and which take in and
`
`hold the signal currents corresponding to the plurality of display
`
`pixels which are set to the selection state by the pixel selection
`
`25
`
`circuit and for outputting simultaneously the gradation currents
`
`to each of the display pixels in the plurality rows based on
`
`Petitioner Samsung Ex. 1009 - Page 11 of 94
`
`Petitioner Samsung Ex. 1009 - Page 11 of 94
`
`

`

`WO 2004/086347
`
`PCT/JP2004/004041
`
`the signal currents.
`
`The current generation circuit comprises a means which
`
`outputs sequentially the signal currents as time series data
`
`to the current holding circuits corresponding to the plurality
`
`of display pixels of coinciding columns in the signal currents
`
`corresponding to the display pixels of the plurality of rows
`
`set to the selection state by the pixel selection circuit.
`
`Additionally,
`
`the current holding circuits have a first
`
`timing operation which holds the voltage component corresponding
`
`10
`
`to the signal currents outputted from the current generation
`
`circuit; anda second timing operation which outputs the currents
`
`corresponding to the voltage component as the gradationcurrents.
`The plurality of current holding circuit comprise a means which
`
`takes
`
`in sequentially a plurality of
`
`signal
`
`currents
`
`15
`
`corresponding to the plurality of display pixels of each column
`
`of a plurality of rows set to the selection state according to
`
`the time series timing of the signal currents and gradation
`
`outputted
`are
`currents
`the Signal
`on
`currents. based
`simultaneously to each of the plurality of display pixels for
`
`20
`
`every column of the plurality of display pixels of the plurality
`
`of rows set to the selection state by the pixel selection circuit.
`
`Each of the plurality of current storage circuits comprises a
`
`pair of current storage sections arranged in parallel and are
`controlled to perform simultaneously in parallel an operation
`
`25
`
`which takes in and holds the signal currents outputted to one
`
`side of the current storage sections from the current generation
`
`10
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`Petitioner Samsung Ex. 1009 - Page 12 of 94
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`WO 2004/086347
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`PCT/JP2004/004041
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`circuit; and an operation which supplies the gradation currents
`
`to the data lines based on the signal currents held in the other
`
`side of the current storage sections.
`
`The current storage
`
`sections comprise voltage component holding sections which take
`
`in the signal currents outputted from the current generation
`
`circuit and held as the voltage component corresponding to the
`
`current value of the signal currents, for example, consists of
`
`a capacitative element.
`
`The display device in the present invention for acquiring
`
`10
`
`the above-mentioned advantage comprises at least a display panel
`comprising a plurality of scanning lines arranged in rows and
`
`a plurality of data lines arranged in columns, and a plurality
`of display pixels arranged in matrix form near the intersecting
`points of the plurality of scanning lines and data lines;
`a
`
`15
`
`scanning driver circuit which selects simultaneously some of
`
`a plurality of scanning lines of the plurality of scanning lines
`
`of the display panel; a signal driver circuit comprises a current
`generation circuit in which the display data that provides the
`display gradation of each of the display pixels is supplied and
`
`20
`
`which generates signal currents having a current. value according
`
`to the value of the display data; and a plurality of current
`
`holding circuits in which the signal currents are supplied and
`
`which take in and hold the signal currents corresponding to the
`
`display pixels of a plurality of rows selected by the scanning
`
`25
`
`driver circuit and outputs simultaneously the gradation currents
`
`to each of the plurality of display pixels in the plurality of
`
`11
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`Petitioner Samsung Ex. 1009 - Page 13 of 94
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`Petitioner Samsung Ex. 1009 - Page 13 of 94
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`WO 2004/086347
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`PCT/JP2004/004041
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`scanning lines based on the signal currents.
`
`The display panel comprising a plurality of scanning line
`
`groups which constitute sets of the plurality of scanning lines
`
`through which simultaneous selectionis performed by the scanning
`
`Griver circuit: a plurality of scanning signal lines which are
`
`connected to each of the plurality of scanning line groups; and
`
`a plurality of data line groups which constitute sets of the
`
`Plurality of data lines corresponding to the line count of the
`
`display pixels of the plurality of rows connected to each of
`
`10
`
`the scanning line groups within the plurality of data lines.
`
`The scanning driver circuit sequentially applies the scanning
`Signal to each of the plurality of scanning signal lines. The
`
`plurality of display pixels are a herein the scanning driver
`
`circuit sequentially applies the scanning signal to each of the
`
`15
`
`each
`arranged near
`lines
`scanning signal
`plurality of
`intersecting points of each of the scanning lines and each of
`
`the data line groups. The data line groups are arrangedwithin
`
`each area between the sequences of each other of the display
`
`pixels arranged in the display panel.
`
`20
`
`The current generation circuit comprises a means which
`
`generates and outputs the signal currents supplied to the current
`
`holding circuits as time series data corresponding to the
`
`plurality of display pixels connected to each of the plurality
`
`of data lines of each of the data line groups.
`
`29
`
`Furthermore,
`
`the plurality of current holding circuits
`
`comprises a first timing operation which holds the voltage
`
`12
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`Petitioner Samsung Ex. 1009 - Page 14 of 94
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`Petitioner Samsung Ex. 1009 - Page 14 of 94
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`WO 2004/086347
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`PCT/JP2004/004041
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`component corresponding to the signal currents and outputs from
`the current generation circuit, and a second timing operation
`which outputs currents corresponding to the voltage component
`
`as the gradation currents. The plurality of current holding
`
`circuits comprise a means which takes in sequentially a plurality
`
`of signal currents corresponding toa plurality of display pixels
`connected to a pluralityof data lines of each of the data line
`
`groups according to time series timing of the signal currents,
`
`and the gradation currents based on the signal currents are
`supplied simultaneously to a plurality of data lines of each
`
`‘10
`
`of the data line groups. Each these plurality of current holding
`
`circuits comprises a pair of current storage sections arranged
`in parallel and are controlled to perform simultaneously in
`parallel an operation which takes in and holds the signal currents
`
`15
`
`outputted from the current generation circuit to one side of
`
`the current storage sections; and an operation which supplies
`
`the gradation currents basedon the signal currents heldin the
`
`' other side of the current storage sections to the data lines.
`
`The current storage sections comprise a voltage component holding
`
`20
`
`sections which take in the signal currents outputted from the
`
`current generation circuit and hold the voltage component
`
`corresponding to the current value of the signal currents, for
`
`example, consists of a capacitative element.
`
`Furthermore, the display pixels comprise the pixel driver
`
`25
`
`circuit which generates drive currents having a current value
`
`based on the gradation currents; and current control type display
`
`13
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`Petitioner Samsung Ex. 1009 - Page 15 of 94
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`WO 2004/086347
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`PCT/JP2004/004041
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`devices which operate by the display luminosity based on the
`
`current value of the drive currents. The display devices have
`
`light emitting devices which perform luminescent operation by
`
`the luminescent luminosity based on the current value of the
`
`drive currents. For example,
`
`the light emitting devices are
`
`composed of organic electroluminescent devices. The organic
`
`electroluminescent
`
`devices,
`
`for
`
`example,
`
`are
`
`provided
`
`distributed in the entire surface side of the substrate in which
`
`the scanning lines and the data lines are provided and have a
`
`10
`
`top emission structure which emits the light radiated by the
`
`luminescent operation in the opposite direction of the substrate.
`
`The drivemethod of the display device in the present invention
`
`for acquiring the above-mentioned advantage
`
`comprises
`
`a
`
`configuration in which the display data is supplied by the signal
`
`15
`
`driver circuit that provides the display gradation of each of
`
`the display pixels and the signal currents are generated which
`
`have a current value according to the value of the display data;
`
`the signal currents are taken in sequentially and held as the
`
`signal currents corresponding to the display pixels of the
`
`20
`
`plurality of rows selected by the scanning driver circuit; the
`
`gradation currents are outputted simultaneously to each of the
`
`display pixels of the plurality of rows connected to the plurality
`
`of scanning lines based on the signal currents; the plurality
`
`of scanning lines are selected simultaneously by the scanning
`
`25
`
`driver circuit and the gradation currents are written in the
`
`plurality of display pixels; and the plurality of display pixels
`
`14
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`Petitioner Samsung Ex. 1009 - Page 16 of 94
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`WO 2004/086347
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`PCT/JP2004/004041
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`inwhich the gradation currents were written operate by the display
`
`luminosity based on the current value of the gradation currents.
`
`The
`
`signal currents are generated as
`
`time
`
`series data
`
`corresponding to the display pixels of the plurality of rows
`
`selected by the scanning driver circuit wherein the taking in
`of the signal currents are taken in sequentially as a plurality
`
`of signal currents corresponding to the display pixels of the
`
`plurality of rows according to the time series timing of the
`
`signal currents. Additionally,
`
`the taking in as the signal
`
`10
`
`currents for each of the display pixels signal currents and
`
`outputting of the gradation currents are performed simultaneously
`
`in parallel based on the signal currents.
`
`The above and further objects andnovel features of the present
`invention will more fully appearfrom the following detailed
`
`15
`
`description when the same is read in conjunction with the
`
`accompanying drawings.
`
`Itistobeexpressly understood, however,
`
`that the drawings are for the purpose of illustration only and
`
`are not intended as a definition of the limits of the invention.
`
`Brief Description of the Drawings
`
`20
`
`FIG.
`
`1
`
`is an outline block diagram showing the basic
`
`configuration of the display device related to this invention;
`
`FIG.
`
`2 is an outline block diagram showing an example of
`
`the principal parts of
`
`the display device related to this
`
`invention;
`
`25
`
`FIG.
`
`3 is a block diagram showing the current generation
`
`15
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`Petitioner Samsung Ex. 1009 - Page 17 of 94
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`Petitioner Samsung Ex. 1009 - Page 17 of 94
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`circuit applicable to the datadriver of the display device related
`
`to this invention;
`
`FIG. 4 is a circuit configuration drawing shown an example
`
`of the voltage current conversion and the gradation currents
`
`drawing-in circuit applicable to the data driver of the display
`
`device related to this invention;
`
`FIG. 5 is an outline block diagram showing an example of
`
`the current holding circuits applicable to the data driver of
`
`the display device related to this invention;
`
`10
`
`FIG. 6 is a circuit configuration drawing showing an example
`
`of the current storage sections applicable to the embodiment;
`
`FIGs. 7A and 7B are conceptual diagrams showing the basic
`
`operation of the current storage sections applicable to the
`
`embodiment;
`
`15
`
`FIG. 8 is a timing chart explaining the drive method in the
`
`display device related to the embodiment;
`
`FIG. 9 is the simulation results for explaining the write-in
`
`characteristics of the display data in the display device related
`
`_to the embodiment;
`FIG. 10 is acircuit configuration diagram showing an example
`
`20
`
`of an illustrative circuit of the display pixels applicable to
`
`the display device related to this invention;
`
`FIGs. 11A and 11B are operational conceptual diagrams for
`
`explaining the drive control operation of the pixel driver circuit
`
`25
`
`related to the embodiment;
`
`FIG. 12 is a timing chart showing the display drive operation
`
`16
`
`Petitioner Samsung Ex. 1009 - Page 18 of 94
`
`Petitione