(12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY(PCT)
`
`(19) World Intellectual Property
`Organization
`International Bureau
`
`13 May 2004 (13.05.2004)
`
`(43) International Publication Date
`
`(10) International Publication Number
`WO 2004/040543 A2
`
`(51) International Patent Classification’:
`
`G09G 3/32
`
`(21) International Application Number:
`PCT/JP2003/013819
`
`(22) InternationalFiling Date: 29 October 2003 (29.10.2003)
`
`(25) Filing Language:
`
`(26) Publication Language:
`
`English
`
`English
`
`(30) Priority Data:
`2002-317225
`
`31 October 2002 (31.10.2002)
`
`2003-10387 1
`2003-170376
`
`8 April 2003 (08.04.2003)
`16 June 2003 (16.06.2003)
`
`JP
`
`JP
`JP
`
`(71) Applicant (for all designated States except US): CA-
`SIO COMPUTER CO., LTD. [JP/JP]; 6-2, Honmachi
`1-chome, Shibuya-ku, Tokyo 151-0071 (JP).
`
`(72) Inventors; and
`(75) Inventors/Applicants (for US only): MOROSAWA,
`
`Katsuhiko [JP/JP]; 375-2-6, Kamikitadai 3-chome, Hi-
`gashiyamato-shi, Tokyo 207-0023 (JP). SHIRASAKI,
`‘Tomoyuki
`[JP/JP];
`1425-3-234,
`Sakuragaoka, Hi-
`gashiyamato-shi, Tokyo 207-0022 (JP).
`
`(74) Agent: KASHIMA, Hidemi, 5-4-18, Ozenji Nishi,
`Asao-ku, Kawasaki-shi, Kanagawa 215-0017 (JP).
`(g1) Designated States (national): AE, AG, AL, AM,AT, AU,
`AZ,BA, BB, BG, BR, BY, BZ, CA, CH, CN, CO, CR, CU,
`CZ. DE, DK, DM,DZ,EC, EE,ES, FI, GB, GD, GE, GH,
`GM, HR, HU, ID, IL, IN, IS, KE, KG, KP, KR, KZ, LC,
`LK,LR,LS, LT, LU, LV, MA, MD, MG, MK,MN, MW,
`MX, MZ, NI, NO, NZ, OM, PG, PH, PL, PT, RO, RU, SC,
`
`UG, US, UZ, VC, VN, YU, ZA, ZM, ZW.
`
`(84) Designated States (regional): ARIPO patent (GH, GM,
`KE, LS, MW, MZ, SD, SL, SZ, TZ, UG, ZM, ZW),
`Eurasian patent (AM, AZ, BY, KG, KZ, MD, RU,TJ, TM),
`European patent (AT, BE, BG, CH, CY, CZ, DE, DK, EE,
`ES, FI, FR, GB, GR, HU,IE, IT, LU, MC, NL, PT, RO,
`SE, SI, SK, TR), OAPI patent (BF, BJ, CF, CG, CI, CM,
`GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG).
`
`[Continued on next page]
`
`(54) Title: DISPLAY DEVICE AND METHOD FOR DRIVING DISPLAY DEVICE
`
`TIMING
`SIGNAL
`
`100A
`
`VIDEO
`DISPLAY
`
`
`VOLTAGE
`signaL
`|ay
`CONTROL
`
`GENERATION
`SIGNAL
`
`
`130A
`
`DATA
`CONTROL
`SIGNAL
`
`SCANNING
`CONTROL
`SIGNAL
`
`
`120A
`
`=
`|
`-
`7 DRIVER
`{
`|_|
`|
`
`SCANNING
`
`
`
`
`
`
`
`DISELAY
`
`160
`DATA
`
`140
`
`
`
`=
`|
`-
`VOLTAGE-
`mn
`|
`|
`
`PEEEELTETy
`
`DISPLAY PANEL
`
`110A
`
`
`
`2004/040543A2|IBVIMNNIMUINNIITINITNEMTATMAEMUAMAT
`
`
`
`
`
`© (57) Abstract: A display device that displays image information in responseto a display signal consisting of digital signals includes
`s a display panel comprising a plurality of signal lines (DL) and a plurality of scanning lines (SL) which intersectat right angles with
`
`each other, and a plurality of display pixels (EM)sith optical emlem
`
`Petitioner Samsung Ex. 1008 - Page 1 of 245
`
`Petitioner Samsung Ex. 1008 - Page 1 of 245
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`

`

`WO 2004/040543 A2
`
`_|IMNIMININIMTAIANINNTTITMAUTTTENAITAIL IN TMNT
`
`ES, FI, FR, GB, GR, HU, LE, IT, LU, MC, NL, PT, RO, SE,
`Declarations under Rule 4.17:
`SI, SK, TR), OAPI patent (BF, BJ, CF, CG, CI, CM, GA, GN,
`— as to applicant’s entitlement to apply for and be granted
`GO, GW, ML, MR, NE, SN, TD, TG)
`a patent (Rule 4.17/(ii)) for the following designations AE,
`AG, AL, AM,AT, AU, AZ, BA, BB, BG, BR, BY, BZ, CA, CH, —_of inventorship (Rule 4.17(iv)) for US only
`CN, CO, CR, CU, CZ, DE, DK, DM, DZ, EC, EE, ES, FI,
`GB, GD, GE, GI, GM, HR, HU, ID, IL, IN, IS, KE, KG,
`KP. KR, KZ, LC, LK, LR, LS, LT, LU, LV, MA, MD, MG,
`MK, MN, MW, MX, MZ, NI, NO, NZ, OM, PG, PH, PL, PT,
`RO, RU, SC, SD, SE, SG, SK, SL, SY, TJ, TM, TN, TR, TT,
`TZ, UA, UG, UZ, VC, VN, YU, ZA, ZM, ZW, ARIPO patent
`For two-letter codes and other abbreviations, refer to the "Guid-
`(GH, GM, KE, LS, MW, MZ, SD, SL, SZ, TZ, UG, ZM, ZW),
`ance Notes on Codes and Abbreviations"appearing at the begin-
`Eurasian patent (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM),
`European patent (AT, BE, BG, CH, CY, CZ, DE, DK, EE,_ning of each regularissue of the PCT Gazette.
`
`— without international search report and to be republished
`upon receipt of that report
`
`Published:
`
`Petitioner Samsung Ex. 1008 - Page 2 of 245
`
`Petitioner Samsung Ex. 1008 - Page 2 of 245
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`

`

`WO 2004/040543
`
`PCT/JP2003/013819
`
`DISPLAY DEVICE AND METHOD FOR DRIVING DISPLAY DEVICE
`
`DESCRIPTION
`
`BACKGROUND OF THE INVENTION
`
`This invention relates to a display device which
`
`displays desired image information on a display panel comprising
`
`aplurality of display pixels whichhave current drive type optical
`
`elements, and more particularly regarding a display device and
`
`the method for driving the display device.
`
`Inrecent years, personal computer and visual equipment
`monitors with an electronic screen called a Cathode Ray Tube
`
`10
`
`(CRT) are fast becoming obsolete with the emergence of flat panel
`
`display devices, such as Liquid Crystal Display (LCD) flat panel
`
`monitors, at an astonishing rate.
`
`In particular, LCD’s are
`
`commonplace because they offer some real advantages over other
`
`15
`
`display technologies. They are thinner, lighter and draw much
`
`less power than conventional CRT’s. LCD's are all around us
`
`everyday as they come in all shapes and sizes ranging from large
`
`screen televisions to small laptop computers and Personal Digital
`
`Assistants (PDA's), and even smaller cellular phones, digital
`
`20
`
`cameras and many other electronic devices.
`
`As the display device (display) of the next generation
`
`following in this revolutionary LCD technology, such as organic
`
`electroluminescent
`
`(EL) devices (hereinafter referred to as
`
`organic EL devices),
`
`inorganic electroluminescent elements
`
`25
`
`(hereinafter referred to as inorganic EL elements), or Light
`Emitting Diodes (LEDs) and the like, full-scale application of
`
`Petitioner Samsung Ex. 1008 - Page 3 of 245
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`Petitioner Samsung Ex. 1008 - Page 3 of 245
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`

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`WO2004/040543
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`PCT/JP2003/013819
`
`the self-light type display (display device) comprising a display
`
`panel configured with self-light type light emitting elements
`
`calledactivematrixisevolving. Specifically, anactivematrix
`
`is a type of LCD where each display element (each pixel) includes
`
`an active component such as a transistor to maintain its state
`
`between scans, and is also known as Thin-Film Transistor or TFT.
`
`In such a self-light generation display, notably, a
`
`self-light type display which applies an active matrix drive
`
`method as compared with LCD’s,
`
`the display speed response is
`
`10
`
`fast withanunrestrictedviewingangle. Also, higher luminosity,
`
`higher contrast, high definition display panels with much lower
`
`power consumption and the like are inevitable in the future.
`
`Since backlight is not needed in such an LCD display, it has
`
`very predominant characteristics that still more thinly shaped
`
`15
`
`and lightweight models are possible.
`
`This particular type of display panel, briefly, is
`
`comprises an array of display pixels which contain light emitting
`
`elements arranged near each of the intersecting points of the
`
`signal lines and in the direction of the scanning lines set in
`
`20
`
`the
`
`line writing direction;
`
`a
`
`scanning driver applies
`
`sequentially scanning signals to predetermined timing and sets
`
`the display pixels of a specified line in a selection state;
`
`and a data driver generates write-in current (drive current )
`
`according to the display data which is supplied to each of the
`
`25
`
`display pixels via signal lines andthe above-mentioned write-in
`
`current is supplied to each of the display pixels. Fach of the
`
`Petitioner Samsung Ex. 1008 - Page 4 of 245
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`Petitioner Samsung Ex. 1008 - Page 4 of 245
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`

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`WO2004/040543
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`PCT/JP2003/013819
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`light emitting elements performs a light generation operation
`
`by predetermined luminosity gradation according to the display
`
`data, and the desired image information is displayed on the display
`
`panel. Afterwards, the configuration of aself-light generation
`
`type display will be described.
`
`In the display drive operation of such a display,
`
`individual write-in currents are generated which have a current
`
`value according to the display data from the data driver to a
`
`plurality of display pixels and supplied simultaneously to the
`
`10
`
`display pixels of aspecified line selected by the scanning driver.
`
`This is in contrast to a current specification type drive method
`
`which repeats successively an operation to make each light
`
`emitting element emit light by predetermined luminosity gradation
`
`for each line of one screen and the display pixels of a specified
`
`15
`
`line selected by a scanning driver. A Pulse Width Modulation
`
`(PWM) type drive method and the like which repeats successively
`
`for one screen an operation which supplies constant drive current
`
`of a constant value from the data driver, individual time width
`
`(signal width) according to the display data, and makes each
`
`20
`
`of the Light emitting elements emit
`
`light by predetermined
`
`luminosity gradation is commonly known.
`
`However,
`
`there is a problem in the light emitting
`
`element type display mentioned above and the fact they do suffer
`
`from this drawback will be explained below.
`
`25
`
`Specifically, the data driver generates the write-in
`
`current according to the display data corresponding to each of
`
`Petitioner Samsung Ex. 1008 - Page 5 of 245
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`Petitioner Samsung Ex. 1008 - Page 5 of 245
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`

`

`WO2004/040543
`
`PCT/JP2003/013819
`
`the display pixels and the above-mentioned write-in current
`
`changes according to the display data in a conventional
`
`configuration anda conventional drive controlling method, which
`
`are supplied to the display pixels via each of the signal lines
`
`connected to an output terminal of the data driver. Thus,
`
`the
`
`current supplied to a circuit arrangement of transistors, latch
`
`circuits and the like which are individually formed in the data
`
`driver corresponding to each of
`
`the signal
`
`lines from a
`
`predetermined current source will also change. Here, generally
`
`10
`
`a capacitative element (wiring capacity) exists in the signal
`
`wiring. Consequently, current supplied from the above-mentioned
`
`current source to the data driver, when suppliedto the circuit
`
`arrangement via the signal wiring for current supply,
`
`the
`
`operation which alters the current supplied from the current
`
`15
`
`source is equivalent to the charge or discharging of predetermined
`
`electric potential in parasitic capacitance which exists in the
`
`signal wiring. As a result, when the current supplied via the
`
`signal wiring is extremely low, the charge and discharge operation
`
`of the signal wiring for current supply takes time, and by the
`
`20
`
`time the electric potential of the signal lines are stabilized,
`
`a relatively lengthy period will be required.
`
`On the other hand, the operational period assigned to
`
`a current holding operation and the like in each of the signal
`
`lines becomes brief and attains high-speed operation essential
`
`25
`
`in the data driver so the number of signal lines increases in
`
`proportion to the buildup of the number of display pixels of
`
`Petitioner Samsung Ex. 1008 - Page 6 of 245
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`Petitioner Samsung Ex. 1008 - Page 6 of 245
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`

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`WO2004/040543
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`PCT/JP2003/013819
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`the display panel.
`
`However, as mentioned above, the charge and discharge
`
`operation of the current supply in the signal wiring requires
`
`a certain amount of time, particularly; the current value of
`
`the write-in current supplied via the signal lines to the display
`
`panel in connection with miniaturization of the display panel
`
`or high definition (high resolution) and the like becomes low.
`
`It has disadvantages in the amount of time required in the charge
`
`and discharge operation of the signal wiring increases, rate
`
`10
`
`controlling of the operating speed of data driver due to the
`
`rate of the charge and discharge operation has to be performed
`
`and achieving favorable image quality becomes difficult.
`
`Additionally,
`
`display
`
`devices
`
`comprising
`
`a
`
`conventional data driver are configuredso the write-in current
`
`15
`
`is generated according to the display data by the data driver
`
`and supplied to the display pixels viaeachsignalline. However,
`
`because the write-in current is an analog signal which changes
`
`according to the light generation state of the light emitting
`
`elements, the signal is easily influenced by external noise or
`
`20
`
`signal degradation which produces a decline or change in the
`
`light generation luminosity inthe light emittingelements. This
`
`problem makes it difficult to obtain a stable image display in
`
`suitable Luminousity gradation.
`
`25
`
`SUMMARY OF THE INVENTION
`
`The present invention has been made in view of the
`
`Petitioner Samsung Ex. 1008 - Page 7 of 245
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`Petitioner Samsung Ex. 1008 - Page 7 of 245
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`

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`WO2004/040543
`
`PCT/JP2003/013819
`
`circumstances mentioned above.
`
`Accordingly,
`
`the present
`
`invention has an advantage to provide a display device which
`
`displays image information in response to a display signal on
`
`a display panel which has display pixels that have current drive
`
`type optical elements to enhance the operating speed with regard
`
`to generation of drive current in response to the display signals
`
`supplied to the optical elements, even in the case of reduced
`
`drive current during periods of low gradation;
`
`to reduce the
`
`amount of time required for generation of the drive current;
`
`10
`
`and to improve the display response characteristics with the
`
`resultant effect to achieve favorable display image quality.
`
`To achieve the foregoing advantage, the first display
`
`device in the present invention comprises a display panel with
`
`a plurality of signal lines and a plurality of scanning lines
`
`15
`
`which intersect at right angles with each other, anda plurality
`
`of display pixels with optical elements arranged near the
`
`intersecting point of the plurality of signal lines and the
`
`plurality of scanning lines; a scanning driver circuit for
`
`sequentially applying a scanning signal to each of the scanning
`
`20
`
`lines for setting the selective state of each line of each display
`
`pixel; andasignal driver circuit comprises a plurality of current
`
`generation circuits; the current generation circuits comprise
`
`at least agradation current generation circuit anda drive current
`
`generation circuit; the gradation current generation circuit
`
`25
`
`generates a plurality of gradation currents corresponding to
`
`each of the display signal bits based on constant, predetermined
`
`Petitioner Samsung Ex. 1008 - Page 8 of 245
`
`Petitioner Samsung Ex. 1008 - Page 8 of 245
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`

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`WO2004/040543
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`PCT/JP2003/013819
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`reference current, and the drive current generation circuit
`
`generates drive current from a plurality of gradation currents
`
`based on the value of the display signals which supplies the
`
`generated drive current to each signal line.
`
`According to the display device of this invention, each
`
`of the current generation circuits in the above-mentioned signal
`
`drive circuit further comprise a signal holding circuit which
`
`takes in and holds the display signal; selects and integrates
`
`the gradation currents according each bit value of the display
`
`10
`
`signal from the plurality of gradation currents based on a value
`
`of the signals held in the signal holding circuit and generates
`
`drive current.
`
`According to the present invention, each of the current
`
`generation circuits generate a plurality of gradation currents
`
`15
`
`which comprises a plurality of gradation current transistors,
`
`wherein the channel width of each the gradation current
`
`transistors is set ata different ratio with each other specified
`
`by 2n. Each control terminal thereof is connected in parallel
`
`and the gradation currents flow in the current path of each of
`
`20
`
`the gradation current transistors. Furthermore, each of the
`
`gradation current generation circuits comprise a reference
`
`voltage generation circuit for generating reference voltage based
`
`on the reference current.
`
`The reference voltage generation
`
`circuits comprise reference current transistors for generating
`
`25
`
`reference voltage to the control terminals, and the reference
`
`current is supplied to the current path. The reference current
`
`Petitioner Samsung Ex. 1008 - Page 9 of 245
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`Petitioner Samsung Ex. 1008 - Page 9 of 245
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`

`

`WO2004/040543
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`PCT/JP2003/013819
`
`transistor control terminals are connected in common to the
`
`control terminals of aplurality of gradation current transistors.
`
`The reference current transistors and the plurality of gradation
`
`current transistors constitute a current mirror circuit.
`
`In addition, according to the present invention, the
`
`Signal driver circuit comprises a configuration in which the
`
`reference current is supplied toa plurality of gradation current
`
`generation circuits. The reference current is supplied via a
`
`reference current supply line. Each of the gradation generation
`
`10
`
`circuit comprises
`
`a
`
`supply control
`
`switching circuit
`
`for
`
`controlling the supply state of the reference current from the
`
`reference current supply line to the proper gradation current
`
`generation circuit. The
`
`supply control
`
`switching circuit
`
`synchronizes to timing when taking in and holding the display
`
`15
`
`signals for the signal holding means in each of the current
`
`generation circuits, and selectively performs switching control
`
`so that the reference current is supplied only to any one of
`
`the gradation current circuits of the plurality of gradation
`
`current generation circuits.
`
`20
`
`According to the present invention, each of the current
`generation circuits comprise a specified state setting circuit
`for setting the signal line to a specified voltage which makes
`
`the optical elements drive in a specified operating state when
`
`the display signal has a specified value. The display signal
`
`25
`
`specified value is a value from which all of each of the gradation
`
`currents is non-selectedfromthe displaysignals. The specified
`
`Petitioner Samsung Ex. 1008 - Page 10 of 245
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`Petitioner Samsung Ex. 1008 - Page 10 of 245
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`

`

`WO2004/040543
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`PCT/JP2003/013819
`
`voltage is the voltage for setting the optical elements drive
`
`in a state of lowest gradation.
`
`In addition, according to the present invention, each
`
`of the current generation circuits further comprises a reset
`
`circuit for applying predetermined reset voltage to the signal
`
`lines in advance of the timingwhich supplies the drive current
`
`to the signal lines.
`
`The reset voltage is at least the low
`
`potential voltage for discharging the electric charge stored
`
`up in the capacitative element attached to the optical elements
`
`10
`
`in the display pixels and for initializing the optical elements.
`
`The reset voltage is applied when the display signal specified
`
`value presupposes non-selection of all of the plurality of
`
`gradation currents.
`
`Moreover, according to the present
`
`invention,
`
`the
`
`15
`
`optical elements in the display pixels comprise light emitting
`
`elements for accomplishing light generation operation by way
`
`of luminosity gradation according to the current value of the
`
`supply current. For example, the optical elements have light
`
`emitting elements consisting of organic EL devices. The display
`
`20
`
`pixels comprise at least apixel driver circuit which has avoltage
`
`holding circuit for holding the voltage component in response
`
`to the drive current supplied by the signal driver circuit; and
`
`a current supply circuit for supplying luminescent drive current
`
`to the light emitting elements based on the voltage component
`
`25
`
`held in the voltage holding circuit and for making the light
`
`emitting elements emit
`
`light.
`
`The
`
`current supply circuit
`
`Petitioner Samsung Ex. 1008 - Page 11 of 245
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`Petitioner Samsung Ex. 1008 - Page 11 of 245
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`

`

`WO2004/040543
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`PCT/JP2003/013819
`
`comprises transistors for use of luminescent drive for supplying
`
`luminescent current to the light emitting elements.
`
`To achieve the foregoing advantage, the second display
`
`device in the present invention set to a display device for
`
`displaying image information according to display signals
`
`consisting of digital signals comprises:
`
`(1) a display panel
`
`equippedwitha plurality of display pixels equippedwitha current
`
`generation circuit; the current generation circuit comprises
`
`a plurality of signal lines and a plurality of scanning lines
`
`10
`
`which intersect at right angles with each other; at least optical
`
`elements formed of the current drive type and arranged close
`
`to the intersecting point of a plurality of signal lines and
`
`a plurality of scanning lines; a gradation current generation
`
`circuit
`
`for generating a plurality of gradation currents
`
`15
`
`corresponding to each of
`
`the display signal bits based on
`
`predetermined, constant reference current; a drive current
`
`generation circuit for generating drive current based on the
`
`value of the display signals which supplies the drive current
`
`to the optical elements;
`
`(2) a scanning driver circuit for
`
`20
`
`sequentially applying a scanning signal for setting the selective
`
`state of each line of each scanning line; and (3) asignal driver
`
`circuit for supplying the display signals toa plurality of signal
`
`lines.
`
`According to the present
`
`invention,
`
`the current
`
`25
`
`generation circuit comprises a signal holding circuit which takes
`
`in the display signals and holds the signals based on the value
`
`10
`
`Petitioner Samsung Ex. 1008 - Page 12 of 245
`
`Petitioner Samsung Ex. 1008 - Page 12 of 245
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`

`

`WO2004/040543
`
`PCT/JP2003/013819
`
`of the display signals held in the holding circuit; selects and
`
`integrates the gradation currents according each bit value of
`
`the display signal from the plurality of gradation currents;
`
`and generates drive current.
`
`According to the present invention, According to the
`
`present invention, each of gradation current generation circuits
`
`generate a plurality of gradation currents which comprise a
`
`plurality of gradation current transistors, wherein the channel
`
`width of each of the gradation current transistors are set at
`
`10
`
`a different ratio with each other specified by 2n. Each control
`
`terminal thereof is connected in parallel and the gradation
`
`currents flow in the current path of each of the gradation current
`transistors. Also, each of the gradation current generation
`
`circuits comprise a reference voltage generation circuit for
`
`15
`
`generating reference voltage based on the reference current.
`
`The reference voltage generation circuits comprise reference
`
`current transistors for generating reference voltage to the
`
`control terminals, and the reference current is suppliedto the
`
`current path.
`
`The
`
`reference current
`
`transistor control
`
`20
`
`terminals are connected in common to the control terminals of
`
`a plurality of gradation current transistors. The reference
`
`current
`
`transistors and the plurality of gradation current
`
`transistors constitute a current mirror circuit.
`
`According to the present invention, each of the current
`
`25
`
`generation circuits comprise a specified state setting circuit
`
`for setting the signal line to a specified voltage which makes
`
`11
`
`Petitioner Samsung Ex. 1008 - Page 13 of 245
`
`Petitioner Samsung Ex. 1008 - Page 13 of 245
`
`

`

`WO2004/040543
`
`PCT/JP2003/013819
`
`the optical elements drive in a specified operating state when
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`the display signal has a specified value. The display signal
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`specified value is a value from which all of each of the gradation
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`currents isnon-selectedfromthedisplaysignals. Thespecified
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`voltage is the voltage for setting the optical elements drive
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`in a state of lowest gradation.
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`In addition, according to the present invention, each
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`of the current generation circuits further comprises a reset
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`circuit for applying predetermined reset voltage to the signal
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`10
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`Lines in advance of the timing, which supplies the drive current
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`to the signal lines.
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`The reset voltage is at least the low
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`potential voltage for discharging the electric charge stored
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`up in the capacitative element added in the optical elements
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`in the display pixels and for initializing the optical elements.
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`15
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`The reset voltage is applied when the display signal specified
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`value presupposes non-selection of all of the plurality of
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`gradation currents.
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`According to the present
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`invention,
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`the optical
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`elements in the display pixels comprise light emitting elements
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`20
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`for accomplishing light generation operation by way of luminosity
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`gradation according to the current value of the supply current.
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`For example, the optical elements have light emitting elements
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`consisting of organic EL devices.
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`Additionally, according to the present invention, the
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`25
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`reference current transistors, the gradation current transistors
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`and the light generation drive at least any has a configuration
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`12
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`WO2004/040543
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`PCT/JP2003/013819
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`of transistors comprising a body terminal electrode.
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`The above and further objects and novel features of
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`the present invention will more fully appear from the following
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`detailed description when the same is read in conjunction with
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`the accompanying drawings.
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`It is to be expressly understood,
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`however, that the drawings are for the purpose of illustration
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`only and are not intended as a definition of the limits of the
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`invention.
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`10
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`BRIEF DESCRIPTION OF THE DRAWINGS
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`FIG. 1 is an outline block diagram showing the first
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`embodiment of the current generation circuit inthe display device
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`related to this invention.
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`FIG. 2 is a circuit arrangement drawing showing one
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`15
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`example of the latch circuits applied to the current generation
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`circuit in this embodiment.
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`FIG. 3 is a circuit arrangement drawing showing one
`
`example of the current generation section applied to the current
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`generation circuit in this embodiment.
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`20
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`FIG. 4 is an outline block diagram showing the second
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`embodiment of the current generation circuit inthe display device
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`related to this invention.
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`FIG. 5 is a circuit arrangement drawing showing one
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`example of the current generation section applied to the current
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`25
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`generation circuit in this embodiment.
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`FIG. 6 is an outline block diagram showing the third
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`embodiment of the current generation circuit in the display device
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`related to this invention.
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`FIG. 7 is a circuit arrangement drawing showing an
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`example of the detailed configuration of the logic circuit
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`applicable to the specified state setting section of the current
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`generation circuit in this embodiment.
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`FIG. 8 is an outline block diagram showing the fourth
`
`embodiment of the current generation circuit in the display device
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`related to this invention.
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`10
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`FIG. 9 is a circuit arrangement drawing showing an
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`example of the detailed configuration of
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`the logic circuit
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`applicable to the specified state setting section of the current
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`generation circuit in this embodiment.
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`FIG. 10 is an outline block diagram showing one example
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`15
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`of the current generation section applied to the fifth embodiment
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`of the current generation circuit in the display device related
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`to this invention.
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`FIG. 11 is a drawing showing an example of the detailed
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`circuit of
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`the current generation section of
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`the current
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`20
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`generation circuit in this embodiment.
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`FIG. 12 is an outline block diagram showing another
`
`example of the current generation section applied to the current
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`generation circuit in this embodiment.
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`FIG. 13 is an outline block diagram showing the first
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`25
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`embodiment of the display device related to this invention.
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`FIG. 14 is an outline block diagram showing an example
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`14
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`of the configuration of the display panel applied to the display
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`device related to this embodiment.
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`FIG. 15 is an outline block diagram showing another
`
`example of the configuration of the display device related to
`
`this embodiment.
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`FIG. 16 is a circuit arrangement drawing showing an
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`example of one configuration of
`
`the pixel driver circuit
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`corresponding to the current sinking method applicable to the
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`display device related to this embodiment.
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`FIG. 17 is a circuit arrangement drawing showing the
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`configuration of the first embodiment of the data driver in the
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`display device concerning this invention.
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`FIG. 18 is a timing chart which shows an example of
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`the drive control operation of the data driver in this embodiment.
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`FIG. 19 is a timing chart which shows an example of
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`the drive control operation of
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`the display panel
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`in this
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`embodiment.
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`FIG. 20 is a circuit arrangement drawing showing the
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`configuration of the second embodiment of the data driver in
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`10
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`15
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`20
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`the display device related to this invention.
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`FIG. 21 is a circuit arrangement drawing showing an
`example of one configuration of
`the pixel driver circuit
`
`corresponding to the current application method applicable to
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`the display device in this embodiment.
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`25
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`FIG. 22 is an outline block diagram showing an example
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`of a current generation circuit applied to the third embodiment
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`15
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`of the data driver in the display device concerning this invention.
`
`FIG. 23 is an outline block diagram showing another
`
`example of the current generation circuit applied to the data
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`driver in this embodiment.
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`FIG. 24 is a circuit arrangement drawing showing the
`
`configuration of the fourth embodiment of the data driver in
`
`the display device related to this invention.
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`FIG. 25 is a circuit arrangement drawing showing one
`
`example of the write-in current generation circuit applied to
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`10
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`the data driver in this embodiment.
`
`FIG. 26 is a circuit arrangement drawing showing one
`
`example of the inverted latch circuit applied to the data driver
`
`in this embodiment and the selection setting circuit.
`
`FIG. 27 is a timing chart which shows an example of
`
`15
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`the drive control operation in the data driver of this embodiment.
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`FIG. 28 is a circuit arrangement drawing showing the
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`configuration of the £ifth embodiment of the data driver in the
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`display device related to this invention.
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`FIG. 29 is a circuit arrangement drawing showing one
`
`20
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`example of the write-in current generation circuit applied to
`
`the data driver in this embodiment.
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`FIG. 30 is a circuit arrangement drawing showing the
`
`configuration of the sixth embodiment of the data driver in the
`
`display device related to this invention.
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`25
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`FIG. 31 is a circuit arrangement drawing applicable
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`to the display device in this embodiment showing another example
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`16
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`PCT/JP2003/013819
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`of the configuration of the pixel driver circuit corresponding
`
`to the current application method.
`
`FIG. 32 is a timing chart which shows an example of
`
`the drive control operation in the data driver of this embodiment.
`
`FIG. 33 is a timing chart which shows an example of
`
`the drive control operation of
`
`the display panel
`
`in this
`
`embodiment.
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`FIG. 34 is a circuit arrangement drawing showing a
`
`configuration of the seventh embodiment of the data driver in
`
`10
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`the display device related to this invention.
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`15
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`20
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`FIG. 35 is a circuit arrangement drawing applicable
`
`to the display device in this embodiment showing another example
`
`of the configuration of the pixel driver circuit corresponding
`
`to the current sinking method.
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`FIG. 36 is a circuit arrangement drawing showing the
`
`configuration of the eighth embodiment of the data driver in
`
`the display device related to this invention.
`
`FIG. 37 is a timing chart which shows an example of
`
`the drive control operation of the data driver in this embodiment.
`
`FIG. 38isacircuit arrangement drawing showing another
`
`example of
`
`the configuration which is the display pixels
`
`applicable to the display device concerning this invention.
`
`FIG. 39isacircuit arrangement drawing showing another
`
`example of the configuration of the display pixels applicable
`
`25
`
`to the display device related to this invention.
`
`FIG. 40 is a timing chart which shows an example of
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`17
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`PCT/JP2003/013819
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`the drive control operation in the display device related to
`
`this embodiment.
`
`FIG. 41 is an outline block diagram showing an example
`
`of one configuration of the second embodiment of the display
`
`device related to this invention.
`
`FIG. 42 is a circuit arrangement drawing showing one
`
`embodiment of the pixel driver circuit applied to the display
`
`device in this embodiment.
`
`FIG. 43 is a circuit arrangement drawing showing one
`
`10
`
`embodiment of the data driver applied to the display device in
`
`this embodiment.
`
`FIG. 44 is a timing chart which shows an exa