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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
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`SAMSUNG DISPLAY CO., LTD.,
`SAMSUNG ELECTRONICS CO., LTD., and
`SAMSUNG ELECTRONICS AMERICA, INC.,
`Petitioners,
`
`v.
`
`SOLAS OLED LTD.,
`Patent Owner.
`____________
`
`Case No. IPR2021-00591
`U.S. Patent No. 7,868,880
`____________
`
`
`PATENT OWNER RESPONSE
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`
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`Case No. IPR2021-00591
`U.S. Patent No. 7,868,880
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`TABLE OF CONTENTS
`
`I.
`II.
`
`A.
`B.
`
`INTRODUCTION .................................................................. 1
`THE ’880 PATENT ................................................................. 2
`Background of the '880 Patent ........................................................ 2
`Elements of the '880 patent ............................................................. 4
`Display Apparatus with Expanded Control ................................ 4
`1.
`Drive Transistor and Storage Capacitor Reset ........................... 8
`2.
`C.
`The Prosecution History of the ’880 patent .................................. 11
`III. LEVEL OF ORDINARY SKILL IN THE ART ....................... 11
`IV. CLAIM CONSTRUCTION ................................................... 12
`V.
`LACK OF ANTICIPATION OR OBVIOUSNESS .................. 14
`A. Grounds 1/1a: Miyazawa (Claims 1–9, 11–14, and 25–32) .......... 14
`1.
`Claim 1 ..................................................................................... 14
`2.
`Claim 2 ..................................................................................... 18
`3.
`Claim 3 ..................................................................................... 21
`4.
`Claim 4 ..................................................................................... 23
`5.
`Claim 5 ..................................................................................... 23
`6.
`Claim 6 ..................................................................................... 23
`7.
`Claim 7 ..................................................................................... 24
`8.
`Claim 8 ..................................................................................... 25
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`Claim 9 ..................................................................................... 25
`9.
`10. Claim 11 ................................................................................... 25
`11. Claim 12 ................................................................................... 26
`12. Claim 13 ................................................................................... 26
`13. Claim 14 ................................................................................... 26
`14. Claim 25 ................................................................................... 29
`15. Claim 26 ................................................................................... 32
`16. Claim 27 ................................................................................... 32
`17. Claim 28 ................................................................................... 32
`18. Claim 29 ................................................................................... 33
`19. Claim 30 ................................................................................... 33
`20. Claim 31 ................................................................................... 34
`21. Claim 32 ................................................................................... 34
`Grounds 2/2a: Morosawa (Claims 1–14 and 25–33) .................... 34
`1.
`Claim 1 ..................................................................................... 34
`Claim 2 ..................................................................................... 49
`2.
`3.
`Claim 3 ..................................................................................... 53
`4.
`Claim 4 ..................................................................................... 56
`5.
`Claim 5 ..................................................................................... 56
`6.
`Claim 6 ..................................................................................... 57
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`B.
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`Claim 7 ..................................................................................... 60
`7.
`Claim 8 ..................................................................................... 61
`8.
`Claim 9 ..................................................................................... 61
`9.
`10. Claim 10 ................................................................................... 61
`11. Claim 11 ................................................................................... 61
`12. Claim 12 ................................................................................... 62
`13. Claim 13 ................................................................................... 62
`14. Claim 14 ................................................................................... 62
`15. Claim 25 ................................................................................... 63
`16. Claim 26 ................................................................................... 65
`17. Claim 27 ................................................................................... 65
`18. Claim 28 ................................................................................... 67
`19. Claim 29 ................................................................................... 69
`20. Claim 30 ................................................................................... 69
`21. Claim 31 ................................................................................... 71
`22. Claim 32 ................................................................................... 71
`23. Claim 33 ................................................................................... 71
`and 34–40) ..................................................................................... 72
`1.
`Shirasaki ................................................................................... 73
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`Ground 3: combination of Morosawa and Shirasaki (Claims 18–24
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`C.
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`No motivation to combine Morosawa and Shirasaki ............... 76
`2.
`Claim 20/36 .............................................................................. 78
`3.
`D. Ground 4: combination of Morosawa, Shirasaki, and Koyama
`(Claims 24 and 40) ........................................................................ 79
`1.
`Koyama .................................................................................... 79
`2.
` .................................................................................................. 80
` ....................................................................................................... 81
`Hector ....................................................................................... 82
`1.
`No motivation to combine Hector with Morosawa .................. 82
`2.
`VI. CONCLUSION .................................................................... 83
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`E.
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`No motivation to combine Koyama and Morosawa or Shirasaki
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`Ground 5: combination of Morosawa and Hector (Claims 15–17)
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`TABLE OF AUTHORITIES
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`Statutes
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`
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`35 U.S.C. § 102 ...................................................................................... 11, 27
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`35 U.S.C. § 112 ....................................................................................... 11, 32
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`EXHIBIT LIST
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`Exhibit
`No.
`2001
`2002
`2003
`2004
`
`Description
`
`Declaration of Thomas L. Credelle
`Curriculum Vitae of Thomas L. Credelle
`Transcript of Dec. 29, 2021 Deposition of Miltiadis Hatalis
`Order Construing Terms of the Asserted Claims, In the matter
`of Certain Active Matrix OLED Display Devices and Compo-
`nents Thereof, ITC Inv. No. 337-TA-1243 (Aug. 4, 2021))
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`Case No. IPR2021-00591
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`I.
`
`INTRODUCTION
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`Patent Owner Solas OLED Ltd. submits this response to the Petition
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`(Paper 4) filed by the Samsung petitioners, requesting inter partes review of
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`U.S. Patent No. 7,868,880. Samsung presents one ground based upon the
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`Miyazawa reference (Ground 1) and four grounds based upon the Morosawa
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`reference, alone or in combination with other art (Grounds 2–5). Each of these
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`grounds fails, either because it fails to satisfy claim limitations or because it
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`relies on modifications or combinations of prior art circuits that a POSITA
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`would not have made.
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`Among other issues, Samsung’s ground 1 challenge ignores claim lim-
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`itations concerning the timing of certain steps and requiring that certain steps
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`“comprise” other steps, in order to shoehorn the different teachings of
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`Miyazawa into the claims of the ’880 patent. Samsung’s ground 2–5 chal-
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`lenges suffer from similarly grave flaws. For many limitations, they rely on
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`a circuit that appears nowhere in Morosawa but that would allegedly be ob-
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`tained by combining aspects of two different embodiments that use two dis-
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`tinct ways of writing data to each pixel. Contrary to Samsung’s arguments,
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`nothing in Morosawa suggests the modification that Samsung proposes. Fur-
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`ther, as explained below, this modification would add complexity to the circuit
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`without providing any corresponding benefits and would needlessly increase
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`power consumption, if it even functioned at all.
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`For the reasons explained in detail below, Solas respectfully asks that
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`the Board reject each of the grounds of Samsung’s challenge and confirm the
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`patentability of the ’880 patent claims over the art relied on by Samsung.
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`II. THE ’880 PATENT
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`A. Background of the '880 Patent1
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`The ’880 patent, titled “Display Apparatus and Drive Control Method
`
`Thereof,” was filed by Tsuyoshi Ozaki and Jun Ogura on May 23, 2006, and
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`was issued on Jan. 11, 2011. It claims a priority date of May 24, 2005.
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`Casio, the original assignee of the ’880 patent was a pioneer in the de-
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`velopment of practical and high performing displays utilizing organic light
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`emitting diodes (OLEDs). The ’880 patent taught innovative designs for “ac-
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`tive matrix” OLED displays and methods to control the driving of the pixels
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`in the display (See Ex. 1001, ’880 patent at Abstract.)
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`The ’880 patent explains that addressing of prior art active-matrix
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`OLED displays consisted of a write time period and a display time period.
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`
` See Declaration of Thomas L. Credelle (“Credelle Declaration” or “Credelle
`Decl.”) (Ex. 2001) ¶¶ 56–58.
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`2
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`While the performance for still images could be adequate, a problem exists
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`for moving images because “image information displayed in the previous
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`frame period can become visually recognized more easily as an afterimage.”
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`Consequently, “blurs and stains of the image information occur” which leads
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`to deterioration of the display image quality. Ex. 1001, ’880 patent at 2:41-51.
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`To resolve this issue, a display drive method (referred to as “pseudo-impulse
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`type display drive method”) could be realized to improve the quality of mov-
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`ing images. However, an additional writing period of the blanking data and
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`black display period have to be added within each frame; this results in the
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`need for writing the image data at a higher speed such that “writing insuffi-
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`ciency occurs owing to the insufficiency of the time for writing the image data
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`in each display pixel with respect to a signal delay generated resulting from a
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`CR time constant produced by a resistance component parasitic on signal wir-
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`ings of a display panel and a capacity component, etc. Consequently, grada-
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`tion display corresponding to the image data may not be executed properly.”
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`Ex. 1001, ’880 patent at 3:4-28.
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`B.
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`Elements of the '880 patent2
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`1.
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`Display Apparatus with Expanded Control
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`The ’880 patent discloses a display apparatus for active-matrix OLED
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`displays and control method that is capable of displaying moving images with
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`“a favorable display quality while being capable of displaying image infor-
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`mation at an appropriate gradation corresponding to the display data, and also
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`can provide a display drive method thereof.” Ex. 1001, ’880 patent at 3:32-
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`38.
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`The display apparatus includes “a display panel including a plurality of
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`display pixels arranged thereon in vicinities of respective intersections of a
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`plurality of scanning lines arranged in a row direction and a plurality of data
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`lines arranged in a column direction; a scanning drive unit which sequentially
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`applies a scanning signal to each of said plurality of scanning lines and sets
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`the display pixels corresponding to each the scanning line to a selection state;
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`a data drive unit which generates a gradation signal corresponding to the dis-
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`play data and supplies the gradation signal to the display pixels set to the se-
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`lection state; a power source drive unit which supplies to the display pixels a
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`drive voltage for controlling a drive state of each of the display pixels; and a
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` See Credelle Decl. ¶¶ 59–65.
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`drive control unit which: (i) controls the power source drive unit to operate to
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`set the display pixels to a non-display operation state during a non-display
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`period in which the display pixels do not display the display data, and (ii)
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`controls the scanning drive unit to operate to set the display pixels to the se-
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`lection state during the non-display period.” Ex. 1001, ’880 patent at 3:40-59,
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`emphasis added.
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`In one embodiment of the pixel circuit, three transistors and one capac-
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`itor (“3T-1C”) are utilized (see e.g., Ex. 1001, ’880 patent at Fig. 3, repro-
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`duced below). Figure 3 shows one example of a pixel circuit for a “current
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`gradation designation system.” The '880 patent states: “The drive control
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`method allows a display drive current having a current value corresponding
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`to display data to flow in a light emitting element provided on each display
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`pixel by supplying a gradation current having a current value corresponding
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`to the display data as a display pixel, thereby performing a light emitting op-
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`eration (a display operation) with a desired luminance gradation.” Ex.
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`1001, ’880 patent at 6:54-61.
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`Ex. 1001, ’880 patent, Figure 3
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`
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`In operation, each process cycle (e.g., a frame of data, is divided into a
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`non-light emitting and light emitting operation period (see ’880 patent Fig. 5,
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`reproduced below). During the non-light emitting period, Tnem, the scanning
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`signal Vsel is turned on, the power source voltage Vsc is set to LOW, and
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`gradation voltage or current is provided by the data driver and written to the
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`storage capacitor Cs through Tr12 and Tr13. During the light emitting period,
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`Tem, the power source voltage Vsc is set to HIGH and a gradation current
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`flows through the OEL layer to Vcom (GND). The system controller generates
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`the timing signals necessary to control the pixel circuit in synchronism with
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`the incoming video data. Ex. 1001, ’880 patent at 10:61-14:34.
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`Ex. 1001, ’880 patent, Figure 5
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`
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`The operation described above creates a type of pseudo-impulse drive
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`control, as shown in '880 patent, Fig. 8, by adjusting the relative times for non-
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`display period and display period for each frame k.
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`Ex. 1001, ’880 patent, Figure 8
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`2.
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`Drive Transistor and Storage Capacitor Reset
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`Another element of the inventions disclosed in the '880 patent is a cir-
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`cuit and control method to reset the voltage on the storage capacitor and gate
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`to source before writing new image data. By adding a fourth transistor Tr14
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`and a bias signal Vbs, as shown in ’880 patent Fig. 11, reproduced below, the
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`voltage at N11 (gate of drive transistor Tr13) can be set to Vsel when Tr14 is
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`turned on.
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`Ex. 1001, ’880 patent, Fig. 11
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`
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`Through this added operation, the threshold voltage shift of the driving
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`transistor Tr13 can be reduced. Ex. 1001, ’880 patent at 23:26-30. Further, any
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`remnant charge on Cs from a previous frame will be removed before writing
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`new data, which can reduce any afterimage from previous data. Ex. 1001, ’880
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`patent at 2:44-51. This is illustrated in ’880 patent Fig. 12, reproduced below.
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`In this embodiment, the voltage on the capacitor and the gate of Tr13 is the
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`result of writing current or voltage and not the charge remaining from the pre-
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`vious cycle (see comparison of Figures 5 and 12 below).
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`Ex. 1001, ’880 patent Fig. 12
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`3T-1C circuit (Fig. 5)
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`4T-1C circuit (Fig. 12)
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`C. The Prosecution History of the ’880 patent3
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`The application that led to the ’880 patent, Application No. 11/438,967
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`(“’967 application”) was filed on May 23, 2006. The ’967 application claimed
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`priority to two Japanese patent applications, filed on May 24 and May 26,
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`2005.
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`On September 4, 2009, the Patent Office mailed a non-final rejection of
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`certain claims of the ’967 application under 35 U.S.C. § 102 and 35 U.S.C. §
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`112. In response, on January 4, 2010, the applicant provided an amendment
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`to address the issues raised in the Patent Office action dated August 31, 1999.
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`The ’967 application was allowed on March 29, 2010, and the applica-
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`tion issued as the ’880 patent on January 11, 2011.
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`III. LEVEL OF ORDINARY SKILL IN THE ART
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`Dr. Hatalis offers the opinion that a person of ordinary skill in the art
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`for the ’880 patent in 2005 “would have had at least a bachelor’s degree in
`
`electrical engineering (or equivalent) and at least two years’ industry experi-
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`ence, or equivalent research in circuit design” and that “a POSA could substi-
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`tute directly relevant additional education for experience, e.g., an advanced
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`degree relating to the design of electroluminescent devices, drive circuits, or
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`
`
` See Credelle Decl. ¶¶ 66–68.
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`other circuit design or an advance degree in electrical engineering (or equiv-
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`alent), with at least one year of industry experience.” (Ex. 1003, ¶ 35.)
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`In the ITC proceeding involving the ’880 patent, ITC Inv. 337-TA-
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`1243, the Administrative Law Judge adopted the following definition of a per-
`
`son of ordinary skill in the art: “an ordinary artisan in the field of the asserted
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`patents would likely have at least a bachelor’s degree in electrical engineering
`
`and approximately two years of either industry or equivalent research experi-
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`ence in the areas of circuit design and/or optical display technologies.” (Ex.
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`2004 at 8.)
`
`For the purposes of this Patent Owner Response, Solas assumes Dr. Ha-
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`talis’s definition of the person of ordinary skill in the art is correct, and notes
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`that Dr. Hatalis’s definition is similar to that adopted by the ALJ in the ITC
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`proceeding.
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`IV. CLAIM CONSTRUCTION4
`
`In his declaration, Dr. Hatalis assumes that each term in the ’880 patent
`
`is to be given its plain and ordinary meaning. Unless otherwise noted, Solas
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`applies the claims of the ’880 using their plain and ordinary meaning.
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` See Credelle Decl. ¶¶ 69–71.
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`In the ITC case concerning the ’880 patent, the parties reached certain
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`agreed constructions, and the ALJ construed certain disputed terms in the ’880
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`patent (Ex. 2004):
`
`Term
`“continuous”
`(claim 35)
`
`“separated”
`(claims 20, 36)
`
`Preambles of claims 2
`and 25
`
`Term
`“vicinities of [respective]
`intersections”
`(claims 2, 3, 25)
`
`“data drive unit”
`(claims 3, 10)
`
`“drive control unit”
`(claims 3, 5, 7, 18, 21)
`
`
`
`
`Agreed Construction
`“adjacent”
`
`“not adjacent”
`
`The preambles are limiting.
`
`Construction
`“[arranged thereon in] proximity to or nearby
`[respective] intersections”
`
`The limitation is not governed by 35 U.S.C.
`§112 (6). It means “data driver.”
`
`The limitation is not governed by 35 U.S.C.
`§112 (6). It means “system controller.”
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`V. LACK OF ANTICIPATION OR OBVIOUSNESS
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`A. Grounds 1/1a: Miyazawa (Claims 1–9, 11–14, and 25–32)
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`1.
`
`Claim 1
`
`a.
`
`Limitation [1P]: “. . . a plurality of display pixels ar-
`ranged thereon in vicinities of intersections . . .”
`
`The evidence presented by Dr. Hatalis fails to demonstrate that
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`Miyazawa satisfies this limitation. See Credelle Decl. ¶ 72. Dr. Hatalis points
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`to the Figure 1 from Miyazawa (annotations are Dr. Hatalis’s):
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`
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`In the same section of his declaration, Dr. Hatalis also cites to Figure 9
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`of Miyazawa, though he appears to rely on this Figure only for other limita-
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`tions of this claim element. See Credelle Decl. ¶ 73.
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`Each of these figures is a schematic, with boxes, symbols, lines, and
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`arrows that represent the connections between devices and functional blocks.
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`A POSITA would not understand them to be scale drawings or drawings that
`
`reflected the precise layout of structures in the device. See Credelle Decl. ¶
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`74. Nothing in the evidence cited by Dr. Hatalis, including the portions of the
`
`specification he cites establishes that what he identifies as “display pixels” are
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`in fact located in a particular position relative to the intersections he points to.
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`Id. Nor does anything he cites to provide a distance between the display pixels
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`and the respective intersections. Id. For at least these reasons, Dr. Hatalis’s
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`evidence fails to establish this limitation is satisfied.
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`Further, Dr. Hatalis does not contend that modifying Miyazawa to sat-
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`isfy this limitation would have been obvious or provide any obviousness anal-
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`ysis attempting to show that it would have been. See Credelle Decl. ¶ 75.
`
`b.
`
`Limitation [1.7.1]: “a drive control unit which controls
`the power source drive unit to operate to set the display
`pixels to a non-display operation state during a non-dis-
`play period in which the display pixels do not display the
`display data, and controls the scanning drive unit to op-
`erate to set the display pixels to the selection state during
`the non-display period,”
`
`Dr. Hatalis identifies the “drive control unit” as the “control circuit 5,”
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`which is shown as a box in Figure 1 and described in a single sentence of
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`Miyazawa ¶ 0090: “A control circuit 5 synchronously controls a scanning line
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`driving circuit 3, a data line driving circuit 4 and a power line control circuit
`
`6 based on a vertical synchronizing signal Vs, a horizontal synchronizing sig-
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`nal Hs, a dot clock signal DCLK, grayscale data D, and so on, which are in-
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`putted from preceding devices (not shown).” See Credelle Decl. ¶ 76. Beyond
`
`this sentence, the functions and operation of the control circuit are not de-
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`scribed anywhere in Miyazawa. Id. Further, Dr. Hatalis does not describe what
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`the “control circuit 5” actually does to control these other components or how
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`he would know that. There certainly is no evidence that it “sets a period in-
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`cluding a select period . . .” or “controls a voltage value of the drive voltage . . .
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`to set the display pixels to a non-display operation state during the non-display
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`period” as required by the claims. Id.
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`For at least these reasons, Dr. Hatalis has failed to present evidence this
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`limitation is satisfied or made obvious by Miyazawa. See Credelle Decl. ¶ 77.
`
`c.
`
`Limitations [1.6] and [1.7.3]: “a state setting unit”
`“wherein the state setting unit eliminates a bias state set
`corresponding to the display data based on the gradation
`signal to the display drive circuit of the display pixels in
`each row, generates a setting signal for setting a specific
`bias state, applies the setting signal to each of the plural-
`ity of bias lines, and applies the setting signal to the dis-
`play pixels for each row of the display panel”
`
`Dr. Hatalis does not point to a “state setting unit” aside from contending
`
`that it is somewhere in the box “scanning line driving circuit” 3 of Fig. 1,
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`which refers to the first embodiment of Miyazawa. See Credelle Decl. ¶ 78.
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`But the first embodiment does not include a state setting unit for setting a bias
`
`state since there are no bias lines in the first embodiment. Id. Further, Dr. Ha-
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`talis contends that the scanning line drive circuit 3 (Fig. 1) in limitation 1.3 is
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`the claimed “scanning drive unit.” Ex. 1003, Hatalis Declaration ¶ 59. This is
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`not evidence of a “state setting unit” in Miyazawa’s embodiments. Id. For at
`
`least these reasons, Dr. Hatalis has failed to show that limitations [1.6] and
`
`[1.7.3] are anticipated or obvious by Miyazawa.
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`U.S. Patent No. 7,868,880
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`2.
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`Claim 2
`
`a.
`
`Limitation [2P]: “. . . a plurality of display pixels ar-
`ranged thereon in vicinities of intersections . . .”
`
`This phrase is the same as the phrase in the preamble of claim 1, which
`
`is addressed above. For this limitation [2P], Dr. Hatalis relies on the same
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`schematic drawing from Miyazawa as he relies upon for the preamble of claim
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`1:
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`
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`See Credelle Decl. ¶ 79. For at least the reasons set forth in the discussion of
`
`the preamble of claim 1, Dr. Hatalis’s evidence fails to establish that this lim-
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`itation is satisfied in Miyazawa. Dr. Id. ¶¶ 79–80. Hatalis also does not con-
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`tend that modifying Miyazawa to satisfy this limitation would have been
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`obvious or provide any obviousness analysis attempting to show that it would
`
`have been. Id.
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`Case No. IPR2021-00591
`U.S. Patent No. 7,868,880
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`b.
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`Limitation [2.4.1]: “in a non-display period including a
`period in which the display pixels are set to a selection
`state, setting the display pixels to a non-display operation
`state in which the display data is not displayed”
`
`For the claimed “selection state,” Dr. Hatalis points to what he calls
`
`“the writing/selection period t1 to t2 (orange) during which pixels are selected
`
`(i.e., SEL1 is high, turning T1 on).” Ex. 1001, Hatalis Declaration ¶ 75. See
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`Credelle Decl. ¶ 81. However, his discussion of this period is based upon
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`Miyazawa ¶ 0115. Id. As Dr. Hatalis acknowledges this paragraph describes
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`Miyazawa’s “third embodiment.” Ex. 1001, Hatalis Declaration ¶ 75;
`
`Miyazawa ¶ 0109. This is a different embodiment than the “fourth embodi-
`
`ment” of Miyazawa Figure 9, which Dr. Hatalis relies upon for other elements
`
`of this claim. Ex. 1001, Hatalis Declaration ¶¶ 72, 74; Miyazawa ¶ 0123. See
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`Credelle Decl. ¶ 81.
`
`Dr. Hatalis states that “a POSITA would understand it [Miyazawa ¶
`
`0115] also applies to the fourth embodiment as shown in Figure 10.” This is
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`incorrect. Miyazawa ¶ 0115 describes “the data writing t1 to t2” for the third
`
`embodiment. Credelle Decl. ¶ 82. For the fourth embodiment, Miyazawa ¶
`
`0127 describes “the data writing t1 to t2” for the fourth embodiment. Id. A
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`19
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`Case No. IPR2021-00591
`U.S. Patent No. 7,868,880
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`POSITA would not look to a paragraph describing t1 to t2 in the third embod-
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`iment to understand the fourth embodiment, because there is an entire inde-
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`pendent paragraph devoted to this issue for the fourth embodiment. Id.
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`Further, that Dr. Hatalis does not contend that modifying Miyazawa to
`
`satisfy this limitation would have been obvious or provide any obviousness
`
`analysis attempting to show that it would have been. Credelle Decl. ¶ 83. For
`
`at least these reasons, Dr. Hatalis has failed to show that limitation 2.4.1 is
`
`anticipated or obvious by Miyazawa.
`
`c.
`
`Limitation [2.4.3]: “wherein the setting of each display
`pixel to the non-display operation state comprises setting
`a specific bias state by eliminating the bias state set, cor-
`responding to the gradation signal, to the display drive
`circuit of the display pixel.”
`
`Dr. Hatalis contends the power control unit sets the pixels to a non-
`
`display state by setting VLa low (Fig. 10 at t2’). See Claim 1.5, Ex. 1003,
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`Hatalis Declaration ¶ 61; Credelle Decl. ¶ 84. Further, he contends that signal
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`SEL2 is used to eliminate the bias state set (Ex. 1003, Hatalis Declaration ¶
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`77), but this only eliminates the charge on capacitor C1; capacitor C2 is not
`
`discharged until T1 is selected by SEL1, which is not a bias control line and
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`occurs after pixels are set to non-display operation state at t2 (see Fig. 10).
`
`See Credelle Decl. ¶ 84.
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`Case No. IPR2021-00591
`U.S. Patent No. 7,868,880
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`Further, Dr. Hatalis does not contend that modifying Miyazawa to sat-
`
`isfy this limitation would have been obvious or provide any obviousness anal-
`
`ysis attempting to show that it would have been. Credelle Decl. ¶ 85. For at
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`least these reasons, Dr. Hatalis has failed to show that limitation 2.4.3 is an-
`
`ticipated or obvious by Miyazawa.
`
`3.
`
`Claim 3
`
`a.
`
`Limitation [3.1]: “. . . a plurality of display pixels ar-
`ranged thereon in vicinities of intersections . . .”
`
`This phrase is the same as the phrase in limitation [1.1] and in the pre-
`
`amble of claim 2, which is addressed above. Credelle Decl. ¶ 86. For this
`
`limitation [3.1], Dr. Hatalis relies on the same schematic drawing from
`
`Miyazawa as he relies upon for the preamble of claim 1:
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`Case No. IPR2021-00591
`U.S. Patent No. 7,868,880
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`For at least the reasons set forth in the discussion of the preamble of
`
`claim 1, Dr. Hatalis’s evidence fails to establish that this limitation is satisfied
`
`in Miyazawa. Credelle Decl. ¶ 87. Dr. Hatalis also does not contend that mod-
`
`ifying Miyazawa to satisfy this limitation would have been obvious or provide
`
`any obviousness analysis attempting to show that it would have been. Id.
`
`b.
`
`Limitation [3.5.1]: “a drive control unit which sets a pe-
`riod including a select period in which the scanning drive
`unit sets the display pixels to the selection state as a non-
`display period in which the display pixels do not display
`the display data, and controls a voltage value of the drive
`voltage supplied from the power source drive unit to set
`the display pixels to a non-display operation state during
`the non-display period,”
`
`Dr. Hatalis identifies the “drive control unit” as the “control circuit 5,”
`
`which is shown as a box in Figure 1 and described in a single sentence of
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`Miyazawa ¶ 0090: “A control circuit 5 synchronously controls a scanning line
`
`driving circuit 3, a data line driving circuit 4 and a power line control circuit
`
`6 based on a vertical synchronizing signal Vs, a horizontal synchronizing sig-
`
`nal Hs, a dot clock signal DCLK, grayscale data D, and so on, which are in-
`
`putted from preceding devices (not shown).” Credelle Decl. ¶ 88. Beyond this
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`sentence, the functions and operation of the control circuit are not described
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`anywhere in Miyazawa. Id. Further, Dr. Hatalis does not describe what the
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`“control circuit 5” actually does to control these other components or how he
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`Case No. IPR2021-00591
`U.S. Patent No. 7,868,880
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`would know that. There certainly is no evidence that it “sets a period including
`
`a select period . . .” or “controls a voltage value of the drive voltage . . . to set
`
`the display pixels to a non-display operation state during the non-display pe-
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`riod” as required by the claims. Id.
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`For at least these reasons, Dr. Hatalis has failed to present evidence this
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`limitation is satisfied or made obvious by Miyazawa.
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`4.
`
`Claim 4
`
`Claim 4 depends from claim 3. Dr. Hatalis has failed to show this claim
`
`is anticipated or obvious for at least the reasons discussed for limitations 3.1
`
`and 3.5.1 above. See Credelle Decl. ¶ 90.
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`5.
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`Claim 5
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`Claim 5 depends from claim 4
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