(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2008/0168286 A1
` Tupman (43) Pub. Date: Jul. 10, 2008
`
`
`
`US 20080168286A1
`
`(54) POWER MANAGEMENT SYSTEMS AND
`METHODS
`
`(52) US. Cl. ........................................................ 713/320
`
`(76)
`
`Inventor:
`
`323d Tupman, San FranCISCO’ CA
`
`Correspondence Address
`ROPES & GRAY LLP
`PATENT DOCKETING 39/361 1211 AVENUE OF
`THE AMERICAS
`’
`_
`NEW YORK’ NY 10036 8704
`.
`..
`,
`(21) Appl No .
`11/650 073
`
`(22)
`
`Filed:
`
`Jan. 4, 2007
`
`Publication Classification
`
`(51)
`
`Int. Cl.
`G06F 1/32
`
`(2006.01)
`
`(57)
`ABSTRACT
`Systems and methods for efficiently managing power con-
`sumption in portable electronic devices are provided. In one
`embodiment, power management circuitry may operate the
`device in a low power mode (e.g., a HIBERNATION mode),
`but enables the device to quickly become fully operational in
`response to a power-ON event, despite having been in that low
`power mode. This may be accomplished by powering a pro-
`cessor engaging memory (e.g., SDRAM) while other cir-
`cuitry are powered OFF. In another embodiment, the display
`may be driven by an application portion when operating in an
`ON mode, but may be driven by a carrier portion when the
`application is operating in a low power mode. In another
`embodiment, various discrete circuitry portions are selec-
`tively turned ON and OFF, depending, for example, on
`whether a particular discrete circuitry portion is idle or its
`processing functionality is not needed.
`
`fl
`21 0
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`Patent Application Publication
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`Jul. 10, 2008 Sheet 6 0f 15
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`610
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`Operating a personal media
`device in a low power mode
`
`
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`Providing power to a processor
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`
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`
`engaging memory while the personal
`media device is operating in the low
`
`power mode
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`Monitoring the personal media
`device for a power-ON event
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`Switching from the low power mode
`
`to an 0N poWer mode in the event of
`‘
`a monitored power-ON event-
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`- Providing power to circuitry
`
`other than the processor
`engagement memory, such other
`
`circuitry including a processor
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`Loading the” processor With
`contents contained in the
`_ processor engagement memory
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`Using the processor to execute
`one or more desired functions
`
`670
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`
`7
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`Patent Application Publication
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`US 2008/0168286 A1
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`710
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`720
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`Operating a carrier portion
`
`of a personal media devrce
`in a sleep mode
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`Temporarily activating circuitry in
`the carrier portion once every
`
`
`predetermined period of time to '
`determine whether an incoming .
`signal is being received
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`Switching the carrier portion from
`the sleep mode to an 0N mode
`
`740
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`

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`—
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`'
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`i810
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`Using an application portion of a
`personal media device to drive a
`display when the application portion
`
`
`device is Operating in an ON'mode
`
`
`
`‘ Using a carrier portion of -
`_
`
`the personal media device to
`
`
`drive the display when the
`application portion is
`
`
`operating in a LOW power mode
`
`
`
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`FIG. 8
`
`9
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`Jul. 10, 2008 Sheet 9 0f 15
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`US 2008/0168286 A1
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`
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`Use processor
`to drive display ‘
`
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`
`
`
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`Monitoring the magnitude of a signal
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`local to the display
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`display based on the contents
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`Jul. 10
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`Patent Application Publication
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`Jul. 10, 2008 Sheet 11 0f 15
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`US 2008/0168286 A1
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`
`
`1110
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`ls discrete
`-
`circuitry portion idling
`_ or is it not needed to
`perform a fUnction?
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`

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`US 2008/0168286 A1
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`.
`. Providing an interrupt signal
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`Patent Application Publication
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`US 2008/0168286 A1
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`Patent Application Publication
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`Receiving an interrupt signal
`
`discrete circuitry portions
`
`Powering'ON all discrete
`circuitry portions in response to
`receiving the interrupt signal
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`portions to provide instructions
`to power OFF one or more of the
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`Patent Application Publication
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`US 2008/0168286 A1
`
`Jul. 10, 2008
`
`POWER MANAGEMENT SYSTEMS AND
`METHODS
`
`BACKGROUND OF THE INVENTION
`
`[0001] This relates to electronic devices and more particu-
`larly to power management methods and systems.
`[0002]
`Portable electronic devices, such as wireless and
`cellular telephones, digital media players (e. g., music players
`and Video players), and hybrid devices that combine tele-
`phone and media playing functionality are known. These
`devices are typically powered by one or more batteries.
`[0003] Batteries store a fixed amount of energy. Therefore,
`efficient use of the fixed energy source may be required to
`ensure the media device can operate for at least a predeter-
`mined amount of time, before being replaced or recharged.
`Thus, a need for efficient power management has become
`increasingly important, especially given the trend in minia-
`turization (and corresponding decrease in battery energy stor-
`age capacity), coupled with a demand for providing more
`power consuming features (e.g., devices providing both
`media playing and telephone functionality, as well as rela-
`tively large color display screens).
`[0004] Accordingly, what is needed are power management
`methods and systems for efficiently managing power con-
`sumption in portable electronic devices,
`including media
`devices.
`
`SUMMARY OF THE INVENTION
`
`Systems and methods for efficiently managing
`[0005]
`power consumption in portable electronic, such as those that
`include media playing and telephone functionality, are pro-
`vided.
`
`In one embodiment, power management may be
`[0006]
`implemented in a device including an application portion and
`a carrier portion. The carrier portion can include circuitry for
`performing telephone functions (e.g., transmitting data to and
`receiving data from a communications tower). The carrier
`circuitry can include circuitry for other wireless communica-
`tion functions, such as to enable Bluetooth and Wi-Fi com-
`munication methods. The application portion may include all
`other circuitry not specifically reserved for the carrier cir-
`cuitry. For example, the application portion may include a
`processor, memory (e. g., for storing media files), SDRAM, a
`display, and other circuitry.
`[0007] The application and carrier portions may each oper-
`ate according to predetermined power modes. For example,
`the application portion may operate according to an OFF
`mode, a DEEP SLEEP mode, a SLEEP mode, a HIBER-
`NATE mode, and an ON mode. The carrier portion may
`operate according to an OFF mode, a SLEEP mode, and an
`ON mode. Depending on which mode the application portion,
`the carrier portion, or the combination of both portions is
`operating in, power management circuitry can use an appro-
`priate power management scheme to conserve power.
`[0008]
`In one embodiment ofa power management scheme
`according to the invention, the power management circuitry
`may operate in a low power mode (e.g., a HIBERNATION
`mode), but enable the device to quickly become fully opera-
`tional in response to a power-ON event (e.g., an event that
`causes the media device to switch from a low power mode to
`an ON mode). To provide the combined benefit of both low
`power consumption and quick operational readiness, a pro-
`cessor engaging memory (e.g., SDRAM) may be powered
`
`ON while other circuitry in the application portion and the
`carrier portion are powered OFF. By keeping the processor
`engaging memory powered ON, a time delay in powering up
`that memory can be avoided when the device switches from a
`low power mode to an ON mode. This can enable the memory
`to substantially immediately load its contents into the proces-
`sor. When the processor receives the memory contents, the
`media device may be fully operational.
`[0009] When the media device is in the low power mode,
`both the application and carrier portions may be in a low
`power mode. The power management circuitry may periodi-
`cally activate the carrier portion (or predetermined circuitry
`within the carrier portion) to enable it to, for example, deter-
`mine whether an incoming signal (e.g., telephone call or text
`message) is being received. If an incoming signal is being
`received, this may trigger a power-ON event that causes the
`power management circuitry to switch the media device from
`a low power mode to an ON mode. If no incoming signal is
`detected, the power management circuitry may deactivate the
`carrier portion, allowing it to return to a low power mode.
`[001 0]
`Power management may coordinate power manage-
`ment across both portions of the personal media device. This
`provides extra flexibility in managing power consumption.
`For example, independent mode control may be exercised for
`the application portion and the carrier portion. That is, when
`the application portion is operating in a particular mode (e. g.,
`ON mode), the power management circuitry may select one
`of several available modes (e.g., OFF, SLEEP, and ON) for
`the carrier circuitry. The available modes may depend on the
`operating mode of the application portion.
`[0011]
`Power management may also be used to control how
`content is displayed on a display screen ofthe personal media
`device. For example, when the application portion is operat-
`ing in an ON mode, the processor may drive the display.
`However, when the application portion is operating in a low
`power mode, the carrier portion may drive the display. The
`carrier portion may write data to memory local to the display
`during the SLEEP mode interval (e.g., once every second).
`The data stored in the local memory may then be displayed on
`the display. Power savings may be realized using the carrier
`portion to drive the display when the device is operating in a
`low power mode because the carrier portion does not require
`processor activation, which may require more power than the
`carrier portion to drive the display.
`[0012]
`Power management may also be used to reduce
`power consumption when the device is operating in an ON
`mode. For example, various discrete circuitry portions can be
`selectively turned ON and OFF, depending, for example, on
`whether a particular discrete circuitry portion is idle or its
`processing functionality is not needed. The discrete circuitry
`portions may be turned ON and OFF by electrically coupling
`and de-coupling the circuitry portion to a power supply via a
`controlled switch. When a discrete circuitry portion is not
`needed, the supply of power is cut off, thereby preventing
`power loss caused by leakage current.
`[0013]
`In one embodiment, the switch may be controlled by
`interrupt control circuitry and/or by the processor. The inter-
`rupt control circuitry may be operative to cause a switch to
`close, thereby electrically coupling the discrete circuitry por-
`tion associated with that switch to the power supply. When the
`processor is turned OFF and the processor is needed to per-
`form a function, the interrupt circuitry may cause the proces-
`sor switch to close to enable power to be delivered to the
`processor. When the processor is ON, it may monitor itself
`17
`
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`

`US 2008/0168286 A1
`
`Jul. 10, 2008
`
`and other discrete circuitry portions to determine whether to
`turn itself or those portions OFF. If the discrete circuitry
`portion is not needed (e.g., idling), the process may provide
`an instruction that causes a switch associated with that por-
`tion to electrically de-couple the supplied power from that
`portion. In addition, the processor may provide instructions to
`cause a switch to electrically couple a discrete circuitry por-
`tion to the power supply.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`[0014] The above and other features of the present inven-
`tion, its nature and various advantages will become more
`apparent upon consideration of the following detailed
`description, taken in conjunction with the accompanying
`drawings, in which like reference characters refer to like parts
`throughout, and in which:
`[0015]
`FIG. 1 shows a simplified block diagram of portable
`electronic device in accordance with an embodiment of the
`
`present invention;
`[0016]
`FIG. 2 is a more detailed but simplified block dia-
`gram of a device in accordance with an embodiment of the
`present invention;
`[0017]
`FIG. 3 shows how the applicationportion ofa device
`may change states in accordance with an embodiment of the
`present invention;
`[0018]
`FIG. 4 shows how the carrierportion ofa device may
`change states in accordance with an embodiment of the
`present invention;
`[0019]
`FIG. 5 shows a power management coordination
`table in accordance with an embodiment of the present inven-
`tion;
`FIG. 6 is a flowchart illustrating steps of a power
`[0020]
`management scheme according to an embodiment of the
`present invention the invention;
`[0021]
`FIG. 7 is a flowchart illustrating steps of another
`power management scheme according to an embodiment of
`the present invention the invention;
`[0022]
`FIG. 8 is a flowchart of a power management
`scheme involving a display in accordance with an embodi-
`ment of the present invention;
`[0023]
`FIG. 9 is a flowchart of another of power manage-
`ment scheme involving a display in accordance with an
`embodiment of the present invention;
`[0024]
`FIG. 10 shows a simplifiedblock diagram for imple-
`menting a power management to reduce power consumption
`when a device is operating in an ON mode in accordance with
`an embodiment of the present invention;
`[0025]
`FIG. 11 is a flowchart for implementing power man-
`agement to reduce power consumption when the a device is
`operating in an ON mode in accordance with an embodiment
`of the present invention;
`[0026]
`FIG. 12 is another flowchart for implementing
`power management to reduce power consumption when the
`media device is operating in an ON mode in accordance with
`an embodiment of the present invention;
`[0027]
`FIG. 13 is an illustrative timing diagram showing
`the ON/OFF states and Active/Idle states of a processor and
`first and second discrete circuitry in accordance with an
`embodiment of the present invention;
`[0028]
`FIG. 14 is yet another flowchart for implementing
`power management to reduce power consumption when a
`device is operating in an ON mode in accordance with an
`embodiment of the present invention; and
`
`FIG. 15 is an illustrative timing diagram showing
`[0029]
`the ON/OFF states of a processor and first, second and third
`discrete circuitry in accordance with an embodiment of the
`present invention.
`
`DETAILED DESCRIPTION OF THE INVENTION
`
`FIG. 1 shows a simplified block diagram of illustra-
`[0030]
`tive portable media player 100. Media player 100 may include
`processor 102, storage device 104, user interface 108, display
`110, CODEC 112, power management circuitry 116, bus 118,
`memory 120, communications circuitry 122, and power man-
`agement circuitry for communications circuitry 123. Proces-
`sor 102 can control the operation ofmany functions and other
`circuitry included in media player 100. Processor 102 may
`drive display 110 and may receive user inputs from user
`interface 108.
`
`Storage device 104 may store media (e. g., music and
`[0031]
`video files), software (e.g., for implementing functions on
`device 100, preference information (e.g., media playback
`preferences), lifestyle information (e.g., food preferences),
`exercise information (e.g., information obtained by exercise
`monitoring equipment), transaction information (e.g., infor-
`mation such as credit card information), wireless connection
`information (e.g.,
`information that may enable device to
`establish a wireless connection such as a telephone connec-
`tion), subscription information (e.g., information that keeps
`tracks of podcasts or television shows or other media a user
`subscribes to), telephone information (e.g., telephone num-
`bers), and any other suitable data. Storage device 104 may
`include one more storage mediums, including for example, a
`hard-drive, permanent memory such as ROM, semi-perma-
`nent memory such as RAM, or cache.
`[0032] Memory 120 may include one or more different
`types of memory which may be used for performing device
`functions. For example, memory 120 may include cache,
`Flash, ROM, and/or RAM. Memory may be specifically dedi-
`cated to storing firmware. For example, memory may be
`provided for store firmware for device applications (e.g.,
`operating system, user interface functions, and processor
`functions).
`[0033]
`Power management circuitry 116 may be provided
`for controlling power management schemes in accordance
`with the principles of the present invention. Power manage-
`ment circuitry 116 may communicate with other circuitry in
`device 100 directly (not shown in this FIG., but shown in FIG.
`2) or indirectly via bus 118.
`[0034] Bus 118 may provide a data transfer path for trans-
`ferring data to, from, or between storage device 104, power
`management circuitry 116, communications circuitry 123,
`baseband circuitry 124, memory 120, and processor 102.
`Coder/decoder (CODEC) 112 may be included to convert
`digital audio signals into an analog signal, which may be
`provided to an output port (not shown).
`[0035] Communications circuitry 122 may be included in a
`carrier circuitry portion (delimited by dashed lines 125) of
`device 100. Carrier circuitry portion 125 may be dedicated
`primarily to processing telephone functions and other wire-
`less communications (e.g., Wi-Fi or Bluetooth). In addition,
`power management of carrier circuitry portion 125 may be
`controlled by power management circuitry 116 and/or power
`management circuitry 123, which may be dedicated specifi-
`cally to communications circuitry 122. It is understood that
`the carrier circuitry portion operate independent of other
`device components operating in device 100. That is, carrier
`18
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`circuitry may be an independently operating subsystem
`within device 100 that may communicate with other compo-
`nents within device 100.
`
`[0036] User interface 108 may allow a user to interact with
`the player 100. For example, the user input device 108 can
`take a variety of forms, such as a button, keypad, dial, a click
`wheel, or a touch screen. Communications circuitry 122 may
`include circuitry for wireless communication (e.g., short-
`range and/or long range communication). For example, the
`wireless communication circuitry may be wi-fi enabling cir-
`cuitry that permits wireless communication according to one
`of the 802.11 standards or a private network. Other wireless
`network protocols standards could also be used, either in
`alternative to the identified protocols or in addition to the
`identified protocol. Another network standard may be Blue-
`tooth.
`
`[0037] Communications circuitry 122 may also include cir-
`cuitry that enables device 100 to be electrically coupled to
`another device (e.g., a computer or an accessory device) and
`communicate with that other device. As indicated above,
`communications circuitry 122 may also include baseband
`circuitry for performing relatively long-range communica-
`tions (e.g., telephone communications). If desired, commu-
`nications circuitry 122 may include circuitry for supporting
`both relatively long-range and short-range communications.
`For example, communications circuitry 122 may support
`telephone, Wi-Fi, and Bluetooth communications.
`[0038]
`In one embodiment, player 100 may be a portable
`computing device dedicated to processing media, such as
`audio and video. For example, device 100 may be a media
`player (e. g., MP3 player), a game player, a remote controller,
`a portable communication device, a remote ordering inter-
`face, an audio tour player, or other suitable personal device. In
`another embodiment, player 100 may be a portable device
`dedicated to providing media processing and telephone func-
`tionality in single integrated unit. Device 100 may be battery-
`operated and highly portable so as to allow a user to listen to
`music, play games or video, record video or take pictures,
`place and take telephone calls, communicate with others,
`control other devices, and any combination thereof. In addi-
`tion, device 100 may be sized such that is fits relatively easily
`into a pocket or hand of the user. By being handheld, device
`100 is relatively small and easily handled and utilized by its
`user and thus may be taken practically anywhere the user
`travels.
`
`FIG. 2 is a more detailed but simplified block dia-
`[0039]
`gram of illustrative device 200. Device 200 may be a mobile
`telephone. FIG. 2 shows illustrative application circuitry por-
`tion 210 and carrier circuitry portion 260. Carrier portion 260
`can include circuitry for performing telephone functions
`(e. g., transmitting data to and receiving data from a commu-
`nications tower), such as baseband circuitry 262. Carrier cir-
`cuitry 260 may also include circuitry (not shown) for other
`wireless communication functions such as Bluetooth and Wi-
`Fi.
`
`[0040] Application portion 210 may include all other cir-
`cuitry not specifically reserved for carrier portion 260. For
`example, application portion 210 may include processor 212,
`storage circuitry 214 (e.g., for storing media files), SDRAM
`216, a display 220, and other circuitry, which is collectively
`represented by box 230. Application portion 210 may also
`include power management circuitry 240 in accordance with
`the principles of the present invention. Power management
`circuitry 240 may generically represent circuitry for control-
`
`ling power management of application portion 210 and car-
`rier portion 260. Power management circuitry 240 may oper-
`ate in conjunction with carrier power management circuitry
`(not shown) of carrier portion 260 when implementing power
`managing schemes in accordance with the invention.
`[0041]
`Storage circuitry 214 may be similar to storage cir-
`cuitry 104 discussed above in connection with FIG. 1.
`SDRAM 216 may provide content (e.g., instructions) to pro-
`cessor 212 that may enable processor 212 to execute func-
`tions of device 200. In certain circumstances, SDRAM 216
`may “engage” or “prep” processor 212 by providing it with
`data to perform one or more functions when device 200
`switches from a low power mode to an ON mode (discussed
`in more detail below). SDRAM 216 may be referred to herein
`as processor engagement circuitry. For example, when device
`200 is operating in a low power mode, SDRAM 216 may store
`data that may be used to “engage” processor 212 so it knows,
`for example, a status of device 200 and operate accordingly.
`In some embodiments, processor 212 and SDRAM 216 may
`be integrated into a single package. For example, package-
`on-package technology may be used to provide an integrated
`processor and memory package.
`[0042] Display 220 may be any suitable display for display-
`ing media,
`including graphics,
`text, and video. In some
`embodiments, display may be a touch screen display or an
`LCD. Display 220 may be driven by processor 212 or base-
`band circuitry 262. When driven by processor 212, a higher
`bit rate of data may be provided, thereby enabling the display
`of high resolution graphics, video, and other content to be
`displayed on display 220. When driven by baseband circuitry
`262, a lower bit rate of data may be provided to display screen
`220. The data provided by baseband circuitry 262 may be
`written to memory 222, which may be memory local to dis-
`play 220, the contents of which are displayed on display 220.
`For example, content written to memory 222 and displayed
`on display 220 may include a clock, a signal strength indica-
`tor, and a battery power indicator. This content may be pro-
`vided by processor 212 orbaseband circuitry 262. Though the
`quantity of data may be less than that provided by processor
`212, power consumption may be lower when driving display
`220 with baseband circuitry 262 than when being driven by
`processor 212.
`[0043] The application portion (e.g., application portion
`210) and the carrier portion (carrier portion 260) may each
`operate according to predetermined power modes. FIG. 3
`shows that the application portion may operate according to
`an OFF mode, a DEEP SLEEP mode, a SLEEP mode, a
`HIBERNATE mode, and an ON mode in accordance with the
`principles of the present invention. The OFF mode may rep-
`resent a state where a power source (e.g., battery) has been
`removed from the device. In the DEEP SLEEP mode, the
`power source (e. g., battery) is connected to the device, but is
`not powering any circuitry, except power management cir-
`cuitry (e.g., circuitry 240 of FIG. 2). In the SLEEP mode, all
`circuitry may be powered, but the clock or clocks needed for
`enabling the device to execute functions are not running. In
`the HIBERNATE mode, the power management circuitry and
`the engagement processor memory (e.g., SDRAM 216 of
`FIG. 2) may be powered (as well as other circuitry requiring
`power to power the processor memory) and a clock may be
`provided to refresh the engagement processor memory. The
`other circuitry (e.g., circuitry that may be powered in the
`SLEEP mode) may not receive power in the HIBERNATE
`mode. Thus, the engagement processor memory can be main-
`19
`
`19
`
`

`

`US 2008/0168286 A1
`
`Jul. 10, 2008
`
`tained in a ready-to-enable processor state when the device is
`in a low power mode. The other low power modes may
`include DEEP SLEEP and SLEEP. The ON mode may rep-
`resent a mode where circuitry is powered (when such power
`is required) and clocks are available for enabling the device to
`execute one or more functions.
`
`FIG. 3 also shows how the application portion ofthe
`[0044]
`device may change between states. As shown,
`the ON,
`HIBERNATE, SLEEP, and DEEP SLEEP modes may all
`switch to the OFF mode. The application portion may switch
`between the ON and DEEP SLEEP modes, between the ON
`and SLEEP modes, and the ON and HIBERNATE modes.
`The application portion may be able to switch between dif-
`ferent modes not specifically shown in FIG. 3. For example,
`the application portion may be able to switch between the
`HIBERNATE and SLEEP modes.
`
`[0045] The carrier portion (e.g., carrier portion 260) may
`operate according to an OFF mode, a SLEEP mode, and an
`ON mode. The OFF mode may occur when a power source
`(e. g., a battery) is not connected to the device. In the SLEEP
`mode (also the low power mode of the carrier circuitry), the
`carrier circuitry may be powered, but is in a minimally active
`state. That is power may be provided, but no functions are
`being performed. In the ON mode, one or more carrierportion
`functions may be executed. FIG. 4 also shows how the carrier
`portion of the device may change between states. As shown,
`the ON and SLEEP modes may all switch to the OFF mode.
`The carrier portion may switch between the ON and SLEEP
`modes
`
`Power management according to the invention may
`[0046]
`coordinate power management across both portions of the
`device. This provides extra flexibility in managing power
`consumption. For example, independent mode control may
`be exercised for the application portion and the carrier por-
`tion. That is, when the application portion is operating in a
`particular mode (e.g., ON mode), the power management
`circuitry may select one of several available modes (e.g.,
`OFF, SLEEP, and ON) for the carrier circuitry. The available
`modes may depend on the operating mode of the application
`portion. A power management mode coordination table for
`the application and carrier portions is illustrated in FIG. 5.
`[0047]
`FIG. 5 shows the three power management modes of
`the carrier portion along the y-axis of the table and the five
`power modes ofthe application portion along the x-axis ofthe
`table. The checkmarks indicate that both application and car-
`rier portions may exist in the power modes defined by the x
`and y coordinates of a box. The “X’s” indicate where the
`power modes defined by the box at a particular x and y
`coordinate may not exist both application and carrier por-
`tions. For example, both the application and carrier portions
`may simultaneously exist in OFF modes. However, the carrier
`portion may not operate in an ON mode when the application
`portion is operating in an OFF mode.
`[0048]
`In one embodiment, the power management cir-
`cuitry may operate the device in a low power mode (e.g., a
`HIBERNATION mode), but enable the device to quickly
`become fully operational in response to a power-ON event
`(e.g., an event that causes the device to switch from a low
`power mode to an ON mode), despite having been in that low
`power mode. To provide the combined benefit of both low
`power consumption and quick operational readiness, a pro-
`cessor engaging memory (e.g., SDRAM) may be powered
`ON while other circuitry in the application portion and the
`carrier portion are powered OFF. By keeping the processor
`
`engaging memory powered ON, a time delay in powering up
`that memory is avoided when the device switches from a low
`power mode to an ON mode, thereby enabling the memory to
`substantially immediately load its contents into the processor.
`When the processor receives the memory contents, the device
`may be fully operational.
`[0049]
`FIG. 6 is an illustrative flowchart showing various
`steps of a power management scheme according to the inven-
`tion. At step 610, a device may operate in a low power mode.
`For example, the application portion of the device may be
`operating in the HIBERNATION mode. At step 620, power
`may be provided to a processor engaging memory while the
`device is operating in the low power mode. For example, in a
`HIBERNATION mode, the processor engaging memory may
`be provided with power and refreshed with clocks while other
`circuitry, such as the processor, may not be supplied with
`power.
`
`[0050] At step 630, the device can be monitored for a
`power-ON event. A power-ON event may be any event that
`causes the device to switch from one power mode to another.
`For example, a power-ON event may occur when the user
`uses an interface of the device (e.g., to change the volume) or
`when a telephone call or text message is received. Briefly
`referring to FIG. 2, a power-ON event may be received at
`input 242 at power management circuitry 240. In response to
`receiving the power-ON event, the power management cir-
`cuitry may switch the device from the low power mode to the
`ON power mode, as i