E XPRESSCARD® STANDARD
`
`Release 2.0
`
`February 2009
`
`1
`
`APPLE 1086
`Apple v. GUI
`IPR2021-00471
`
`

`

`PCMCIA
`
`© 2009 PCMCIA
`All rights reserved.
`
`Printed in the United States of America.
`
`PCMCIA (Personal Computer Memory
`Card International Association)
`2635 North First Street, Suite 218
`San Jose, CA 95134 USA
`+1-408-433-2273
`+1-408-433-9558 (Fax)
`http://www.pcmcia.org
`
`The ExpressCard rabbit logo and
`ExpressCard are trademarks of PCMCIA,
`registered in the United States.
`
`PCI Express is a trademark of the PCI
`Special Interest Group.
`
`All other product names are trademarks,
`registered trademarks, or servicemarks of
`their respective owners.
`
`PCMCIA MAKES NO WARRANTY,
`EXPRESS OR IMPLIED, WITH RESPECT
`TO THE EXPRESSCARD STANDARD
`("THE STANDARD"),
`IMPLEMENTATIONS OF THE
`STANDARD, INCLUDING AS TO NON-
`INFRINGEMENT OF ANY PATENT OR
`OTHER PROPRIETARY RIGHTS OF
`THIRD PARTIES, AND
`MERCHANTABILITY OR FITNESS FOR
`ANY PARTICULAR PURPOSE. THIS
`STANDARD IS PROVIDED TO YOU "AS
`IS".
`
`PCMCIA has been informed that the
`following companies believe that certain
`implementations of the Standard could
`infringe their proprietary rights: Acticon
`Technologies [a division of General Patent
`Corporation] (Integrated Connector and
`Modem U.S. Patent 4,543,450, Connector
`Interface U.S. Patent No. 4,603,320,
`Multiple Connector Interface U.S. Patent
`No. 4,686,506, Programmable Connector
`Interface 4,972,470); SanDisk Corporation
`(U.S. Patent No. 6,434,034, Computer
`Memory Cards Using Flash EEPROM
`Integrated Circuit Chips and Memory-
`controller Systems). For more detailed
`information, contact these parties.
`PCMCIA is not undertaking any duty to
`advise users of the Standard of any
`further developments in this regard.
`
`Other than any which may be listed in the
`preceding paragraph, PCMCIA has not
`been informed of any other such
`proprietary rights.
`
`This document is being provided solely for
`the internal business use of the company
`who purchased the Standard and whose
`name is watermarked throughout the
`document. All other use, including
`distribution to third parties in any
`medium, is expressly prohibited.
`
`Document No.022009-01
`
`First Printing, February 2009
`
`2
`
`

`

`REVISION HISTORY
`
`Date
`
`Specification Version
`
`Revisions
`
`September 10, 2003
`
`Specification adopted
`
`December 15, 2003
`
`1.0
`
`SCRs 001 – 004 Incorporated
`
`July 20, 2004
`
`1.0 Update #1
`
`SCRs 006 – 009 and Proposals 001, 002, 006, 007 & 008 Incorporated
`
`February 13, 2006
`
`1.1
`
`Proposal 004: Electromechanical Interock
`
`Proposal 005: Module Thermal Requirements
`
`Proposal 010: Release of WAKE# Timing
`
`Proposal 012: ESD Figure Correction
`
`Proposal 013: ESD Testing
`
`Proposal 014: Jitter Spec Updates
`
`Proposal 016: Support for PCI Bridges on Modules
`
`Proposal 018: BIOS ExpressCard PCIe Support in WinXP/2000
`
`Proposal 019: Security Notch Dimensioning Alignment
`
`Proposal 021: CLKREQ# Dynamic Protocol Enable Default
`
`Proposal 022: Enabling Additional Use of SMBus Pins
`
`Proposal 023: Finger Grip Dimensional Options
`
`Proposal 025: Definition of Terms Rx and Tx
`
`Proposal 026: Allow Modules to Stop PLL in L1 When CLKREQ# is Not
`Honored
`
`Proposal 027: Editorial Cleanup of Proposal 018
`
`March 30, 2007
`
`1.2
`
`Proposal 030: Module Housing Wall Height Dimension Change
`
`Proposal 030: Specify Interior Radii in Module
`
`Proposal 033: Implementing Proper USB Data Line Termination in Bus
`Suspend Mode
`
`Proposal 034: Active State Link PM Disable Default
`
`Proposal 035: ExpressCard/54 Module Security Notch Dimensioning
`
`February 27, 2009
`
`2.0
`
`Proposal 037: ExpressCard Seating Plane Clarification
`
`Proposal 039: UV Light Test Condition Correction
`
`Proposal 040: CLKREQ# Dynamic Protocol Disable Default
`
`Proposal 042: Adding Next Generation PCIe and USB Support
`
`Proposal 043: Miscellaneous Editorial Clarifications to the Standard
`
`3
`
`

`

`PCMCIA Membership Certificate
`Join PCMCIA today and receive a full refund of your
`ExpressCard Standard purchase price.
`
`Your purchase of the ExpressCard Standard entitles you to a 100% refund of the purchase price
`towards membership in the PCMCIA Association. This offer is good for 180 days from the
`Purchase Date shown below. Please visit http://www.pcmcia.org for information on the different
`levels and benefits of PCMCIA membership, which include access to the ExpressCard
`Certification Program and use of the ExpressCard logo.
`
`To take advantage of this offer, please include a copy of your sales invoice reflecting the purchase
`of the ExpressCard Standard when communicating with PCMCIA regarding PCMCIA
`membership.
`
`By Mail:
`
`PCMCIA
`2635 North First Street Suite 218
`San Jose, CA 95134 USA
`
`By Phone/Fax:
`
`Telephone: (408) 433-2273
`Fax: (408) 433-9558
`Email: sales@pcmcia.org
`http://www.pcmcia.org
`
`4
`
`

`

`RELEASE 2.0
`
`EXPRESSCARD STANDARD
`
`CONTENTS
`
`1. Introduction___________________________________________ 1
`1.1 ExpressCard Standard Overview .......................................................................................1
`
`1.2 Relationship to the PC Card Standard ...............................................................................3
`
`1.3 Conventions .........................................................................................................................3
`1.3.1 Signal Naming.........................................................................................................................................................................3
`
`1.3.2 Numeric Representation.......................................................................................................................................................3
`
`1.4 Terms and Abbreviations....................................................................................................4
`
`2. Related Documents ____________________________________ 7
`
`3. Electrical Specifications_________________________________ 9
`3.1 Signal Descriptions..............................................................................................................9
`3.1.1 Pin Assignments....................................................................................................................................................................1 0
`
`3.1.2 Signal/Pin Description.......................................................................................................................................................1 2
`
`3.1.2.1 PCI Express Pins ......................................................................................................................................................1 2
`
`3.1.2.2 Universal Serial Bus (USB) Pins........................................................................................................................1 3
`
`3.1.2.3 SMBus Pins................................................................................................................................................................1 3
`
`3.1.2.4 System Auxiliary Pins...........................................................................................................................................1 3
`
`3.1.2.5 Power Pins .................................................................................................................................................................1 4
`
`3.1.3 Voltages and Grounds .......................................................................................................................................................1 4
`
`3.1.4 SMBus Support......................................................................................................................................................................1 4
`
`3.2 Module Detection and Operation .....................................................................................15
`3.2.1 Module presence pins (CPPE# and CPUSB#).............................................................................................................1 5
`
`3.2.2 PCI Express functional reset (PERST#).........................................................................................................................1 6
`
`3.2.3 PCI Express Reference Clock (REFCLK+ / REFCLK-)............................................................................................1 7
`
`3.2.4 PCI Express clock request (CLKREQ#).........................................................................................................................1 7
`
`3.2.4.1 Dynamic Clock Control ........................................................................................................................................1 8
`
`3.2.4.2 Clock Request Support Reporting and Enabling.........................................................................................1 9
`
`3.2.5 PCI Express module power control operation...........................................................................................................1 9
`
`3.2.5.1 Initial power up for PCI Express-based modules .......................................................................................1 9
`
`3.2.5.2 Power state transitions (S0 to S3/S4 to S0) for PCI Express-based modules...................................2 0
`
`3.2.5.3 Power down for PCI Express-based modules..............................................................................................2 2
`
`3.2.6 USB power control operation ..........................................................................................................................................2 2
`
`3.2.7 I/O interface detection, set-up and operation............................................................................................................2 3
`
`3.2.7.1 Modules Implementing Both Interface Options...........................................................................................2 4
`
`3.2.7.2 Modules Implementing USB 3.0........................................................................................................................2 5
`
`3.2.8 Power management .............................................................................................................................................................2 5
`
`3.2.8.1 PCI Express WAKE#..............................................................................................................................................2 5
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
`
`(cid:1) 2009 PCMCIA
`
`All rights reserved.
`
`v
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`

`

`CONTENTS
`
`RELEASE 2.0
`
`3.2.8.2 PCI Express link power management..............................................................................................................2 7
`
`3.2.8.3 USB Power Management .....................................................................................................................................2 7
`
`3.2.8.3.1 USB Remote Wakeup ....................................................................................................................................2 7
`
`3.3 Electrical Requirements .....................................................................................................28
`3.3.1 Signal Interface......................................................................................................................................................................2 8
`
`3.3.2 PCI Express Reference Clock (REFCLK) requirements...........................................................................................2 8
`
`3.3.3 Power Supply Limits...........................................................................................................................................................2 9
`
`3.3.4 Power Supply Ramp-up Timing and Sequencing.....................................................................................................3 0
`
`4. Module Specifications _________________________________ 31
`4.1 Module Dimensions...........................................................................................................31
`
`4.2 Module Electrical Requirements........................................................................................36
`4.2.1 PCI Express Signal Integrity Requirements ................................................................................................................3 6
`
`4.2.1.1 Informative Differences with the PCI Express CEM Specification .......................................................3 7
`
`4.2.1.2 Normative Differences with the PCI Express CEM Specification .........................................................3 8
`
`4.2.1.3 Signal Integrity Board Design Considerations ...........................................................................................3 9
`
`4.2.2 Grounding/EMI clips.........................................................................................................................................................4 0
`
`4.2.2.1 Contact resistance requirement and test procedure ...................................................................................4 0
`
`4.2.3 Other Electrical Requirements.........................................................................................................................................4 1
`
`4.3 Module Thermal Requirements.........................................................................................42
`4.3.1 Module Thermal Compliance..........................................................................................................................................4 3
`
`4.3.2 Host Thermal Compliance ................................................................................................................................................4 3
`
`4.4 Environmental and Mechanical Requirements..................................................................45
`4.4.1 Environmental Performance ............................................................................................................................................4 5
`
`4.4.1.1 Operating Environment........................................................................................................................................4 5
`
`4.4.1.2 Storage Environment.............................................................................................................................................4 6
`
`4.4.1.3 High Storage Temperature ..................................................................................................................................4 6
`
`4.4.1.4 Low Storage Temperature...................................................................................................................................4 6
`
`4.4.1.5 High Operating Temperature.............................................................................................................................4 6
`
`4.4.1.6 Low Operating Temperature..............................................................................................................................4 7
`
`4.4.1.7 Thermal Shock .........................................................................................................................................................4 7
`
`4.4.1.8 Moisture Resistance ...............................................................................................................................................4 7
`
`4.4.1.9 Vibration and High Frequency ..........................................................................................................................4 7
`
`4.4.1.10 Shock .......................................................................................................................................................................4 8
`
`4.4.1.11 Drop Test ...............................................................................................................................................................4 8
`
`4.5 Approved Test Procedures ...............................................................................................49
`
`4.6 Labeling (Marking) ............................................................................................................49
`
`5. Connector Specifications _______________________________ 51
`5.1 Module Connector .............................................................................................................51
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
`
`vi
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`All rights reserved.
`
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`
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`RELEASE 2.0
`
`EXPRESSCARD STANDARD
`
`5.2 Host Connector..................................................................................................................55
`
`5.3 Connector Electrical Requirements....................................................................................56
`
`5.4 Environmental Requirements ............................................................................................58
`
`5.5 Mechanical Requirements..................................................................................................58
`
`5.6 Additional Requirements ..................................................................................................59
`
`6. Host System Specification _____________________________ 61
`6.1 Slot power control requirements .......................................................................................61
`6.1.1 USB Specific Requirements ...............................................................................................................................................6 1
`
`6.2 PCI Express Slot Capabilities Register .............................................................................62
`
`6.3 BIOS ACPI Requirements .................................................................................................62
`6.3.1 Supporting Both Interface Options in Legacy Systems...........................................................................................6 2
`
`6.3.1.1 ExpressCard Insertion and Removal Within a PCI Express Aware Operating System...............6 8
`
`6.3.2 Supporting PCI Bridging on ExpressCard Modules...............................................................................................7 0
`
`6.4 Electromechanical Interlock Requirements .......................................................................73
`
`6.5 PCI Express Link Power Management .............................................................................73
`
`6.6 USB Power Management...................................................................................................73
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
`
`(cid:1) 2009 PCMCIA
`
`All rights reserved.
`
`vii
`
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`RELEASE 2.0
`
`FIGURES
`
`EXPRESSCARD STANDARD
`
`Figure 1-1: ExpressCard concepts in desktop and mobile computing host systems .......1
`
`Figure 1-2: Modular implementation concept....................................................................2
`
`Figure 3-1: Module presence pin schematic examples.....................................................16
`
`Figure 3-2: CLKREQ# Clock Control Timing...................................................................18
`
`Figure 3-3: Power up timing for PCI Express-based modules........................................20
`
`Figure 3-4: Power state transition timing for PCI Express-based ...................................21
`
`Figure 3-5: Power down timing for PCI Express-based modules ...................................22
`
`Figure 3-6: Out-of-tolerance threshold windows .............................................................30
`
`Figure 4-1: ExpressCard/34 module outline dimensions................................................32
`
`Figure 4-2: ExpressCard/54 module outline dimensions................................................33
`
`Figure 4-3: Alternate shape...............................................................................................34
`
`Figure 4-4: ExpressCard/34 extended module outline dimensions................................35
`
`Figure 4-5: ExpressCard/54 extended module outline dimensions................................36
`
`Figure 4-6: Generalized Link Definition for ExpressCard Implementations...................37
`
`Figure 4-7: Example of ground/power voids underneath high-speed signal pads........40
`
`Figure 4-8: Electrostatic discharge Test-2 fixture.............................................................42
`
`Figure 4-9: Thermal Probe Points for ExpressCard/34 Modules....................................44
`
`Figure 4-10: Thermal Probe Points for ExpressCard/54 Modules..................................45
`
`Figure 4-11: ExpressCard module shock and vibration test fixture................................48
`
`Figure 4-12: Label is allowed only in the crosshatched area............................................50
`
`Figure 5-1: Module connector interface dimensions.........................................................52
`
`Figure 5-2: Recommended module connector footprint...................................................53
`
`Figure 5-3: Recommended module connector footprint...................................................53
`
`Figure 5-4: Host connector dimensions.............................................................................55
`
`Figure 5-5: Recommended host connector footprint ........................................................56
`
`Figure 6-1: System INF-to-ACPI Relationship.................................................................65
`
`Figure 6-2: ExpressCard Module Insertion Events Within a Non-PCI Express Aware Operating
`System....................................................................................................................67
`
`Figure 6-3: ExpressCard Module Removal Events Within a Non-PCI Express Aware Operating
`System....................................................................................................................68
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
`
`(cid:1) 2009 PCMCIA
`
`All rights reserved.
`
`ix
`
`9
`
`

`

`FIGURES
`
`RELEASE 2.0
`
`Figure 6-4: ExpressCard Insertion Within A PCI Express Aware Operating System ....69
`
`Figure 6-5: ExpressCard Removal Within A PCI Express Aware Operating System ....70
`
`Figure 6-6: ExpressCard Slot Bus Number Allocations for an Example Two-slot System
`................................................................................................................................72
`
`Figure 6-7: Example of Default Resource Allocation under Legacy Operating Systems72
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
`
`x
`
`All rights reserved.
`
`(cid:1) 2009 PCMCIA
`
`10
`
`

`

`RELEASE 2.0
`
`TABLES
`
`EXPRESSCARD STANDARD
`
`Table 3-1: ExpressCard interface – List of Signals...........................................................10
`
`Table 3-2: ExpressCard interface – Pin assignments for ExpressCard connectors.........11
`
`Table 3-3: CLKREQ# Clock Control Timing ....................................................................19
`
`Table 3-4: Power up timing for PCI Express-based modules .........................................20
`
`Table 3-5: Power state transition timing for PCI Express-based modules .....................21
`
`Table 3-6: Power down timing for PCI Express-based modules.....................................22
`
`Table 3-7: ExpressCard slot power relationships to USB power state............................23
`
`Table 3-8: DC Specification for 3.3V Signaling ................................................................28
`
`Table 3-9: ExpressCard module power supply limits.....................................................29
`
`Table 4-1: Adapting Terminology in the PCI Express CEM Specification for ExpressCard
`requirements ..........................................................................................................37
`
`Table 4-2: ExpressCard requirements that supersede PCI Express CEM Specification
`requirements ..........................................................................................................39
`
`Table 5-1: ExpressCard connector electrical requirements...............................................57
`
`Table 5-2: Mechanical test procedures and requirements................................................59
`
`Table 5-3: Mechanical test sequence .................................................................................59
`
`Table 5-4: Additional connector requirements .................................................................59
`
`Table 6-1: Expected behavior of ExpressCard slot power...............................................61
`
`Table 6-2: ExpressCard Slot Resource Allocations to Support PCI Bridging on Modules71
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
`
`(cid:1) 2009 PCMCIA
`
`All rights reserved.
`
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`TABLES
`
`RELEASE 2.0
`
`This page intentionally left blank.
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
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`RELEASE 2.0
`
`EXPRESSCARD STANDARD
`
`1 . I N T R O D U C T I O N
`
`This specification describes the Personal Computer Memory Card International Association
`(PCMCIA) and the Japan Electronics and Information Technology Industries Association (JEITA)
`ExpressCard Standard. It covers the ExpressCard electrical specifications, module specifications,
`connector specifications, and host system requirements.
`
`1.1 ExpressCard Standard Overview
`An ExpressCard module is a small, modular add-in card technology based on PCI Express and
`Universal Serial Bus (USB) interfaces. Figure 1-1 illustrates two examples of ExpressCard
`applications in desktop and mobile computing host systems.
`
`Figure 1-1: ExpressCard concepts in desktop and mobile computing host systems
`
`The ExpressCard solution accommodates the replacement of conventional parallel buses for I/O
`devices with scaleable, high-speed serial interfaces. Two classes of serial interfaces are implemented
`by this solution, PCI Express, a high performance, integrated I/O interconnect solution, and USB for
`the ease of upgrading PC Card technologies and integrating popular external peripheral
`functionality via the ExpressCard module form-factor.
`
`Two standard module formats are specified: an ExpressCard/34 module and an ExpressCard/54
`module. The ExpressCard solution is designed to support a universal slot configuration that allows
`either ExpressCard/34 or ExpressCard/54 modules to function in the same slot. Host solutions that
`implement slots that only support ExpressCard/34 modules are also allowed by this standard.
`
`The ExpressCard architecture is based on an extensible, modular implementation, allowing multiple
`slots as illustrated in Figure 1-2. In any multi-slot host implementation, all slots provide equivalent
`I/O interface functionality and the choice of which slot to use for any given module is irrelevant.
`Both module formats afford access to the same I/O interface performance and source power although
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
`
`(cid:1) 2009 PCMCIA
`
`All rights reserved.
`
`1
`
`13
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`

`

`INTRODUCTION
`
`RELEASE 2.0
`
`the larger ExpressCard/54 module affords the application nominally 140% the internal volume and
`160% the thermal dissipation capacity over the ExpressCard/34 module.
`
`ExpressCard/34
`
`Slot 0
`
`ExpressCard/54
`
`Slot 1
`
`PCI Express (x1)
`
`USB2
`
`PCI Express (x1)
`
`USB2
`
`Host
`Chip
`Set
`
`Figure 1-2: Modular implementation concept
`
`PCI Express is a dual-simplex 2.5 Gbps (with optional support for 5.0 Gbps) differential serial link
`solution standardized by the PCI Special Interest Group (PCI-SIG). USB 2.0 is a full-duplex 480 Mbps
`differential serial bus solution standardized by the USB Implementers Forum (USB-IF). USB 3.0
`SuperSpeed is a standardized extension to USB 2.0 that adds a dual-simplex 5.0 Gbps differential
`serial link. The ExpressCard Standard defines the modular implementation of the PCI Express and
`USB based on normative references to each interface’s baseline specifications as defined within their
`respective parent organizations.
`
`Each slot of the ExpressCard host interface must support a single PCI Express lane (x1) operating at
`the baseline 2.5 Gbps data rate as defined by the PCI Express Base Specification. The ExpressCard
`host interface must also support the low-, full- and high-speed USB data rates as defined by the USB
`2.0 Specification. Support of both interfaces at these baseline rates is a condition for being an
`ExpressCard-compliant host system. With the introduction of ExpressCard Standard 2.0, optional
`support for extending both the PCI Express and USB data interfaces for operating at 5.0 Gbps data
`rate is defined. Given the 5.0 Gbps data rate is implemented, the host interface must support the
`use of this data rate in both the PCI Express and USB interface protocols with the ability to
`dynamically configure to the appropriate protocol based on the capabilities available on the module
`inserted into the slot.
`
`To assist in applications that require special sideband system management features, ExpressCard
`host systems may also connect a two-wire SMBus interface to the slot. If available, ExpressCard
`modules may provide support for such features as remote alerting and sideband radio control.
`
`For wake-up support when an ExpressCard module and its host system is in a low-power state, a
`sideband wake signal is available in the slot to bring the host system out of a sleep state, re-power
`the interface and allow the module to initiate an appropriate power management event via the
`native I/O interface. The sideband wake signal is only supported and implemented by
`ExpressCard PCI Express functions. ExpressCard USB functions do not use the sideband wake signal
`protocol.
`
`This document is being provided solely for the internal business use of the company who purchased the Standard and whose name is
`watermarked throughout the document. All other use, including distribution to third parties in any medium, is expressly prohibited.
`
`2
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`RELEASE 2.0
`
`EXPRESSCARD STANDARD
`
`1.2 Relationship to the PC Card Standard
`The ExpressCard Standard is a member of the family of standards published by the PCMCIA. The
`PC Card Standard, which defines the popular CardBus™ and 16-bit PC Card add-in cards based
`on a 68-pin connector, represents the first and second generations of the PC Card modular form-
`factor model in which ExpressCard technology bases its heritage.
`
`ExpressCard technology is complimentary to CardBus PC Card technology. Systems implementers
`may determine that host systems will be best served by having both solutions supported in a single
`host system as the migration from traditional 68-pin PC Cards may occur gradually over an
`extended period in the market.
`
`1.3 Conventions
`This section is intended to give general descriptions of notation conventions used in this document.
`
`1.3.1 Signal Naming
`
`All signals are named with respect to their asserted state as follows:
`
`a) Each signal which is not a logic signal, such as +3.3V, has a name which does not end with the
`"#" character.
`
`b) Each logic signal whose name does not end with the "#" character has logic high as the asserted
`state and logic low as the negated state.
`
`c) Each logic signal whose name ends with the "#" character has logic low as the asserted state and
`logic high as the negated state.