Programming the
`80386
`
`John H. Crawford
`Patrick P. Gelsinger
`
`~SYBEX®
`··
`~ San Francisco • Paris • Dusseldorf • London
`
`Oracle-1046 p.1
`Oracle v. Teleputers
`IPR2021-00078
`
`

`

`Cover design by Th omas In galls + Associates
`Cover photography by Casey Cartwright
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`Copyright © l 987 SYBEX Inc., 202 1 C hallenger Dri ve #100, Alam eda , CA 9450 1. World rights
`reserved. No part of this publication may be stored in a retrieval system, transmitted , or repro(cid:173)
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`
`Library of Congress Card Number: 87-61199
`ISBN 0-89588-381-3
`Manufactured
`in the United States of America
`10 9 8 7 6 5 4
`
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`34 Programming
`
`the 80386
`
`► Registers
`
`The register set available to the applications prog rammer consists of
`16 registers divided into three categories, as shown in Figure 2 .1. Additional
`registers are available to the systems programmer. Chapter 5 describes the
`registers
`that
`support memory management. Chapter
`8 describes
`the registers that support program debugging.
`
`GENERAL REGISTER SET
`
`STATUS/CONTROL REGISTERS
`
`SEGMENT REGISTERS
`
`31
`
`0
`
`31
`
`0
`
`15
`
`0
`
`IP
`
`EIP
`
`FLAGS
`
`EFLAGS
`
`16 15
`I
`I
`I
`
`i
`I
`I
`I
`I
`
`ES
`
`cs
`
`ss
`
`OS
`
`FS
`
`GS
`
`EAX
`
`ECX
`
`EDX
`
`EBX
`
`ESP
`
`EBP
`
`ESI
`
`EDI
`
`16 15 8 7
`I
`I
`
`AX
`
`I
`I
`I
`
`I AH I AL
`I
`I
`ex
`I
`I CH I CL
`DX
`I DH I DL
`
`I
`I
`BX
`I
`I BH I BL
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`I
`
`SP
`
`BP
`
`SI
`
`DI
`
`► Figure 2 .1: 80386 registers
`
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`Machine State and Memory Addressing 35
`
`The thr ee categories are as follows:
`
`1. Eight general-purpose 32-bit registers used for arithmetic and log(cid:173)
`ical operations, and for the base and index register components
`of memory addresses.
`2. Two 32-bit processor-control registers .
`3. Six 16-bit segment registers that address memory segments. Each
`regist er provides imm ediat e access to one segment of memory at
`a time. M emo ry segments will be explained later in this chapter
`and in detail in Chapter 5.
`
`Th e register set of the 80386 is a superset of the register set available on
`the previous processors in the 86 family. In cases where a 16-bit register was
`exten ded to provid e a 32-bit register on the 80386, the 386 register name
`is simply the old 16-bit register nam e prefixed with an E (for Extended).
`For example, the 16-bit AX register from the 8086 was extended to form
`the 32-bit EAX register on the 80386, the 16-bit IP (Instruction Pointer)
`register was extended
`to form the 32-bit EIP register on the 386, and
`so on.
`
`The General Registers
`Th e 80386 contains eight 32-bit general registers, used for arithmetic
`operations such as addition, subtraction, multiplication, and division , and
`also to form memory addresses, as described later in this chapter. These
`eight registers are nam ed EAX , ECX, EDX, EBX, ESP, EBP, ESI, and
`ED I, as shown in Figure 2 .1.
`The lower 16 bits of these registers can be accessed independently as
`16-bit registers, and are named AX, CX, DX, BX , SP, BP, SI, and DI.
`These are the eight 16-bit general-purpose
`registers from the previous 86
`family processors, and provide the compatible register set used for exe(cid:173)
`in Chapter 9. If one of these
`cuting 8086 and 286 code, as described
`16-bit registers is accessed, the upper 16 bits of the 32-bit general register
`are not disturbed.
`The high and low halves of the X registers-AX, BX, CX, and DX(cid:173)
`can be accessed independently as 8-bit registers. The suffix H or L is added
`to the first letter of the name of the 16-bit register to form the 8-bit register
`name for the high or low half of the register. For example, the AL register
`is the lowest 8 bits of the AX register, and also the lowest 8 bits of the
`EAX register. The AH register is the upper 8 bits of the AX register, and
`bits 8 through 15 of the EAX register. If one of these 8-bit registers is
`accessed, the remaining bits of the general register are not disturbed. You
`can see the overlap of the 8-bit, 16-bit, and 32-bit registers in Figure 2.1.
`
`Oracle-1046 p.4
`Oracle v. Teleputers
`IPR2021-00078
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