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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________________
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________
`INTEL CORPORATION and XILINX, INC.,1,
`Petitioners
`v.
`FG SRC LLC,
`Patent Owner
`____________________
`CASE NO.: IPR2020-01449
`PATENT NO. 7,149,867
`____________________
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`DECLARATION OF STANLEY SHANFIELD, PH.D.,
`IN SUPPORT OF PETITIONER’S OPPOSITION TO PATENT OWNER’S
`REVISED MOTION TO AMEND
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`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`U.S. Patent and Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
`
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`1 Xilinx, Inc. filed a motion for joinder and petition in IPR2021-00633, which were
`granted, and, therefore, has been joined as petitioner in this proceeding
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`Intel Exhibit 1045 - 1
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`I.
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`TABLE OF CONTENTS
` Page
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`INTRODUCTION ........................................................................................... 1
`A.
`Educational and Work Background ...................................................... 1
`B. Materials Considered ............................................................................. 2
`LEVEL OF ORDINARY SKILL IN THE ART ............................................. 3
`II.
`III. THE ART RENDERS OBVIOUS A RECONFIGURABLE
`PROCESSOR THAT OPERATES INDEPENDENT OF AND
`IN PARALLEL WITH A CONVENTIONAL
`MICROPROCESSOR ..................................................................................... 3
`IV. RESERVATION OF RIGHTS ........................................................................ 9
`V.
`CONCLUSION ................................................................................................ 9
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`i
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`Intel Exhibit 1045 - 2
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`I.
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`INTRODUCTION
`1. My name is Stanley Shanfield Ph.D., and I am a Technical Director at
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`Draper Laboratory in Cambridge, Massachusetts. I have been retained to prepare
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`this declaration as an expert witness on behalf of Petitioner Intel Corporation
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`(“Intel” or “Petitioner”). In this report, I provide my opinions concerning the scope
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`and patentability of the amended claims submitted in the Patent Owner’s motion to
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`amend the claims of U.S. Patent No. 7,155,867 (“’867 patent”). I also provide
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`herein the technical bases for these opinions, as appropriate. This declaration
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`contains statements of my opinions formed to date, and the bases and rationale for
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`these opinions. I may offer additional opinions based on further review of materials
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`presented throughout the course of this proceeding, including any additional
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`opinions and/or testimony of Patent Owner’s expert witnesses.
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`2.
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`For my efforts in connection with the preparation of this declaration, I
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`have been compensated at my usual and customary rate for this type of consulting
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`activity. My compensation is in no way contingent on the substance of my
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`opinions or the results of this or any other proceedings relating to the ’867 patent.
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`A. Educational and Work Background
`3. My educational background and qualifications are set forth generally
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`in my prior declaration supporting Intel’s Petition for IPR (see EX1006 ¶¶ 3-16)
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`and in my curriculum vitae which was submitted as Attachment A thereto.
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`1
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`Intel Exhibit 1045 - 3
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`B. Materials Considered
`4.
`I have considered information in forming my opinions in this
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`declaration:
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`The ’867 patent and its prosecution file history (EX1001, EX1002);
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`Intel’s Petition for IPR (Paper No. 1);
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`X. Zhang et al., Architectural Adaptation of Application-Specific
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`Locality Optimizations, IEEE (1997) (EX1003);
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`R. Gupta, Architectural Adaptation in AMRM Machines, IEEE (2000)
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`(EX1004);
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`Chien and R. Gupta, MORPH: A System for Robust Higher
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`Performance Using Customization,” IEEE (1996) (EX1005);
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`My initial declaration submitted with Intel’s Petition (EX1006);
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`The Board’s Institution Decision in this proceeding (Paper 13);
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`Patent Owner’s Revised Motion to Amend the Claims (Paper 41);
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`Declaration of William Mangione-Smith, Ph.D., in Support of Patent
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`Owner’s Revised Motion to Amend the Claims (EX2030);
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`and
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`U.S. Patent No. 7,155,602 to Poznanovic (“Poznanovic” – EX1046);
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`Any other materials referenced in this declaration.
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`2
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`Intel Exhibit 1045 - 4
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`II. LEVEL OF ORDINARY SKILL IN THE ART
`5. My opinions in this declaration are based on the knowledge of a
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`person of ordinary skill in the art (“POSA”) at the time of the ’867 patent. My
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`determination of the level of ordinary skill in the art is set forth in my prior
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`declaration supporting Intel’s Petition. See EX1006 ¶¶ 66-67.
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`III. THE ART RENDERS OBVIOUS A RECONFIGURABLE
`PROCESSOR THAT OPERATES INDEPENDENT OF AND IN
`PARALLEL WITH A CONVENTIONAL MICROPROCESSOR
`6. My testimony in this declaration is limited to only addressing the
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`obviousness of the new “wherein the reconfigurable processor operates
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`independent of and in parallel with a conventional microprocessor” amendments
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`proposed in the Patent Owner’s revised motion to amend the claims in this
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`proceeding, and even then only to the extent expressly addressed below. In this
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`declaration I do not opine or offer testimony concerning any other claim limitation,
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`or aspects or features of the ’867 patent or the prior art, which I have addressed in
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`prior declarations in this proceeding.
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`7.
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`I understand that the Patent Owner has submitted proposed amended
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`claims 20, 21, 28 and 32 that each recite “wherein the reconfigurable processor
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`operates independent of and in parallel with a conventional microprocessor,” or
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`similar language, and that the Petitioner asserts this limitation is not supported
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`anywhere in the ’867 patent specification. I have reviewed the ’867 patent
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`3
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`Intel Exhibit 1045 - 5
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`specification and did not find any instance of disclosure that supports the
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`limitation. Nevertheless, for the purpose of addressing how a person of ordinary
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`skill in computer architecture would view this amended phrase and its applicability
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`to the prior art, I provide my analysis below based on my interpretation of this
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`phrase as best as I understand it.
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`8.
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`In its revised motion to amend the claims, Patent Owner argues that
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`the “independent of and in parallel with” limitation is not taught by any of the
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`Zhang, Gupta, Chien, or Trimberger prior art references that has been raised so far
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`in this proceeding. See RMTA at 6-10. Based on this, the Patent Owner concludes
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`that the proposed substitute claims are patentable as nonobvious. Id. at 10. But in
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`my view, the “independent of and in parallel with” limitation would have been
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`obvious to a POSA in computer architecture at the time of the ’867 patent for the
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`reasons set forth below.
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`9.
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`The cited Zhang-Gupta “MORPH” reconfigurable processor
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`architecture refers to a “MultiprocessOr with Reconfigurable Parallel Hardware,”
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`which a person skilled in the art would understand to be a multiprocessor
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`architecture. See EX1003-14 C1:45-48. The key elements of this parallel
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`multiprocessor architecture consist of “processing and memory elements
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`embedded in a scalable interconnect.” Id. The combination of Zhang and Gupta
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`therefore discloses a system that is scalable and that comprises multiple processors
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`4
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`Intel Exhibit 1045 - 6
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`operating in parallel.
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`10.
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`It would have been obvious for a POSA to improve the reconfigurable
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`processor disclosed by Zhang and Gupta by implementing the MORPH
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`reconfigurable processor in parallel with one or more conventional static
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`microprocessors in a hybrid multiprocessor configuration such as the one taught by
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`U.S. Patent Publication No. 2003/0046530A1 to Poznanovic (“Poznanovic” –
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`EX1046), which also predates the earliest priority date of the ’867 patent.
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`Poznanovic discloses a multiprocessor system with reconfigurable processors 12
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`(green) arranged in a parallel connection with conventional static microprocessors
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`100 (blue) that perform independent operations, as shown in excerpted Fig. 1
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`below:
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`EX1046 at Fig. 1; see also id. ¶[0009] (“[T]he present invention is directed to an
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`5
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`Intel Exhibit 1045 - 7
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`interface for integrating reconfigurable processors with standard instruction
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`processors.”), ¶[0013] (“Another object . . . is to provide an active control that
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`allows instruction processors and reconfigurable processors to function
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`autonomously.”), ¶ [0041] (“[T]he reconfigurable [processor] 12 is a standalone
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`processing unit executing independently of instruction processors during normal
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`operations, as well as while loading and storing data.”). Poznanovic teaches “to
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`allow a single-system image to be constructed for a hybrid system of instruction
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`processors and reconfigurable processors” and “to divide application programs
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`among instruction processors and reconfigurable processors to achieve optimum
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`performance.” ¶¶[0019]–[0020] (emphasis added). Thus, a POSA would recognize
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`that Poznanovic teaches a hybrid multiprocessor configuration with reconfigurable
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`processors operating independently of and in parallel with conventional
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`microprocessors.
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`11. A POSA would have been motivated to combine the teachings of
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`Zhang and Gupta relating to a reconfigurable multiprocessor with Poznanovic’s
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`teaching to improve system performance using a hybrid multiprocessor comprised
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`of reconfigurable processors and conventional static microprocessors working
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`independently and in a parallel as expressly taught by Poznanovic. Poznanovic
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`teaches dividing the processing of application programs among the reconfigurable
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`processors and conventional static microprocessors to achieve optimum
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`6
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`Intel Exhibit 1045 - 8
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`performance. EX1046 ¶[0019]; see also id. ¶¶ [0006]–[0007], [0027] & [0039].
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`Because Zhang and Gupta teach a reconfigurable processor for use in a
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`multiprocessor and scalable system, and Poznanovic teaches that a multiprocessor
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`system’s performance is improved by arranging the reconfigurable processors in
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`parallel with conventional microprocessors for independent operations, the
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`references themselves provide an express motivation to combine their respective
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`teachings.
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`12.
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`In addition to the express teachings to combine, a POSA at the time of
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`the ’867 patent would have been motivated to combine these teachings because
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`such a combination amounts to a simple substitution of one known element for
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`another (i.e., replacing Poznanovic’s reconfigurable processor with the
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`reconfigurable processor of Zhang and Gupta) to obtain predictable results (i.e.,
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`arranging Zhang-Gupta’s reconfigurable processor in parallel with one or more
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`conventional microprocessors for independent operations in a hybrid
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`multiprocessor system to improve performance.). Similarly, such a combination
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`involves the use of a known technique (Poznanovic’s hybrid multiprocessor
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`configuration for dividing the processing of application programs among
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`reconfigurable processors and conventional static microprocessors to achieve
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`optimum performance) to improve similar devices (Zhang-Gupta’s reconfigurable
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`multiprocessor) in the same way. These references concern the same field and
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`7
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`Intel Exhibit 1045 - 9
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`attempt to solve the same problems by using reconfigurability to overcome the
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`deficiencies of having fixed hardware in conventional microprocessors. See, e.g.
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`EX1003-14 C1:24-30; EX1046 ¶[0009].
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`13. Moreover, Chien shows that a POSA would have a reasonable
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`expectation of success in making the combination of Zhang-Gupta’s reconfigurable
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`processor with the hybrid multiprocessor system taught by Poznanovic. Chien’s
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`Figures 1 and 2 illustrate examples of the MORPH reconfigurable multiprocessor
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`system architecture with multiple processing and memory elements configured on
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`a multi-chip module (“MCM”) using a scalable interconnect:
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`EX1005 Figs. 1 & 2; see also id.-10 C2:28-39. As Chien explains, “[v]arying the
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`mix of processing elements and memory elements supports a wide range of
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`machine configurations.” EX1005-10 C2:17-19; see also id. C1:36-C2:17. Thus,
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`Chien demonstrates that a POSA would have a reasonable expectation of success
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`in implementing Zhang-Gupta’s reconfigurable processor in a hybrid
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`multiprocessor system such as the one taught by Poznanovic. A POSA at the time
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`would have understood the implementation in Poznanovic to permit an overall
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`8
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`Intel Exhibit 1045 - 10
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`multiprocessor system that benefits from the contributions of each of the different
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`types of processors.
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`14. Thus, in my view it would have been obvious to a POSA to arrange
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`the Zhang-Gupta-Chien reconfigurable processor in a parallel configuration with a
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`conventional microprocessor in a hybrid multiprocessor system such as that taught
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`by Poznanovic. A POSA would have understood the advantage of such a
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`multiprocessor system to be in dividing up application programs into parts that can
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`be performed better on either the reconfigurable processor using synthesized logic
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`or the conventional microprocessor using processor code. See, e.g., EX1046
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`¶[0027].
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`15. Accordingly, the instituted combination in view of Poznanovic’s
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`teachings renders obvious Patent Owner’s “independent of and in parallel with”
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`amendment.
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`IV. RESERVATION OF RIGHTS
`16. My opinions are based upon the information that I have considered to
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`date. I reserve the right, however, to supplement my opinions in the future to
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`respond to any arguments or to consider new information that becomes available to
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`me.
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`V. CONCLUSION
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`17. For the reasons set forth above, it is my opinion that the “independent
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`9
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`Intel Exhibit 1045 - 11
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`Declaration in Support of Intel’s Response to Patent Owner’s Revised Motion to Amend
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`of and in parallel with” claim amendments in the Patent Owner’s Revised Motion
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`to Amend are unpatentable over the instituted combination of prior art references
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`in view of Poznanovic.
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`I declare that all statements made herein are true and accurate and were
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`made with the knowledge that willful false statements are punishable by fine or
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`imprisonment, or both, under Section 1001 of Title 18 of the United States Code.
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`By: ____________________________________
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` Stanley Shanfield Ph.D.
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`Date: ________11/10/2021___________________________
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`10
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`Intel Exhibit 1045 - 12
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