Trials@uspto.gov
`Tel: 571-272-7822
`
`
`Paper 38
`Entered: September 15, 2021
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`INTEL CORPORATION and XILINX, INC.1,
`Petitioner,
`
`v.
`
`FG SRC LLC,
`Patent Owner.
`____________
`
`IPR2020-01449
`Patent 7,149,867 B2
`____________
`
`
`
`
`Before KALYAN K. DESHPANDE, Senior Lead Administrative Patent
`Judge, GREGG I. ANDERSON and KARA L. SZPONDOWSKI,
`Administrative Patent Judges.
`
`SZPONDOWSKI, Administrative Patent Judge.
`
`
`PRELIMINARY GUIDANCE
`PATENT OWNER’S MOTION TO AMEND
`
`
`
`
`
`
`
`1 Xilinx, Inc. filed a motion for joinder and petition in IPR2021-00633,
`which were granted, and, therefore, has been joined as petitioner in this
`proceeding.
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`IPR2020-01449
`Patent 7,149,867 B2
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`INTRODUCTION
`I.
`On March 3, 2021, we instituted trial of claims 1–19 of U.S. Patent
`No. 7,149,867 B2 (the “’867 patent”). Paper 13 (“Inst. Dec.”). After
`institution, FG SRC LLC (“Patent Owner”) filed a Patent Owner’s Motion to
`Amend.2 Paper 26 (“Motion” or “Mot.”). In its Motion, Patent Owner
`proposes that we amend the ’867 patent to replace claims 1–19 with
`substitute claims 20–38. Mot. 2, 4, 8, 10, 18. Patent Owner submitted a
`declaration of William Mangione-Smith, Ph.D., in support of its Motion.
`Ex. 2027. Intel Corporation (“Petitioner”) filed an Opposition to the Motion
`to Amend. Paper 36 (“Opposition” or “Opp.”). Petitioner submitted a
`declaration of Stanley Shanfield, Ph.D., in support of its Opposition. Ex.
`1034.
`
`In the Motion, Patent Owner requests that we provide preliminary
`guidance regarding the Motion in accordance with the Board’s pilot program
`concerning motion to amend practice and procedures. Mot. 2; see also
`Notice Regarding a New Pilot Program Concerning Motion to Amend
`Practice and Procedures in Trial Proceedings under the America Invents Act
`before the Patent Trial and Appeal Board, 84 Fed. Reg. 9,497
`(Mar. 15, 2019) (providing a patent owner with the option to receive
`preliminary guidance from the Board on its motion to amend) (“Notice”).
`We have considered Patent Owner’s Motion and Petitioner’s Opposition.
`
`2 Patent Owner filed a timely Response on July 2, 2021, addressing the
`original claims of the ’867 patent. See Paper 34; see also Paper 32 (revising
`due date No. 1). Accordingly, we construe Patent Owner’s Motion to
`Amend to be contingent on a finding that the “a preponderance of the
`evidence establishes that the original patent claim it replaces is
`unpatentable.” Lectrosonics, Inc. v Zaxcom, Inc., Case IPR2018-01129,
`Paper 15 at 3 (PTAB Feb. 25, 2019) (precedential).
`2
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`In this Preliminary Guidance, we provide information indicating our
`initial, preliminary, and non-binding views on whether Patent Owner has
`shown a reasonable likelihood that it has satisfied the statutory and
`regulatory requirements associated with filing a motion to amend in an inter
`partes review and whether Petitioner (or the entirety of the record)
`establishes a reasonable likelihood that the substitute claims are
`unpatentable. See 35 U.S.C. § 316(d) (2018); 37 C.F.R. § 42.121 (2019);
`Lectrosonics, Paper 15; see also Notice, 84 Fed. Reg. at 9,497 (“The
`preliminary guidance . . . provides preliminary, non-binding guidance from
`the Board to the parties about the [motion to amend].”).
`For purposes of this Preliminary Guidance, we focus on the proposed
`substitute claims, and specifically on the amendments proposed in the
`Motion. See Notice, 84 Fed. Reg. at 9,497. We do not address the
`patentability of the originally challenged claims. See Notice, 84 Fed. Reg. at
`9,497. Moreover, in formulating our preliminary views on the Motion and
`Opposition, we have not considered the parties’ other substantive papers on
`the underlying merits of Petitioner’s challenges. We have considered,
`however, our Institution Decision (Paper 13) in determining whether the
`amendments “respond to a ground of unpatentability involved in the trial.”
`Lectrosonics, Paper 15 at 5. We emphasize that the views expressed in this
`Preliminary Guidance are subject to change upon consideration of the
`complete record, including any revision to the Motion filed by Patent
`Owner. Thus, this Preliminary Guidance is not binding on the Board when
`rendering a final written decision. See Notice, 84 Fed. Reg. at 9,500.
`
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`PRELIMINARY GUIDANCE
`II.
`A. Statutory and Regulatory Requirements
`For the reasons discussed below, at this stage of the proceeding, and
`based on the current record, it appears that Patent Owner has not shown a
`reasonable likelihood that it has satisfied the statutory and regulatory
`requirements associated with filing a motion to amend.
`1. Reasonable Number of Substitute Claims
`
`Does Patent Owner propose a reasonable number of substitute
`claims? (35 U.S.C. § 316(d)(1)(B))
`Yes. Patent Owner proposes no more than 1 substitute claim for each
`originally challenged claim. Mot. 2, 12–15, 18–22. Petitioner does not
`argue otherwise. See generally Opp.
`
`2. Respond to Ground of Unpatentability
`
`Does the Motion respond to a ground of unpatentability involved in
`the trial? (37 C.F.R. § 42.121(a)(2)(i))
`Yes. Patent Owner responds to a ground of unpatentability at pages 5–11
`of the Motion. At this stage of the proceeding, upon review of Patent
`Owner’s arguments, we agree that proposed substitute independent claims
`20, 28, and 32 recite new limitations and new combinations of limitations
`that directly respond to a ground of unpatentability involved in the trial.
`See Mot. App. A.
`Petitioner contends the Motion does not respond to a ground of
`unpatentability. See Opp. 6–7, 20, 22–23. In particular, Petitioner argues
`that the following added limitations proposed by Patent Owner do not
`respond to any ground of unpatentability:
`for substitute claim 20, “the data prefetch unit transfer[ring] only
`(1)
`computational data required by the algorithm from a second memory . . .
`and plac[ing] the computational data in the first memory”;
`for substitute claim 28, “a data prefetch unit to read data, including
`(2)
`computational data, and write only computational data required for
`computations by the algorithm between the data prefetch unit and the
`common memory”; and
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`for substitute claim 32, “the computational unit and the data access
`(3)
`unit, and the data prefetch unit . . . transfer[ring] only data necessary for
`computations by the computational unit to the data access units.”
`Mot., App. A; see Opp. 6–7, 20, 22–23.
`For example, Petitioner argues the above-mentioned limitations proposed
`by Patent Owner do not have “any relationship to the instituted grounds or
`prior art” and “cannot possibly be responsive to any ground of
`unpatentability.” See Opp. 6, 20, 22–23.
`On the current record, Petitioner’s arguments are unpersuasive for the
`following reasons. In the Petition, Petitioner argued that original claims 1,
`9, and 13 of the ’867 patent were unpatentable because (i) the combination
`of Zhang and Gupta teaches claim 1’s “data prefetch unit [that] retrieves
`only computational data required by the algorithm from a second memory
`. . . and places the retrieved computational data in the first memory” (Pet.
`36–40), (ii) the Zhang-Gupta-Chien combination’s reconfigurable
`processor teaches claim 9’s “data prefetch unit to read and write only data
`required for computations by the algorithm between the data prefetch unit
`and the common memory” (Pet. 85), and (iii) the combination of Zhang
`and Gupta teaches claim 13’s “computational unit and the data access unit,
`and the data prefetch unit . . . transfer only data necessary for
`computations by the computational unit” (Pet. 67, 69). In our Institution
`Decision, we determined, for purposes of institution, the combination of
`Zhang and Gupta teaches claim 1’s “data prefetch unit retrieves only
`computational data required by the algorithm from a second memory . . .
`and places the retrieved computational data in the first memory” (see Inst.
`Dec. 53–57) and claim 13’s “computational unit and the data access unit,
`and the data prefetch unit . . . transfer only data necessary for
`computations by the computational unit” (see Inst. Dec. 64–65), and
`further determined the combination of Zhang, Gupta, and Chien teaches
`claim 9’s “data prefetch unit to read and write only data required for
`computations by the algorithm between the data prefetch unit and the
`common memory” (see Inst. Dec. 72–73). In the Motion, Patent Owner
`explains that the added limitations in proposed substitute claims 20, 28,
`and 32 are “responsive to . . . ground[s] for institution.” Mot. 5, 7–11.
`Particularly, Patent Owner explains the added limitations in proposed
`substitute claims 20 and 32 (which modify the limitations of original
`claims 1 and 13 discussed supra) respond to Petitioner’s ground of
`unpatentability based on Zhang and Gupta, and the added limitation in
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`proposed substitute claim 28 (which modifies the limitation of original
`claim 9 discussed supra) responds to Petitioner’s ground of unpatentability
`based on Zhang, Gupta, and Chien. Mot. 5, 7–11.
`For purposes of this preliminary guidance and based on the current record,
`we are persuaded that Patent Owner’s amendments in proposed substitute
`claims 20, 28, and 32 respond to the two grounds of unpatentability that
`were instituted by the Board in the Decision to Institute. See Mot. 5, 7–11;
`Inst. Dec. 53–57, 64–65, 72–73.
`
`3. Scope of Amended Claims
`
`Does the amendment seek to enlarge the scope of the claims?
`(35 U.S.C. § 316(d)(3); 37 C.F.R. § 42.121(a)(2)(ii))
`Yes, as to substitute claims 20, 28, and 32. On the current record, we are
`preliminarily persuaded that the proposed substitute claims seek to enlarge
`the scope of the claims in violation of 35 U.S.C. § 316(d)(3) and
`37 C.F.R. § 42.121(a)(2)(ii).
`Proposed substitute claim 20
`In its Motion, Patent Owner proposes substitute independent claim 20,
`which corresponds to original independent claim 1. Mot. 4, 19 (App. A).
`While substitute claim 20 adds certain limitations (e.g., “wherein
`computations performed by the algorithm are performed by an FPGA), it
`also removes a potential limitation by reciting “wherein the data prefetch
`unit transfers only computational data required by the algorithm from a
`second memory . . . and places the computational data in the first
`memory.” See Mot. 19 (App. A).
`More particularly, Patent Owner proposes replacing original claim 1’s
`limitation of “the data prefetch unit retrieves only computational data
`required by the algorithm from a second memory . . . and places the
`retrieved computational data in the first memory,” with substitute claim
`20’s limitation of “the data prefetch unit transfers only computational data
`required by the algorithm from a second memory . . . and places the
`computational data in the first memory.”3 Mot. 19 (App. A). Petitioner
`
`
`3 Petitioner calls this amendment the “data movement amendment” of
`substitute claim 20. See Opp. 3–4.
`
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`argues this amendment in substitute claim 20 would broaden the scope of
`challenged claim 1. Opp. 3–6. In particular, Petitioner argues:
`the change [effected by this amendment in claim 20] allows for
`the retrieval of more than just “computational data required by
`the algorithm.” The amended claim’s “only” limitation restricts
`what the data prefetch unit transfers and places in the first
`memory, but it does not restrict what is retrieved from the second
`memory. . . . A system with a data prefetch unit that retrieves
`computational data required by the algorithm and other data
`from a second memory would be within the amended claim’s
`scope but not the original claim’s scope because the original
`claim requires that the data prefetch unit retrieve “only
`computational data required by the algorithm from a second
`memory.”
`Opp. 5.
`
`At this stage of the proceeding, we agree with Petitioner’s assessment of
`this proposed amendment for substitute claim 20. The amended limitation
`in claim 20 restricts what the data prefetch unit transfers from second to
`first memory, while original claim 1 restricts what the data prefetch unit
`retrieves from the second memory. Thus, we agree with Petitioner that
`although substitute claim 20 restricts what is transferred from the second
`to the first memory, it appears to allow retrieval by the prefetch unit of
`more than “only computational data required by the algorithm”; on the
`other hand, original claim 1 restricts the prefetch unit’s retrieval to “only
`computational data required by the algorithm.” Thus, Patent Owner’s
`amendment in substitute claim 20 appears to broaden the scope of original
`claim 1.
`We further note Patent Owner’s argument that “this amendment does not
`broaden the proper scope of the claim” (see Mot. 7) does not address the
`language proposed in substitute claim 20. Relying on supporting
`testimony from Dr. Mangione-Smith, Patent Owner argues “[t]he claim is
`narrowed by explicitly not covering a situation where some data is read
`from the second memory but not placed in the first memory.” Mot. 7
`(citing Ex. 2027 ¶ 24) (emphasis added). We remain unpersuaded.
`Contrary to Patent Owner’s argument (see Mot. 7), substitute claim 20’s
`amendment appears to allow a scenario in which some data retrieved from
`the second memory is not transferred to or placed in the first memory
`
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`(because claim 20 restricts what is transferred and placed, not what is
`retrieved). See Opp. 6.
`Accordingly, for these reasons, for purposes of this preliminary guidance
`and based on the current record, we agree with Petitioner that proposed
`substitute claim 20 would enlarge the scope of original claim 1 and
`therefore does not comply with the statutory and regulatory requirement.
`Proposed substitute claim 28
`In its Motion, Patent Owner proposes substitute independent claim 28,
`which corresponds to original independent claim 9. Mot. 8, 19–20 (App.
`A). While substitute claim 28 adds certain limitations (e.g., “computations
`performed by the algorithm are performed by an FPGA”), it also removes
`limitations by reciting “a data prefetch unit to read data, including
`computational data, and write only computational data required for
`computations by the algorithm between the data prefetch unit and the
`common memory.”
`More particularly, Patent Owner proposes replacing original claim 9’s
`limitation of “a data prefetch unit to read and write only data required for
`computations by the algorithm between the data prefetch unit and the
`common memory” with substitute claim 28’s limitation of “a data prefetch
`unit to read data, including computational data, and write only
`computational data required for computations by the algorithm between
`the data prefetch unit and the common memory.”4 Mot. 20 (App. A).
`Petitioner argues this amendment in substitute claim 28 broadens the scope
`of original claim 9 because:
`[the data movement amendment] removes the requirement that
`the data prefetch unit must read only “data required for
`computations” and instead broadens the limitation to allow the
`data prefetch unit to read any data, regardless of whether it is
`required for computations by the algorithm. It achieves that by
`injecting “data, including computational data” before the
`negative restriction invoked by the original claim’s use of the
`word “only.” That is, where the original claim used “only” to
`restrict the data prefetch unit’s read and write operations to data
`type (data required for computations), PO’s change removes that
`
`4 Petitioner calls this amendment the “data movement amendment” of
`substitute claim 28. See Opp. 18.
`
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`restriction from the read operation and keeps it only for the write
`operation. That broadens the original claim’s scope because a
`system with a prefetch unit that reads more than just “data
`required for computations” would be within the scope of the
`amended claim but not the original claim.
`Opp. 18–19.
`
`At this stage of the proceeding, we agree with Petitioner’s assessment of
`this proposed amendment for substitute claim 28. The amended limitation
`of “a data prefetch unit to read data, including computational data, and
`write only computational data required for computations” appears to be
`broader than its replaced limitation of “a data prefetch unit to read and
`write only data required for computations.” That is because the amended
`limitation removes the restriction of the data prefetch unit reading only
`data required for computations. In other words, in original claim 9, the
`data prefetch unit reads only data required for computations (by the
`algorithm between the data prefetch unit and the common memory), while
`in substitute claim 28, the data prefetch unit broadly reads data (including
`computational data required for computations by the algorithm).
`We further note Patent Owner’s argument that “this amendment does not
`broaden the proper scope of the claim” (see Mot. 10) does not address the
`language proposed in substitute claim 28. Relying on supporting
`testimony from Dr. Mangione-Smith, Patent Owner argues “[t]he claim is
`narrowed by explicitly not covering a situation where some data is read
`from the second memory but not placed in the first memory.” Mot. 10
`(citing Ex. 2027 ¶ 28) (emphasis added). However, substitute claim 28’s
`amendment actually includes a scenario in which the prefetch unit reads
`data that (i) is not data required for computations by the algorithm and (ii)
`is not further written to the common memory.
`Accordingly, for these reasons, for purposes of this preliminary guidance
`and based on the current record, we agree with Petitioner that proposed
`substitute claim 28 would enlarge the scope of original claim 9 and
`therefore does not comply with the statutory and regulatory requirement.
`Proposed substitute claim 32
`In its Motion, Patent Owner proposes substitute independent claim 32,
`which corresponds to original independent claim 13. Mot. 10, 20–21
`(App. A). While substitute claim 32 adds certain limitations (e.g., “the
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`computational unit is implemented in an FPGA”), it also removes a
`limitation by reciting “the computational unit and the data access unit, and
`the data prefetch unit . . . transfer only data necessary for computations by
`the computational unit to the data access units.” See Mot. 21 (App. A).
`More particularly, Patent Owner proposes replacing original claim 13’s
`limitation of “the computational unit and the data access unit, and the data
`prefetch unit are configured to . . . transfer only data necessary for
`computations by the computational unit,” with substitute claim 32’s
`limitation of “the computational unit and the data access unit, and the data
`prefetch unit are configured to . . . transfer only data necessary for
`computations by the computational unit to the data access units.”5 Mot. 21
`(App. A). Petitioner argues this amendment in substitute claim 32
`broadens the scope of original claim 13. Opp. 21–22. In particular,
`Petitioner argues:
`PO’s amendment enlarges original claim 13 by removing
`restrictions on . . . how the data prefetch unit moves data.
`Claim 13 requires both “transferring data between a memory and
`a data prefetch unit” and “transferring the data between a
`computational unit and a data access unit.” . . . The claim limits
`both transfer operations to “transfer only data necessary for
`computations by the computational unit.” . . . Thus, the negative
`restriction invoked by “only” applies to any transfer between a
`memory and a data prefetch unit and any transfer between a
`computational unit and a data access unit. . . .
`PO adds language [in claim 32] that effectively removes
`that negative restriction from applying to transfers between the
`memory and data prefetch unit to instead apply only to one-way
`transfers to the data access unit. . . . That is, the original claim’s
`“only” restriction applies to both of the claimed data transfers—
`between a memory and a data prefetch unit and between a
`computational unit and a data access unit—whereas PO’s
`addition modifies that negative restriction to apply only to
`transfers “to the data access unit.” That change broadens the
`original claim’s scope such that a system in which the data
`prefetch unit transfers other data from memory (besides or in
`addition
`to “data necessary
`for computations by
`the
`
`5 Petitioner calls this amendment the “data movement amendment” of
`substitute claim 32. See Opp. 21.
`
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`computational unit”) would be within the scope of the amended
`claim but not the original claim.
`Opp. 21–22.
`
`At this stage of the proceeding, we agree with Petitioner’s assessment of
`this proposed amendment for substitute claim 32. The amended limitation
`in substitute claim 32 restricts the transfer of data (to only data necessary
`for computations by the computational unit) between (i) the computational
`unit and data access units6 and between (ii) the data prefetch unit and data
`access units, while original claim 13 restricts transfer of this data between
`(i) the computational unit and the data access unit, and between (ii) the
`data prefetch unit and a memory (since claim 13’s “transfer only data
`necessary for computations by the computational unit” applies to all
`previously recited “transfer” operations of “transferring data between a
`memory and a data prefetch unit” and “transferring the data between a
`computational unit and the data access unit”). Thus, Patent Owner’s
`amendment in substitute claim 32 appears to broaden the scope of original
`claim 13 because substitute claim 32 does not restrict the transfer of data
`between the data prefetch unit and the memory.
`We further note Patent Owner’s argument that “[t]his [transfer]
`amendment does not broaden the proper scope of the claim” (see Mot. 11–
`12) does not address the language proposed in substitute claim 32.
`Relying on supporting testimony from Dr. Mangione-Smith, Patent Owner
`argues “[t]he claim is narrowed by explicitly not covering a situation
`where some data is read from the second memory but not placed in the
`first memory.” Mot. 12 (citing Ex. 2027 ¶ 32) (emphasis added). Neither
`substitute claim 32 nor original claim 13, however, recites reading data
`between first and second memories.
`Accordingly, for these reasons, for purposes of this preliminary guidance
`and based on the current record, we agree with Petitioner that proposed
`substitute claim 32 would enlarge the scope of original claim 13 and
`therefore does not comply with the statutory and regulatory requirements.
`
`
`6 We additionally note “the data access units” recited in substitute claim 32
`do not appear to have antecedent basis because only one “data access unit” is
`recited earlier in the claim. Patent Owner may wish to address this in a reply
`or revised motion to amend in this proceeding.
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`4. New Matter
`
`Does the amendment seek to add new subject matter? (35 U.S.C.
`§ 316(d)(3); 37 C.F.R. § 42.121(a)(2)(ii))
`No. On this record, Patent Owner appears to have identified adequate
`written description support for proposed substitute claims 20–38.
`Mot. 12–15, 18–21. Petitioner does not argue otherwise. See generally
`Opp.
`Thus, at this stage of the proceeding, on the record before us, Patent
`Owner has shown a reasonable likelihood that there is adequate written
`description support in the original disclosure of the ’867 patent for
`proposed substitute claims 20–38.
`
`
`
`B. Patentability
`For the reasons discussed below, at this stage of the proceeding and
`based on the current record,7 it appears that Petitioner (or the record) has
`shown a reasonable likelihood that proposed substitute claims 20, 28, and 32
`are unpatentable.
`
`Does the record establish a reasonable likelihood that the proposed
`substitute claims are unpatentable?
`I. Obviousness
`Yes, as to substitute claims 20, 28, and 32.
`On this record, it appears that Petitioner (or the record) has shown a
`reasonable likelihood that proposed substitute claims 20, 28, and 32 are
`unpatentable as obvious over the various combinations of art asserted by
`Petitioner: (1) claims 20 and 32 over Zhang and Gupta; (2) claims 20 and
`32 over Zhang, Gupta, and newly cited Trimberger (Ex. 1037); (3) claim
`
`
`7 As discussed above, we express no view on the patentability of the original
`claims in this Preliminary Guidance. Instead, we focus on limitations added
`to those claims in Patent Owner’s Motion to Amend.
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`28 over Zhang, Gupta, and Chien; and (4) claim 28 over Zhang, Gupta,
`Chien, and Trimberger.
`Proposed substitute claim 20
`Proposed substitute claim 20 corresponds to original claim 1 and adds new
`limitations. See Mot. 19 (App. A). Petitioner contends the added
`limitations in substitute claim 20 are taught or suggested by Zhang, Gupta,
`and the newly cited Trimberger. Opp. 7–17. We discuss below each of
`the new limitations in substitute claim 20 that Patent Owner’s Motion to
`Amend proposes to add to original claim 1.
`(a) Limitation of claim 20 reciting “the data prefetch unit transfers only
`computational data required by the algorithm from a second memory
`. . . and places the computational data in the first memory”8
`The record indicates a reasonable likelihood that Zhang teaches this
`limitation.
`Specifically, Petitioner argues that “PO’s data movement amendment
`enlarges claim 1’s scope. . . . Thus, this amendment is obvious for the
`same reasons as the original claim.” Opp. 7. At this stage of the
`proceeding, we agree with Petitioner’s assessment. More particularly (and
`as discussed in our Institution Decision), Zhang’s second case study
`illustrated by Fig. 5 discloses a data prefetch unit that moves only
`computational data required by a sparse matrix-matrix multiply routine
`from a second memory (memory module/main memory shown in Fig. 5)
`to a first memory (cache shown in Fig. 5). See Ex. 1003, 16, Fig. 5; see
`also Inst. Dec. 56–57. For example, Zhang discloses a sparse matrix-
`matrix multiplication is performed by “architectural customization [that]
`aims to send only used fields of matrix elements during a given
`computation to reduce bandwidth requirement using dynamic scatter and
`gather” by
`prefetching of whole rows or columns using pointer
`chasing in the memory module and packing/gathering of
`only the used fields of the matrix element structure. When
`the root pointer of a column or row is accessed, the gather
`logic in the main memory module chases the row or
`
`
`8 Petitioner calls this amendment “data movement amendment” of substitute
`claim 20. See Opp. 7.
`
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`column pointer to retrieve different matrix elements and
`forwards them directly to the cache.
`See Ex. 1003, 16 (emphases added), Fig. 5 (illustrating prefetching
`between a main memory module and a cache). Zhang further discloses the
`matrix elements forwarded to the cache are placed into “one part [of the
`cache] for the prefetched matrix elements only.” See Ex. 1003, 16. Thus,
`in Zhang, only used fields of matrix elements during a given computation
`are sent from the main memory (second memory) to the cache (first
`memory, see Zhang’s Fig. 5), by prefetching using pointer chasing in the
`memory module (second memory) and packing/gathering only the used
`fields of the matrix element structure. See Ex. 1003, 16; see also Inst.
`Dec. 56. Therefore, in our view on the current record, Zhang teaches a
`data prefetch unit that transfers only computational data required by the
`algorithm from a second memory (memory module/main memory in
`Fig. 5) and places the computational data in the first memory (cache in
`Fig. 5), as recited in substitute claim 20.
`We further note that Patent Owner’s argument—that substitute claim 20’s
`“data prefetch unit [that] transfers computational data from the second
`memory to the first memory” is an amendment that “addresses the prior art
`examples directed to sparse-matrix operations where descriptors for the
`sparse-matrix data are read, in order to retrieve the computational data but
`are not computational data themselves” (see Mot. 7)—does not explain
`why Zhang does not actually teach the limitation in substitute claim 20.
`Patent Owner asserts “descriptors for the sparse-matrix data are read . . .
`but [the descriptors] are not computational data themselves.” See Mot. 7
`(citing Ex. 2027). Patent Owner’s assertion does not explain why
`substitute claim 20’s transferred computational data required by the
`algorithm would exclude Zhang’s used fields of matrix elements that are
`transferred from the memory module and placed in the cache (in Fig. 5).
`See Ex. 1003, 16, Fig. 5.
`For these reasons, at this stage of the proceeding, we view the current
`record as supporting Petitioner’s argument that Zhang teaches the added
`limitation of a “data prefetch unit transfers only computational data
`required by the algorithm from a second memory . . . and places the
`computational data in the first memory” recited in proposed substitute
`claim 20.
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`(b) Limitation of claim 20 reciting “wherein computations performed by
`the algorithm are performed by an FPGA”9
`In its Motion to Amend, Patent Owner argues that the added limitation of
`the computations performed by the algorithm being performed by an
`FPGA is not taught by Zhang, Gupta, or Chien. Mot. 5. Patent Owner
`contends this limitation in substitute claim 20 “explicitly excludes the use
`of a conventional CPU as the computational unit of the claimed
`reconfigurable processor together with only limited reprogrammable
`peripheral components from the claim scope.” Mot. 6. As such, Patent
`Owner argues the cited art does not teach the claim limitation because
`(i) “the Zhang, Gupta, and Chien prior art . . . relies on the use of a CPU
`together with only ‘small pockets of reprogrammable logic.’” Mot. 6.
`With respect to Zhang, Patent Owner argues that “[it] discloses that ‘the
`processor running the main application is a conventional CPU, not a
`reconfigurable processor’” and “discloses the use of programmable logic
`(i.e., an FPGA) ‘only as means to deliver data for use by that conventional
`CPU.’” Mot. 6–7 (citing Ex. 2027).
`Although, on this record, we agree with Patent Owner’s arguments that
`Zhang does not explicitly disclose that computations performed by the
`algorithm (e.g., by a sparse matrix-matrix multiplication routine) are
`performed by an FPGA10 (see Mot. 6–7), Patent Owner has not
`sufficiently explained why Gupta would not teach or at least suggest the
`FPGA limitation of substitute claim 20. As Petitioner notes:
`in
`Gupta
`discloses
`performing
`computations
`programmable logic such as FPGAs. See EX1004-8
`C1:48-51
`(“Architectural adaptation
`refers
`to
`the
`capability of a machine to support multiple architectural
`mechanisms and policies that can be tailored to application
`and/or data needs . . . [, including] tailoring the interaction
`
`9 Petitioner calls this amendment the “data computation amendment” of
`substitute claim 20. See Opp. 8.
`10 Here, we note that Zhang’s generic reference to FPGAs in § 4.3
`(discussing implementation costs of “around 1500 in FPGA CLBs,” see Ex.
`1003, 17) appears insufficient to teach that computations performed by the
`sparse matrix-matrix multiplication routine in Fig. 5 are performed by an
`FPGA.
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`of processing with I/O, customization of CPU elements
`(e