Trials@uspto.gov
`571-272-7822
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` Paper 52
`Entered: January 28, 2022
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`INTEL CORPORATION AND XILINX, INC.,
`Petitioner,
`
`v.
`
`FG SRC LLC,
`Patent Owner.
`____________
`
`IPR2020-01449
`Patent 7,149,867 B2
`____________
`
`Record of Oral Hearing
`Held Virtually: Thursday, January 6, 2022
`____________
`
`
`Before KALYAN K. DESHPANDE, GREGG I. ANDERSON, and
`KARA L. SZPONDOWSKI, Administrative Patent Judges.
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`571-272-7822
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` Paper 52
`Entered: January 28, 2022
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`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`INTEL CORPORATION AND XILINX, INC.,
`Petitioner,
`
`v.
`
`FG SRC LLC,
`Patent Owner.
`____________
`
`IPR2020-01449
`Patent 7,149,867 B2
`____________
`
`Record of Oral Hearing
`Held Virtually: Thursday, January 6, 2022
`____________
`
`
`Before KALYAN K. DESHPANDE, GREGG I. ANDERSON, and
`KARA L. SZPONDOWSKI, Administrative Patent Judges.
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`IPR2020-01449
`Patent 7,149,867 B2
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`A P P E A R A N C E S
`
`ON BEHALF OF THE PETITIONER:
`
`
`BRIAN C. NASH, ESQUIRE
`EVAN FINKEL, ESQUIRE
`MATTHEW W. HINDMAN, ESQUIRE
`AUSTIN SCHNELL, ESQUIRE
`PILLSBURY WINTHROP SHAW PITTMAN, LLP
`401 Congress Avenue, Suite 1700
`Austin, Texas 78701
`
`AND
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`DAVID M. HOFFMAN, ESQUIRE
`FISH & RICHARDSON, P.C.
`111 Congress Avenue, Suite 810
`Austin, Texas 78701
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`
`ON BEHALF OF THE PATENT OWNER:
`
`
`JAY P. KESAN, ESQUIRE
`CECIL E. KEY, ESQUIRE
`HENNING SCHMIDT, ESQUIRE
`DiMuroGinsberg, P.C. DGKEYIP GROUP
`1101 King Street, Suite 610
`Alexandria, Virginia 22314
`
`The above-entitled matter came on for hearing on Thursday, January
`6, 2022, commencing at 1:35 p.m., EST, by video/by telephone.
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`IPR2020-01449
`Patent 7,149,867 B2
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` (Proceedings begin at 1:35 p.m.)
` JUDGE SZPONDOWSKI: Good afternoon. Good to see
`everyone.
` We have our final hearing in IPR 2020-1449 between
`Petitioner Intel Corporation and Patent Owner FG SRC.
` So let me introduce the Panel. I'm Judge
` Szpondowski, and joining me are Judge Deshpande and Judge
` Anderson.
` So let's get started first with the parties'
` appearances.
` Who do we have for Petitioner Intel?
` MR. NASH: Your Honor, Brian Nash of Pillsbury
`Winthrop Shaw Pittman here on behalf of Petitioner Intel
`Corporation.
` I'm also joined on the line by a few others of my
`colleagues, including Matt Hindman and Evan Finkel. I
`believe they're on the public line.
` And then I have present in the room today with me,
` it is Austin Schnell, also of Pillsbury, and then David
` Hoffman of Fish & Richardson who represents Petitioner
` Xilinx.
` JUDGE SZPONDOWSKI: Okay. Thank you.
` Mr. Nash, could you possibly -- do you have like a
`microphone that you could move a little closer? I can see --
`you're a bit hard to hear.
` MR. NASH: Understood, Your Honor. (Indiscernible)
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`the solution, it's a little bit closer.
` JUDGE SZPONDOWSKI: Okay. Okay.
` And for patent owner, FG SRC.
` MR. KESAN: Your Honors, I'm Jay Kesan from DiMuro
`Ginsberg for the Patent Owner FG SRC.
` On the public line with me is Cecil Key and Henning
`Schmidt.
` JUDGE SZPONDOWSKI: Okay, great. Welcome, everyone.
` Since we're on the video -- I'm hearing a bit of an
` echo, so I'm going to get there, but when you're not
` speaking, if you could please mute yourself.
` Thank you.
` Okay. So I'd like to start off first by clarifying
` a few items.
` Our primary concern is your right to be heard, so if
` at any time during the proceeding you encounter technical or
` other difficulties that you feel fundamentally undermines
` your ability to adequately represent your client, please let
`us know immediately, such as, for example, contacting the
`team member who provided you with connection information.
` Second, as I said, when not speaking, please mute
`yourself.
` Third, please identify yourself each time you speak.
`This will help the court reporter to prepare an accurate
`transcript.
` Fourth, we have the entire record, including the
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`demonstratives, so when referring to demonstratives, papers,
`or exhibits, please do so clearly and explicitly by slide or
`page number. Please also pause a few seconds after
`identifying it so that -- to provide us some time to find
`it, and this will also help the preparation of an accurate
`transcript of the hearing.
` Finally, please be aware that members of the public
`may be listening to this oral hearing.
` We set forth the procedure for today's hearing in
`our November 30th, 2021 order, but just as a reminder, each
`party will have 60 minutes of total time to present your
`arguments.
` Petitioner has the burden of proof as to whether the
`challenged claims are unpatentable and will go first.
` Petitioner will also address patent owner's proposed
` substitute claims. And then patent owner will present
` opposition arguments. Then, to the extent that petitioner
` has reserved time, petitioner will present rebuttal. And
` then, to the extent patent owner has reserved time, patent
` owner will present surrebuttal.
` The rebuttal and surrebuttal time may not be more
` than half of the parties' total argument time.
` We also want to remind the parties not to interrupt
` the other party while the other party is presenting its
` arguments and demonstratives. If a party believes that a
` demonstrative or argument presented by the other party is
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` objectionable for any reason, then you should raise that
` objection or any arguments relating to that objection during
` your own time.
` Does counsel for Petitioner Intel have any questions
` before we get started?
` MR. NASH: No, Your Honor.
` Is the sound quality better now? Can you hear me a
`little bit more clearly?
` JUDGE SZPONDOWSKI: Yes, it's much better. Thank
`you.
` MR. NASH: Okay. Sorry about that, Your Honor.
`Thank you.
` JUDGE SZPONDOWSKI: And does counsel for patent
`owner have any questions?
` MR. KESAN: No, Your Honors.
` I hope everyone can hear me fine.
` JUDGE SZPONDOWSKI: Yes, we can hear you great.
` MR. KESAN: Thank you.
` JUDGE SZPONDOWSKI: Okay. Then I think we're ready
`to begin.
` Petitioner, would you like to reserve any time for
`rebuttal?
` MR. NASH: Yes, Your Honor. My intent is to try and
`reserve about 20 minutes for rebuttal today.
` JUDGE SZPONDOWSKI: Okay. Then I will put 40
`minutes on the clock, and I'll let you know when you're at
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`about the three-minute mark.
` And you may proceed whenever you are ready.
` MR. NASH: Thank you, Your Honor.
` And I think I'll start us at Slide No. 2 in
`petitioner's demonstrative exhibits. I assume you all have
`those in front of you?
` JUDGE SZPONDOWSKI: Yes, we do.
` MR. NASH: And today I'd like to discuss these four
`topics -- or sorry -- three topics that you see here; an
`overview of the '867 patent, the prior art, and then to get
`into the disputed issues and patent owner's revised motion to
`amend.
` Now, I'll note that there's a lot of ground to
` cover, so with respect to some of these issues, I'd like to
` dive right into those disputed issues as quickly as
` possible, and specifically, the ones that are related to
` that Sub-bullet No. 3, which are the instituted combination
` and what that discloses with respect to each limitation.
` But, of course, I'm happy to address any questions Your
` Honors might have about the other sub-bullets there, such as
` Zhang-Gupta being prior art, or patent owner's
` constructions, or the secondary considerations.
` So without zero further ado, I'm just going to jump
` into a quick overview of the '867 patent. And now I'm on
` Slide 3, Your Honor.
` And the '867 patent is titled "A system and method
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` of enhancing efficiency and utilization of memory bandwidth
` in reconfigurable hardware."
` It was filed in June of 2004. It contends to claim
`priority to a provisional application that was filed in June
`of 2003.
` And as we see on Slide 4, Your Honors, there's about
`three key elements in the '867 patent. And I've used a
`corresponding color coding throughout this presentation to
`try and map those key elements throughout the discussion
`with respect to the claims and the prior art as well.
` And we see those illustrated here on Slide 4.
` The first is a reconfigurable processor, which we've
`highlighted in a pink or purple color, and that
`reconfigurable processor instantiates an algorithm as
`hardware.
` We also have one or more memories, which we've
`highlighted in green.
` And then in blue highlight is the data prefetch
`unit. And the claims require that the data prefetch unit
`retrieve or read/write/transfer only computational data,
`that the data prefetch unit be configured to conform to the
`algorithm, and that it operate independent of and in
`parallel with computational data -- or the computational
`unit that's operating on that computational data.
` And so we see those key elements throughout the
`independent claims of the '867 patent.
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` And as an example, we can look at next slide,
`Slide 5, in Claim 1. And again, we've used that same
`color-coded mapping to show the reconfigurable processor.
`We've got a first and second memory highlighted in green.
`And again, we have that data prefetch unit highlighted in
`blue. And underlined there it shows the data prefetch unit
`retrieves only computational data, it operates independent
`of and in parallel with logic blocks that use the
`computational data, and it's configured to conform to the
`needs of the algorithm.
` We see similar limitations reflected in each of the
`other independent claims. So if we turn to Slide 6, for
`example, we see Slide 9, and the same corresponding elements
`are highlighted there.
` And then again in Slide 7, we see in the Method
`Claim 13 the same elements are highlighted there as well.
` Now, importantly, each of those key elements is
`taught in the prior art, and so I'm going to turn now to
`Slide 9 and begin my discussion with the Zhang reference,
`but before I do, I'll note that each of the three references
`that are at issue in these instituted combinations are all
`related to the same project. This is the MORPH Project, and
`MORPH is an acronym. It stands for the multiprocessor with
`reconfigurable parallel hardware.
` It was a project that was being developed and
`researched by a number of professors throughout a number of
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`different universities, and common to each of these
`references that we're going to discuss today is an author,
`Dr. Gupta. So we see him listed as one of the authors of
`the Zhang reference. He's also the author or coauthor of
`the other two references as well.
` And I highlight that because we also have testimony
`by Dr. Gupta in this proceeding where he establishes that
`each of these papers was presented at a conference, was
`distributed at the conference, was available in libraries,
`and was available on X -- the IEEE's Explore website.
` So we've got testimony from Dr. Gupta, and we can
`talk about that later if there are questions.
` But as to the Zhang reference, this one was
`presented at a conference and published by IEEE in 1997, and
`has been available on IEEE's Explore website since 2002.
` And Zhang teaches each of the elements that we see
`in the '867 patent. It teaches a reconfigurable processor
`having first and second memories, and a data prefetching if
`it's configured to retrieve only data required for
`computations.
` We see that illustrated in the next slide. These
`are a couple of example figures from Zhang. This is
`Figure 2 and Figure 4.
` And again, we've used that same color coding to show
`the data prefetch unit in blue, the reconfigurable processor
`in pink, memory in green.
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` And we also see on the next slide, Slide 11, an
`express teaching by Zhang about that data prefetch
`operation. And importantly, it's teaching exactly what
`that, quote/unquote, only limitation from the '867 patent
`requires, which is retrieval of only computational data.
` As Zhang states in its second case study, they're
`going to prefetch only used fields of matrix elements during
`a given computation. That's all that's being retrieved, and
`nothing else in the second case study.
` And so that's an important aspect of this. We're
`going to be revisiting that later today. But it's an
`express teaching in Zhang, and it meets that limitation.
` Now, if we turn to the next slide, Slide 12, that's
`the Gupta reference. This is also related to that MORPH
`architecture.
` And the Gupta reference is just authored by
`Dr. Gupta. It was presented at a conference and published
`by IEEE in the year 2000, and it's been available on the
`Explore website since 2002.
` And Gupta describes the prototype implementation of
`that MORPH architecture that was taught in Zhang.
` And we see that illustrated on Slide 13. This is
`Figure 1 from the Gupta reference.
` And that shows the prototype board for this MORPH
`architecture, and it involves a number of FPGAs, which are
`well understood in the industry and in the art to refer to
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`field programmable gate arrays, which are reconfigurable
`hardware.
` And then finally, Your Honors, if we turn to
`Slide 14, we see the Chien reference. And the Chien
`reference, also coauthored by Dr. Gupta, was presented at a
`conference and published by IEEE in 1996, and has been
`available on the Explore website since 2002.
` It also relates to MORPH. And we offer this because
`it teaches various configurations of the MORPH architecture,
`including one that teaches using processing elements in
`combination with a global shared memory. And we see that
`illustrated on Slide 15.
` So that's an overview of the patent and the prior
`art.
` If we turn to Slide 16, Your Honors, this is the
`Institution Decision's adopted claim constructions that have
`been used throughout that proceeding.
` And I'll note that the first two are relevant to our
`discussion today because they relate to terms that are in
`dispute; specifically, reconfigurable processor and data
`prefetch unit.
` The constructions themselves are not in dispute,
`though, Your Honor. Those are agreed constructions, they
`come straight from Column 5 of the patent, and they were
`adopted in the Institution Decision.
` So as we turn to Slide 18, Your Honor, this is the
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`disputed issue list that we can touch on today.
` As I mentioned for those first two items, I'm going
`to briefly address them. I'm happy to answer any questions
`the Panel might have about any of those subjects, but I'd
`like to then get into Item 3 and the various subelements
`there which refer to the combination and what it teaches,
`and if we'd also like to, we can address the secondary
`considerations that the patent owner has raised in its
`response.
` So to briefly touch on the first issue -- I'm on
`Slide 20 now, Your Honor -- and that's Zhang, Gupta, and
`Chien as prior art of the '867 patent.
` As we mentioned in the overview, each of these was
`published and publicly available in three different ways; it
`was distributed at a conference, it was available at a
`library, and it is available on IEEE's Explore website. And
`in each of those ways, it predates the critical date of the
`'867 patent.
` And we saw that that was evidence that was
`established even before Institution. And now I'm on
`Slide 21, Your Honor. There was considered at that stage to
`be sufficient evidence to show publication. I highlight
`this here from the Institution Decision on this page. But
`at the very least we found that there was an indicia of
`publication and the accessibility on the references
`themselves, we found availability on IEEE's Explore website,
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`and that there was cataloging in various libraries.
` And the Panel instructed in the Institution Decision
`that, to the extent there was still a dispute over
`publication, that the parties should further developed the
`record, and we did that, Your Honors.
` So if we take a look at Slide 22, the petitioner
`offered supplemental information. Quite a bit of it, to be
`honest. And important to this discussion, we had additional
`testimony by Dr. Gupta that confirmed, based on his personal
`knowledge, that these were distributed at the conferences.
` We have a witness from the IEEE, the publisher of
`these articles, the ones they put on the conference, and the
`host of that website, and they confirmed, using business
`records and corporate testimony, that each of these was
`presented at the conference and distributed there, as well
`as that it was available on IEEE's Explore website in 2002.
` And then finally, we have additional testimony from
`an expert on library sciences, Dr. -- or Mr. Munford, and
`Mr. Munford provided testimony, not just about additional
`library copies that he retrieved, but also to confirm that
`the Explore website was accessible, indexed, and searchable
`in 2002. And he confirmed that not just based on his
`opinion, but additional articles that he found that
`confirmed that accessibility, that indexing and
`searchability.
` And so as we turn to Slide 23, Your Honor, I don't
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`think anything's really changed except that there's even
`more evidence now of the public accessibility.
` In fact, patent owner's response is identical to its
`POPR. They've effectively ignored the Institution Decision
`and ignored the supplemental information the petitioner
`provided. And I think the important aspect of that, if Your
`Honors was looking for a clean, sort of, answer here, they
`don't even dispute that these articles were accessible on
`Explore in 2002, their only dispute was over indexing and
`searchability of those articles.
` And, number 1, the case law says that's not
`required, but even if it were, we now have evidence that's
`in the record that demonstrates that these were indeed a
`searchable and indexed database on IEEE's Explore in the
`2002 timeframe.
` So unless there's any further questions on that,
`Your Honor, I'm going skip to the next discussion on claim
`construction.
` JUDGE SZPONDOWSKI: That's fine. Go ahead.
` MR. NASH: Very good.
` To do that, I'd like you to turn to Slide 34, Your
`Honor. And I'll give you a moment to get there.
` I'll also take a brief sip of water.
` So Slide 34. This is the patent owner's
` construction on each of those only limitations from each of
` the independent claims.
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` I have to be specific, it's only claim constructions
` on Claims 1 and 9, the only limitations from those claims,
` and I think the best illustration of that's on Slide 35, the
` very next slide.
` Now, we see those terms in Column 1 of that table
` that's on the right-hand side of Slide 35, and we also see
` patent owner's proposed constructions in Column 2.
` Now, the patent owner offered the same construction
` here that it offered in the District Court, and that's also
` the same construction that the patent owner offered in its
` POPR.
` And at Institution, back in Institution pages 25
` and 26, the Panel concluded that, at least at that stage,
` there was no evidence to support the patent owner's
`construction, and it indeed seemed contrary to patent
`owner's contention that you could just use the plain and
`ordinary meaning.
` Well, the District Court reached a similar
`conclusion. The patent owner had tried to use the same
`construction in the District Court, and the District Court
`rejected that construction and concluded that, no, indeed,
`this claim language requires the retrieval of only
`computational data and nothing else. No other data, no
`other construction, it's limited to only the retrieving
`computational data.
` Following that -- and I'm on Slide 36, Your Honor --
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`patent owner conceded to the District Court that it did not
`have an infringement read because of that construction and
`dismissed the case. The case went away, and patent owner
`said that unless this claim construction changes or we are
`able to effect an amendment in the IPR, then our case is
`going to be dismissed.
` So I think that informs why we're seeing that
`construction presented again in patent owner's response.
`Because -- and this, I think, is important -- that
`construction is not used at all by the patent owner to
` distinguish over the prior art. It is not relevant to this
` proceeding at all.
` And, in fact, I'm now on Slide 37, Your Honor, the
` patent owner's own expert admits that claim construction
` doesn't factor in his opinion at all. He did not have a
` claim construction section in his opening discussion, and he
` was asked directly on cross examination, "Do any of your
` opinions rise or fall with a particular construction?" And
` he confirmed that they do not.
` So, Your Honor, I think that's an easy way to close
` out this issue, because if it's not being used to
` distinguish over the prior art, there's no need to introduce
` that construction here.
` I would be happy to address why there's no intrinsic
` evidence to support that construction, and, in fact, there
` is intrinsic evidence that's contrary to that construction,
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`IPR2020-01449
`Patent 7,149,867 B2
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` but unless Your Honors have specific questions about that, I
` thought I'd move to the combination and what it teaches.
` JUDGE SZPONDOWSKI: So is it your position that we
`don't need to construe this term because it's not necessary
`to resolve the controversy?
` MR. NASH: That's correct, Your Honor. And I think
`the case law is very clear that, in fact, when it's not
`necessary to resolve a controversy, the Panel should not
`construe it.
` And I believe on Slide 37, I -- I have one example
` case where that stands for that proposition.
` Does that answer your question, Your Honor?
` JUDGE SZPONDOWSKI: It does. Thank you.
` MR. NASH: Okay. Thank you.
` So with the Panel's permission, I would then switch
` to the limitations at issue here, and I think the best place
` to start would be Slide 43. I'll give you a moment to get
` there.
` So I'm at Slide 43, and this is the list of issues
` with respect to the combination itself, purportedly disputed
` issues, and the first one that we'll be addressing is the
` reconfigurable processor.
` And remember, as we turn to Slide 44, there is an
` agreed construction for the reconfigurable processor. And
` patent owner's response, just like their POPR, tried to
` introduce a number of additional requirements, and the
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`IPR2020-01449
`Patent 7,149,867 B2
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` Panel's Institution Decision correctly noted that those
` weren't commiserate in scope with the claim language or the
`agreed construction, because the agreed construction
`requires only that that reconfigurable processor be
`comprised of a computing device that contains reconfigurable
`components, and that it instantiates an algorithm as
`hardware.
` Well, the Zhang reference teaches each of those
`things. And so if we turn next to Slide 45, we see
`illustrated on the right a Figure 2 from the Zhang
`reference.
` And using that same color coding that we discussed
`before, we've got the reconfigurable processor here
`reflected with a pink box. Within that pink box are
`reconfigurable components. And the patent owner's expert
`agrees on that point.
` If we turn next to Slide 46, we see further evidence
`of the reconfigurability of those components.
` Now, the figure itself does show that each of those
`components are reconfigurable because, as you can see on
`each of those boxes, it states that there is programmable
`logic, which one of skill in the art understands to mean
`that it's a reconfigurable component.
` But the discussion also illustrates that further,
` and it confirms that the elements themselves are
` reconfigurable. These aren't just the interfaces to these
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`IPR2020-01449
`Patent 7,149,867 B2
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` elements but the actual elements.
` So, for example, we see on Slide 46, there is a
` statement here from Section 3 of Zhang's discussion. It
` says, "We propose an architecture that integrates small
` blocks of programmable logic into key elements."
` And it lists out those elements. Among them are the
` processing elements, for example, Your Honor.
` And then we see that reinforced again -- well, I
` guess I'll just pause before I move on. The reason for
` that, and Zhang's entire point, is that it's integrating
` that programmable logic into these components so that they
` can be configured to match an application. We see that at
` the bottom of the statement here on Slide 46. That's the
` entire purpose of why they're putting this programmable
` logic into these components.
` JUDGE SZPONDOWSKI: So counsel --
` MR. NASH: Yes.
` JUDGE SZPONDOWSKI: -- Figure 2 shows a CPU, so why
`isn't that a conventional processor?
` MR. NASH: Well, that's a great question, Your
`Honor.
` I think that's where the patent owner has tried to
`make a little bit of hay with that CPU reference.
` CPU, of course, just stands for central processing
`unit, but, by itself, that isn't necessarily referring to a
`conventional processor, for example. It's not saying that
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`this is, you know, an Intel 86 processor or any other type of
`conventional processor, it's simply referring to this as the
`central processing unit. The presence of that reconfigurable
`component within it indicates that it's indeed not a
`conventional processor.
` Does that answer the question, Your Honor?
` JUDGE SZPONDOWSKI: Yes. Thank you.
` MR. NASH: And I think that it's not just that
`figure, but that figure coupled with this discussion.
` And we see that discussion here on the left of
`Slide 30 -- 46 where it's referring to the processing
`elements, and I think that's an important answer to your
`question, Your Honor. Because, to the extent there was any
`doubt as to what that CPU is referencing in Figure 2, Zhang
`answers that in this statement from Section 3, because it's
`talking about the processing elements themselves being
`reconfigurable.
` And it reinforces that in a later section. So if I
` turn to Slide 47, this is Section 3.1 of the Zhang
` reference, and again, it's talking about the MORPH
` architecture.
` And it says that, "The architecture consists of
` processing and memory elements," so processing elements,
` memory elements, "and that it's introducing small amounts of
` programmable logic into those key elements."
` Similar to what we saw in that statement in the
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`IPR2020-01449
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` previous slide, it's taking those key elements, processing
` elements and memory elements, and integrating programmable
` logic into them to make them reconfigurable, and that allows
` for this architectural adaptation to match an application.
` Now, to the extent there's a doubt about that, Your
` Honor, I think I got admission from patent owner's own
` expert on cross examination, so I would have you turn to
` Slide 48. And I've tried to provide the entire context of
` this discussion because I think, even with the context, it's
` very clear that when he makes this admission, it answers the
` question that Your Honor was asking.
` Because patent owner has tried to contend that that
`CPU from Figure 10 is conventional and that somehow there's
`just reconfigurable logic being used as the interface to
`that conventional CPU.
` But I asked patent owner's own expert that. I said
`take a look at the statement from Zhang. That's referring
`not just to the interface of a processor, but the actual
`processing elements. Isn't that correct? And he admitted,
`yes, that's true.
` Now, he gave examples of what that could mean, but
`in each of those two examples, he's conceding that it's not
`a conventional processor, it's a processor where the fixed
`hardware has been replaced with reconfigurable hardware. So
`we know for sure that the Zhang processor is not a
`conventional processor.
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`IPR2020-01449
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` Now, the other aspect of this limitation that patent
`owner has taken issue with is the aspect that it
`instantiates an algorithm as hardware.
` Now, we see that being taught throughout Zhang
`because it talks about using this architectural adaptation
`to match an application, and specifically in the Zhang
`reference it's talking about a sparse matrix computation
`as one of those potential applications, and that's the
`example that's used.
` So we know there's an actual application, there's
`algorithms, there's computations being performed, and one of
`skill in the art understands from all of this that you would
`be instantiating this hardware -- the algorithm as hardware
`with these reconfigurable logic.
` I have that illustrated here on Slide 49. This is
`just some of that evidence.
` Patent owner has pointed to a statement in Zhang
`about the application remaining in software. And I'm now on
`Slide 50, Your Honor. And this is where patent owner has
`tried to highlight that statement and contend that, because
`of that statement, Zhang somehow teaches away, I think is
`the language they use, that it teaches away from
`instantiating anything in hardware. That the application
`remaining in software means that all algorithms remain in
`software.
` Well, Your Honor, that's simply inconsistent with
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`what Zhang itself te
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