The e Pen uis
`of Computing
`
`ictionary
`
`Dick Pountain
`
`PENGUIN BOOKS
`
`Adobe - Exhibit 1027, cover
`
`Adobe - Exhibit 1027, cover
`
`

`

`PENGUIN BOOKS
`
`Penguin Books Ltd. 8o Strand, London wc 2R OM, England
`Penguin Putnam Inc..375 Hudson Street, New York. New York 10014, USA
`Penguin Books Australia Ltd. 250 Camberwell Road. Camberwell, Victoria 3124, Australia
`Penguin Books Canada Ltd, 10 Alcorn Avenue, Toronto, Ontario, Canada m4v 3B 2
`Penguin Books India (P) Ltd. 11, Community Centre, Panchsheel Park. New Delhi -110 017, India
`Penguin Books (NZ) Ltd, Cnr Rosedale and Airborne Roads, Albany, Auckland, New Zealand
`Penguin Books (South Africa) (Pty) Ltd, 24 Sturdee Avenue, Rosebank 2196, South Africa
`Penguin Books Ltd. Registered Offices: 8o Strand, London WC2R ORL, England
`www.penguin.com
`
`First published 2001
`
`Copyright Dick Pountain, 2001
`All rights reserved
`
`The moral right of the author has been asserted
`
`Typeset in TheAntiquaB and TheSans
`Edited and typeset by Book Creation Services Ltd, London
`Printed in England by Clays Ltd, St Ives plc
`
`Except in the United States of America, this bcok is sold subject
`to the condition that it shall not, by way of trade or otherwise, be lent,
`re-sold, hired out, or otherwise circulated without the publisher's
`prior consent in any form of binding or cover other than that in
`which it is published and without a similar condition including this
`
`hilcondition being imposed on the subsequent purchaser
`
`Adobe - Exhibit 1027, page i
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`Adobe - Exhibit 1027, page i
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`Ci security
`C# contains many features aimed at creating
`more secure and stable programs including
`hierarchical namespaces to control overriding
`of methods, STRUCTURED EXCEPTION HAN-
`DLING, restrictions on the use of POINTERS and
`TYPE CASTS and automatic array BOUNDS
`CHECKING. Pseudo-code compiled from a C#
`program runs within a runtime system (see
`COMMON LANGUAGE RUNTIME) that imposes all
`these safety features and is therefore called
`MANAGED CODE, though it can also make out-
`side calls to code within traditional, unman-
`is
`LIBRARIES. Cft
`aged DYNAMIC-LINKED
`intended to eventually replace VISUAL BASIC as
`the programming language for Microsoft's
`web development systems.
`
`Ci security The lowest of the levels of compu-
`ter security defined in the US Government's
`ORANGE BOOK, which requires that users
`should log on to the system, but permits
`groups of users to share the same password.
`See also C2 SECURITY.
`
`C2 security A medium level of computer secu-
`rity as defined in the US Government's
`ORANGE BOOK, which requires that users
`should log on to a system with individual
`passwords, and that an audit record of who
`has logged in be maintained. See also ci
`SECURITY.
`
`CA Abbreviation of COMPUTER ASSOCIATES.
`
`cable
`i A multi-core wire terminated with
`multi-pin plugs used to connect a piece of
`PERIPHERAL equipment to a computer.
`2 Shorthand for 'cable television'.
`cable modem A MODEM that allows computer
`DATA TRANSFERS and Internet access via cable
`TV connections. Cable TV services employ
`COAXIAL CABLING, so a cable modem can oper-
`ate at much a higher maximum speed than a
`telephone modem, typically between o.5 and
`20 megabits per second. However, cable TV
`systems support only downstreani traffic (i.e.
`from TV station to the home) so require a tele-
`phone modem to be used in parallel to carry
`upstream traffic. Also cable TV lines are
`shared by many households, so the BAND-
`WIDTH achieved in practice may be highly var-
`iable and far below the maximum.
`cable TV A communication technology that
`transmits television signals into the home
`
`60
`
`over a local area network of optical or coaxial
`cable, rather than via radio-frequency broad-
`cast or satellite transmission. Its significance
`for computing is that this relatively high-
`speed network may also be used for Internet
`access and other data transmissions by
`installing a CABLE MODEM.
`
`cabling The physical conductors used to carry
`data around a NETWORK. The term is applied to I
`both metal wire that conducts electrical sig-
`nals and to OPTICAL FIBRE that conducts light
`signals, since the engineering problems of
`running either sort around a building are
`related. See also various cable types such as
`TWISTED-PAIR, UTP, COAXIAL CABLE, THICK
`ETHERNET and THIN ETHERNET.
`
`11.
`•
`
`cache A small region of fast MEMORY inter-
`posed between a data processing device and a
`larger slower memory to hold copies of the
`most frequently or recently used data so that
`they may be accessed more quickly. The same
`principle is at work in a library when someone
`takes several books they are consulting from
`the main shelves and places them on their
`desktop for easier access.
`Caches are universally employed between
`the c PUs of modern computers and their main
`memory, reflecting the fact that the speed of
`processors has been enhanced far more rap-
`idly than the speed of memory: a cache helps
`to bridge this growing discrepancy. Indeed the
`latest generations of PENTIUM and other
`processors employ two (or even three) levels
`of cacheing. A small, typically 32 to 64 kilo-
`byte, cache on the chip itself acts as a cache for
`a larger off-chip cache which may be many
`megabytes in size, and which in turn caches
`the main memory accesses. (See more under
`Li CACHE and L2 CACHE.)
`The mechanics of deciding precisely how to
`arrange the data within a cache, how much to
`read at a time, and how to ensure consistency
`between the cache contents and main mem
`ory constitute a complex area of engineering:
`see more under CACHE LINE, CACHE HIT, CACHE
`COHERENCY, ASSOCIATIVE CACHE, DIRECT MAPPED
`CACHE, SET-ASSOCIATIVE CACHE, FULLY ASSOCIA-
`TIVE CACHE, UNIFIED CACHE, HARVARD ARCHITEC-
`TURE.
`Caches may be employed in many other
`to
`forms of communication, for example
`enable WEB PAGES recently read to be read
`
`Adobe - Exhibit 1027, page E
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`Adobe - Exhibit 1027, page 60
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`61
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`again more quickly, and between a computer's
`CPU and disk drives of various kinds (where
`the speed discrepancy is even greater than
`with memory): see for example DISK CACHE,
`WRITE-THROUGH CACHE, WRITE-BACK CACHE.
`cacheable Capable of, or allowed to be, stored
`in a CACHE. Many operating systems permit
`certain regions of memory to be declared as
`NONCACHEABLE, particularly those used for /o
`by MEMORY -MAPPED peripherals.
`
`cache coherency A problem intrinsically
`associated With SHARED-MEMORY MULTIPROC-
`ESSOR computer systems. When multiple
`processors access the same memory, it is pos-
`sible for a data item that currently resides in
`one processor's CACHE to be updated in main
`memory by a different processor, leaving the
`first processor unaware that it holds stale,
`out-of-date, data. 'lb avoid this situation it is
`necessary to maintain cache coherency, and
`the most popular method is to implement the
`MESI PROTOCOL.
`
`cache controller An INTEGRATED CIRCUIT that
`controls access to the Bus connecting a com-
`puter's CPU core to its CACHE memory, per-
`include
`forming several
`functions
`that
`locating a requested address in the cache, stor-
`ing the TAGS for an ASSOCIATIVE CACHE and
`sorting memory accesses into line-order to
`economize on bus bandwidth.
`All modern MICROPROCESSORS incorporate
`an on-chip or LEVEL 1 CACHE whose controller is
`part of the on-chip circuitry. However, some
`recent designs (for instance the POWERPC G3
`and G4) also integrate a controller for an
`external or LEVEL 2 CACHE onto the chip, pro-
`vided with its own bus to enable access to the
`L2 cache faster than the system bus would per-
`mit. Intel's PENTIUM family of CPUs employ an
`external L2 cache controller that is integrated
`instead into the SYSTEM CHIP SET. See also
`CACHE COHERENCY, BACKSIDE BUS, MESI PROTO-
`COL, BUS SNOOPING.
`
`cache hit A request by a computer's processor
`to read or write a data item that finds its target
`in the processor's CACHE and therefore does
`not have to reach out over the bus to external
`memory to access it. Since the purpose of a
`cache is to keep traffic local to the processor
`
`Cairo
`and reduce the traffic to external memory, a
`high ratio of cache hits to CACHE MISSES is a
`good thing.
`cache line The unit of data that is stored
`within a processor CACHE. For example each
`line might be 64 bytes long, so that whenever
`a single byte in main memory is accessed, its
`surrounding 64 bytes are fetched into the
`cache too. See also ASSOCIATIVE CACHE, TAG.
`cache memory A region of memory (whether
`on-chip, or external in the form of RAM chips)
`that is dedicated to use as a CACHE.
`cache miss A request by a computer's proces-
`sor to read or write a data item that does not
`find its target in the processor's CACHE and
`therefore must continue through into main
`memory to access the item. See also CACHE HIT.
`CACM Abbreviation of COMMUNICATIONS OF
`THE ACM.
`
`CAD Abbreviation of COMPUTER AIDED DESIGN.
`
`CAD/CAM (Computer Aided Design/Compu-
`ter Aided Manufacturing) The use of comput-
`ers to assist in the complete manufacturing
`cycle of a product, from design to final deliv-
`ery. The term implies a degree of integration
`between the design software, a parts database,
`ordering and stock control software for parts
`from outside suppliers, and software that con-
`trols the manufacturing process itself, so that
`information flows from one stage to the next.
`See more under COMPUTER AIDED DESIGN, COM-
`PUTER AIDED MANUFACTURING, JUST-IN-TIME.
`CADD Abbreviation of COMPUTER AIDED
`DESIGN AND DRAFTING.
`caddy A shallow removable plastic tray with a
`hinged lid used by early c D-ROM drives: a disk
`was loaded into the caddy and the caddy
`inserted into the drive. Most modem drives
`use instead a retractable, lidless tray.
`CAE Abbreviation of COMPUTER AIDED ENGI-
`NEERING.
`
`CAI Abbreviation of COMPUTER AIDED INSTRUC-
`
`TION.
`
`Cairo The internal codename given by Micro-
`soft to its unified, 3z-bit OBJECT-ORIENTED
`
`Adobe - Exhibit 1027, page 61
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`Adobe - Exhibit 1027, page 61
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