UNITED STATES DISTRICT COURT
`WESTERN DISTRICT OF TEXAS
`WACO DIVISION
`
`PARKERVISION, INC.,
`
`vs.
`
`INTEL CORPORATION,
`
`Plaintiff,
`
`Defendant.
`
` Civil Action No. 6:20-cv-00108-ADA
`
` JURY TRIAL DEMANDED
`
`DEFENDANT INTEL CORPORATION’S PROPOSED CLAIM CONSTRUCTIONS
`
`Pursuant to the October 8, 2020 Amended Scheduling Order entered in this case, D.I. 48
`
`at 1, Defendant Intel Corporation (“Intel”) hereby discloses its proposed claim constructions to
`
`Plaintiff ParkerVision, Inc. (“ParkerVision”).
`
`Intel proposes claim constructions from the following asserted patents: U.S. Patent Nos.
`
`6,266,518 (“’518 patent”); 6,580,902 (“’902 patent”); 7,110,444 (“’444 patent”); 7,539,474 (“’474
`
`patent”); 8,588,725 (“’725 patent”); 8,660,513 (“’513 patent”); 9,118,528 (“’528 patent”);
`
`9,246,736 (“’736 patent”) and 9,444,673 (“’673 patent”) (collectively, the “Asserted Patents”).
`
`Intel reserves the right, consistent with the Federal Rules of Civil Procedure and the Local Rules
`
`of this Court, as well as any other applicable rule, to revise its proposed constructions, as well as
`
`its list of proposed claim terms, in view of ParkerVision’s proposed claim constructions, including
`
`the right to adopt any claim terms or constructions proposed by ParkerVision, and the right to add
`
`additional terms if, in view of ParkerVision’s infringement allegations, the parties have further
`
`disputes regarding claim scope. See O2 Micro Int’l Ltd. v. Beyond Innovation Tech. Co., 521 F.3d
`
`1351, 1360 (Fed. Cir. 2008).
`
`1
`
`Intel v. ParkerVision
`IPR2020-01265
`Intel 1036
`
`
`WESTERN DISTRICT OF TEXAS
`WACO DIVISION
`
`PARKERVISION, INC.,
`
`vs.
`
`INTEL CORPORATION,
`
`Plaintiff,
`
`Defendant.
`
` Civil Action No. 6:20-cv-00108-ADA
`
` JURY TRIAL DEMANDED
`
`DEFENDANT INTEL CORPORATION’S PROPOSED CLAIM CONSTRUCTIONS
`
`Pursuant to the October 8, 2020 Amended Scheduling Order entered in this case, D.I. 48
`
`at 1, Defendant Intel Corporation (“Intel”) hereby discloses its proposed claim constructions to
`
`Plaintiff ParkerVision, Inc. (“ParkerVision”).
`
`Intel proposes claim constructions from the following asserted patents: U.S. Patent Nos.
`
`6,266,518 (“’518 patent”); 6,580,902 (“’902 patent”); 7,110,444 (“’444 patent”); 7,539,474 (“’474
`
`patent”); 8,588,725 (“’725 patent”); 8,660,513 (“’513 patent”); 9,118,528 (“’528 patent”);
`
`9,246,736 (“’736 patent”) and 9,444,673 (“’673 patent”) (collectively, the “Asserted Patents”).
`
`Intel reserves the right, consistent with the Federal Rules of Civil Procedure and the Local Rules
`
`of this Court, as well as any other applicable rule, to revise its proposed constructions, as well as
`
`its list of proposed claim terms, in view of ParkerVision’s proposed claim constructions, including
`
`the right to adopt any claim terms or constructions proposed by ParkerVision, and the right to add
`
`additional terms if, in view of ParkerVision’s infringement allegations, the parties have further
`
`disputes regarding claim scope. See O2 Micro Int’l Ltd. v. Beyond Innovation Tech. Co., 521 F.3d
`
`1351, 1360 (Fed. Cir. 2008).
`
`1
`
`Intel v. ParkerVision
`IPR2020-01265
`Intel 1036
`
`
`
`Intel’s Proposed Terms
`
`Proposed Term and Asserted Claim(s)
`
`Down-Converter Terms:
`
`
`“frequency down-conversion module”
`(’444 patent, claims 2, 3; ’474 patent, claim
`1)
`
`
`
`
`
`“frequency down-conversion module”
`(’673 patent, claim 1)
`
`
`
`
`
`
`“universal frequency down-converter”
`(’518 patent, claim 50)
`
`
`
`
`
`“energy transfer module”
`(’902 patent, claim 1)
`
`
`
`
`
`
`
`“aliasing module”
`(’725 patent, claim 1)
`
`
`
`
`
`
`Intel’s Proposed Construction
`
`Down-Converter Terms:
`
`
` “A module that down-converts an input
`signal at an aliasing rate (i.e., by sampling at
`less than or equal to twice the frequency of
`the input signal)”
`
`
`
`
`“A module that down-converts an input
`modulated carrier signal at an aliasing rate
`(i.e., by sampling at less than or equal to
`twice the frequency of the input modulated
`carrier signal)”
`
`
`
`“A down-converter that down-converts a
`carrier signal at an aliasing rate (i.e., by
`sampling at less than or equal to twice the
`frequency of the carrier signal)”
`
`
`
`“A module that down-converts an
`electromagnetic signal by transferring energy
`at an aliasing rate (i.e., by sampling at less
`than or equal to twice the frequency of the
`electromagnetic signal)”
`
`
`
`
` “A module that down-converts an RF
`information signal at an aliasing rate (i.e., by
`sampling at less than or equal to twice the
`frequency of the RF information signal)”
`
`
`
`
`
`
`2
`
`
`
`Proposed Term and Asserted Claim(s)
`
`“system for frequency down-converting”
`(’513 patent, claim 19; ’528 patent, claim 1;
`’736 patent, claim 1)
`
`
`
`“apparatus for down-converting”
`(’673 patent, claim 13)
`
`
`“sample”1
`
`
`
`“sampling”
`
`
`
`“sampled”
`
`
`(’518 patent, claim 50; ’902 patent, claim 1;
`’725 patent, claim 1; ’513 patent, claim 19;
`’528 patent, claim 1; ’736 patent, claims 1
`and 11; ’673 patent, claims 1, 13)
`
`“under-samples”
`(’444 patent, claim 2; ’474 patent, claim 6)
`
`
`“a [] switch … coupled to a [] reference
`potential”
`(’474 patent, claim 1)
`
`“a capacitor that reduces a DC offset voltage
`in said first-down converted signal and said
`second down-converted signal”
`(’444 patent, claim 4)
`
`Intel’s Proposed Construction
`
`“A system that down-converts a modulated
`carrier signal at an aliasing rate (i.e., by
`sampling at less than or equal to twice the
`frequency of the modulated carrier signal)”
`
`
`“An apparatus that down-converts a
`modulated carrier signal at an aliasing rate
`(i.e., by sampling at less than or equal to
`twice the frequency of the modulated carrier
`signal)”
`
`“reduce a continuous-time signal to a
`discrete-time signal”
`
`
`“reducing a continuous-time signal to a
`discrete-time signal”
`
`
`“reduced to a discrete-time signal from a
`continuous-time signal”
`
`
`“samples at less than or equal to twice the
`frequency of the input signal using negligible
`apertures (i.e., pulse widths) that tend
`towards zero time in duration”
`
`“the switch shunts (i.e., diverts) current to a
`point held at a constant reference voltage”
`
`“a capacitor that reduces a DC offset voltage
`in both said first down-converted signal and
`said second down-converted signal”
`
`
`
`1 Intel is proposing a construction for “sample” only insofar as the term is used as a verb in the
`asserted claims.
`
`
`
`3
`
`
`
`Proposed Term and Asserted Claim(s)
`
`
`
`“DC offset voltage”
`(’444 patent, claim 4)
`
`“reactive structure”
`(’518 patent, claim 50)
`
`“the energy discharged during any given
`discharge cycle is not completely
`discharged”
`(’528 patent, claim 9; ’736 patent, claims 1,
`11)
`
`“separate integration module”
`(’528 patent, claim 17)
`
`“substantially the same size”
`(’902 patent, claim 5)
`
`Energy Discharge Percentage Terms:
`
`“between six and fifty percent of the energy
`transferred from the RF information signal to
`the storage module is discharged from the
`storage module”
`(’725 patent, claim 17)
`
`“between six and twenty-five percent of the
`energy transferred from the RF information
`signal to the storage module when is
`discharged from the storage module”
`(’725 patent, claim 18)
`
`“between ten and twenty percent of the
`energy transferred from the RF information
`signal to the storage module discharged from
`the storage module”
`(’725 patent, claim 19)
`
`
`
`
`
`
`Intel’s Proposed Construction
`
`“a DC voltage level that is added to a signal
`of interest by related circuitry”
`
`“An electrical structure, such as a capacitor
`or inductor, that has reactance”
`
`Indefinite
`
`Indefinite
`
`Indefinite
`
`
`Indefinite
`
`
`
`
`
`
`
`
`
`4
`
`
`
`ParkerVision’s Proposed Terms
`
`
`Proposed Term(s) and Asserted Claim(s)
`“frequency down-conversion module”
`(’444 patent, claims 2, 3; ’474 patent, claim 1)
`
`
`“energy storage element” (’528 patent, claim
`1; ’513 patent, claim 19; ’736 patent, claims
`1, 11)
`
`
`
`“storage element” (’444 patent, claim 3; ’474
`patent, claim 1)
`
`
`
`“energy storage module” (’902 patent, claim
`1)
`
`
`
`
`“storage module” (’725 patent, claim 1)
`
`
`
`
`“energy storage device” (’673 patent, claim
`13)
`
`
`“integrated”
`(’528 patent, claims 1, 17; ’518 patent, claim
`50)
`
`“modulated carrier signal”
`(’513 patent, claim 19; ’528 patent, claim 1;
`’736 patent, claim 1; ’673 patent, claims 1, 13)
`
`“sampling aperture”
`(’513 patent, claim 19; ’528 patent, claim 1;
`’736 patent, claims 1, 11; ’673 patent, claim 13)
`
`
`Intel’s Proposed Construction
`“A module that down-converts an input signal
`at an aliasing rate (i.e., by sampling at less
`than or equal to twice the frequency of the
`input signal)”
`
`“an element that stores a non-negligible
`amount of energy from an input
`electromagnetic (EM) signal”
`
`
`
`“an element that stores a non-negligible
`amount of energy from an input
`electromagnetic (EM) signal”
`
`
`“a module that stores a non-negligible amount
`of energy from an input electromagnetic (EM)
`signal”
`
`
`
`“a module that stores a non-negligible amount
`of energy from an input electromagnetic (EM)
`signal”
`
`
`“a device that stores a non-negligible amount
`of energy from an input electromagnetic (EM)
`signal”
`
`Plain and ordinary meaning, or in the
`alternative, “combined over time”
`
`“a carrier signal that is modulated by a
`baseband signal”
`
`
`“a period of time during which the claimed
`switch is in its closed (i.e., on) state in order
`to reduce a continuous-time signal to a
`discrete-time signal”
`
`
`
`5
`
`
`
`Proposed Term(s) and Asserted Claim(s)
`
`“switch”
`(’518 patent, claim 50; ’902 patent, claim 1;
`’444 patent, claim 3; ’474 patent, claim 1; ’725
`patent, claim 1; ’513 patent, claim 19; ’528
`patent, claims 1, 8; ’736 patent, claims 1, 11;
`’673 patent, claims 1, 13)
`
`
`Intel’s Proposed Construction
`
`
`Plain and ordinary meaning
`
`
`
`
`
`Dated: October 9, 2020
`
`
`By:
`
`6
`
`
`
`/s/ Jason F. Choy
`J. Stephen Ravel
`Texas State Bar No. 16584975
`KELLY HART & HALLMAN LLP
`303 Colorado Street, Suite 2000
`Austin, TX 78701
`Telephone: (512) 495-6429
`Facsimile: (512) 495-6401
`steve.ravel@kellyhart.com
`
`James E. Wren
`Texas State Bar No. 22018200
`1 Bear Place, Unit 97288
`Waco, Texas 76798
`Telephone: (254) 710-7670
`james.wren@baylor.edu
`
`Michael J. Summersgill (pro hac vice)
`Massachusetts State Bar No. 632816
`Sarah B. Petty (pro hac vice)
`Massachusetts State Bar No. 666485
`WILMER CUTLER PICKERING
` HALE AND DORR LLP
`60 State Street
`Boston, MA 02109
`Telephone: (617) 526-6000
`Facsimile: (617) 526-5000
`michael.summersgill@wilmerhale.com
`sarah.petty@wilmerhale.com
`
`Jason F. Choy (pro hac vice)
`California State Bar No. 277583
`WILMER CUTLER PICKERING
` HALE AND DORR LLP
`350 South Grand Avenue, Suite 2400
`
`
`
`
`
`
`
`Los Angeles, CA 90071
`Telephone: (213) 443-5300
`Facsimile: (213) 443-5400
`jason.choy@wilmerhale.com
`
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`7
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`CERTIFICATE OF SERVICE
`
`
`
`The undersigned hereby certifies that a true and correct copy of Intel Corporation’s
`
`Proposed Claim Constructions was served on October 9, 2020 by electronic mail to all counsel of
`
`record who are deemed to have consented to electronic service in accordance with Local Rule CV-
`
`5. I declare under penalty of perjury that the foregoing is true and correct.
`
`
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`Executed on October 9, 2020.
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`/s/ Jason F. Choy
`Jason F. Choy
`
`
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`8
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`
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