throbber
i
`
`•
`
`--0~ <
`...... ~ --0 ~
`~Ill"" ·-
`
`Vl
`
`o v· ~
`
`C: ~
`
`.... v,_
`
`MINDSHARE, INC.
`
`SECOND EDITION
`FIREWIRE® SYSTEM ARCHITECTURE
`
`1
`
`Comcast, Ex. 1046
`
`

`

`IRE®
`FIRE
`SYSTEM
`ARCHITECTURE
`
`SECOND EDITION
`IEEE 1394a
`
`MINDSHARE, INC.
`Don Anderson
`
`PC SYSTEM
`ARCHITECTURE
`SER IES
`
`2
`
`

`

`_,rr• -
`
`I
`j
`
`' l (
`
` (Qtt:_:'
`I‘Ett‘llhth‘
`
`
`3'Q.'Qi1'._"t
`
`J..
`
`3
`
`

`

`Fire Wire®
`System
`Architecture,
`
`Second Edition
`
`vr--
`
`(
`
`I
`I
`
`l I
`I
`
`........
`
`4
`
`

`

`The PC System Architecture Series
`MindShare, Inc.
`.
`.
`.
`.
`h
`our web site (http://www.awprofess1onal.com/senes/ mmdshare) for more information
`ease see
`.
`on t ese ttd es.
`Pl
`- - -
`
`.
`
`AGP System Architecture: Second Edition
`0-201-70069-7
`CardBus System Architecture
`0-20 I-40997-6
`FireWire\ll System Architeccurc: Second Edition
`0-201-48535-4
`InfiniBand System Architecture
`0-321-11765-4
`
`ISA System Architecrure: Third Edition
`0-201-40996-8
`
`PCI System Architecture: Fourth Edition
`0-201-30974-2
`
`PCI-X System Architecture
`0-201-72682-3
`
`PCM CIA System Architecture: Second Edition
`0-201-40991-7
`
`Pentium~ Pro and Pentium,z, II System Architecture: Second Edition
`0-201-30973-4
`
`Pentium11> Processor System Architecture: Second Edition
`0-201-40992-5
`
`Plug and Play System Architecture
`0-201-41013-3
`
`Protected Mode Software Architecture
`0-201-55447-X
`
`Universal Serial Bus System Architecture: Second Edition
`0-201-30975-0
`
`Hyper Transport™ System Architecture
`0-321-16845-3
`
`,,,d
`
`5
`
`

`

`Fire Wire®
`System Architecture,
`Second Edition
`
`IEEE 1394a
`MINDSHARE, INC.
`
`Don Anderson
`
`.&
`....
`ADDISON-WESLEY
`Boston • San Francisco • New York • Toronto • Montreal
`London • Munich • Paris • Madrid
`Capetown • Sydney • Tokyo • Singapore • Mexico City
`
`dl@taa
`
`6
`
`

`

`d by manufacturers and sellers to distinguish their products are claimed as trademark W
`.
`.
`Many of the des1gnauons use
`f
`d
`s. here
`k 1 .
`. th' book and the publisher was aware o a tra emar c aim, the designations have be
`.
`.
`.
`those des1gnauons appear in
`en printed
`is
`. •
`with initial capital letters or in all capitals.
`d bl. h have taken care in the preparation of this book but make no expressed or implied warranty f
`The authors an pu
`is er
`.
`. .
`.
`d '
`.
`.
`o any
`re ponsibility for errors or omissions. No hab1hty 1s assume 1or incidental or consequential dama
`.
`.
`kind and assume no s
`.
`.
`ges in
`· h
`·s·ng out of the use of the information or programs contained herein.
`.
`connecuon wit or an I
`. h
`f' rs discounts on this book when ordered in quantity for bulk purchases or special sales. For more inform t·
`The pub 1s er o 1e
`a ion.
`I
`please contact:
`U.S. Corporate and Government Sales
`(800) 382-34 I 9
`corpsales@pearsontechgroup.com
`
`For sales outside the U.S., please contact:
`
`International Sales
`intemational@pearsoned.com
`
`Visit us on the Web: www.awprofessional.com
`
`Ubrary of Congress Cataloging-in-Publication Data
`Anderson, Don, 1953-..
`FireWire systems architecture: IEEE 1394a / Mindshare, Inc.;
`Don Anderson. -2nd ed.
`p.cm.
`Includes bibliographical references and index.
`ISBN 0-201-48535-4
`I. IEEE 1394 (Standard) I. Mindshare, Inc. JI. Title.
`TK7895.B87 A52 1998
`62 l.39'81-<lc21
`
`ISBN: 0-201-48535-4
`
`Copyright © 1999 by Mindshare, Inc.
`
`All rights reserved. Printed in the United States of America. This publication is protected by copyright, and permission must be
`obtained from the publisher prior to any prohibited reproduction, storage in a retrieval system, or transmission in any form or by
`any means, electronic, mechanical, photocopying, recording, or likewise. For information regarding permissions, write to:
`
`98-43465
`
`Pearson Education, Inc.
`Rights and Contracts Department
`One Lake Street
`Upper Saddle River, NJ 07458
`
`ISBN 0201485354
`Text printed in the United States on recycled paper
`Eighth printing, May 2005 at Offset Paperback Manufacturers in Laflin, Pennsylvania
`
`7
`
`

`

`~rssr
`
`*-ahza
`
`For my sisters Debbie 1:lfld DeAnn and my brothers Doug and David, and their families.
`
`Parents
`Darrel & Doris
`
`Donovan (Don)
`&
`Susan
`
`Debbie & Rod
`
`Doug & Jayne
`
`DeAnn & Rick
`
`David & Julie
`
`Shane
`
`Mandy
`
`Brandyn
`
`DaeLynne
`
`Brianna
`
`Lyndsey
`
`Jarod
`
`K e
`
`Tan a
`
`Joshua*
`
`Whitney*
`
`• Step children
`
`Darci
`
`Ty
`
`Derek
`
`8
`
`

`

`The PC System Architecture Series
`
`--~
`
`The PC System Architecture Series is a crisply
`written and comprehensive set of guides to che
`most important PC hardware standards. Each title
`illustrates che relationship between the software and
`hardware, and thoroughly explains che architecture,
`features, and operation of systems built using one
`particular type of chip or hardware specification.
`MindShare, Inc. is one of the leading technical
`training companies in che computer industry,
`
`providing innovative courses for dozens f
`.
`o corn
`including Intel, IBM, and Compaq.
`Panits,
`
`''The,-e is rm/1 one way rn tkscribe ,h,. 5,, •
`,r
`.
`.
`• .r,n OJ/>('
`hilrdtvart a,u{ 11tv:h1ten11re booln writtm b r,_
`Shanley and.Don Amkno11: INVALUABI.r .. 0
`- -PC M11g,izi11r's "Read Only" column
`
`>>t
`
`80486
`! SYSTl:.M
`
`SYSTEM
`
`. ··- . -
`: .-: -~
`
`I
`
`- --
`
`a=" II i,zi
`I AGP
`_ARCHI_TE~;.:1!!: I I ARCHm:c;.~~~---
`~ " ~
`
`.
`
`..........
`
`" I"'-
`
`1{('11111',<iot ..... , . ..
`
`~
`
`··-
`
`ISBN 0-201-40994-1
`
`ISBN 0-201-70069-7
`
`' -
`
`'.-1-/ ; .
`,•.,l"i ••f.i MH1).YJ,I~ .
`·- 1~!· .•. !"
`r:=:~
`ISBN 0-201-40996-8
`
`-
`
`-
`
`-
`
`-
`
`... i
`r PCI
`, SYSTEM
`-. ..,.
`,., ... ..,,,,.,
`l ARCHITECTURE
`I
`. .
`I ~-~
`-
`
`~~'~ .:.><.
`
`ISBN 0-201 -30974-2
`
`@::&%' ·Sd-·119
`I SYSTEM
`I PLUG AND [>uy
`;
`i
`t~~~ I
`
`~'.'.'.''"-·"' j
`I
`
`;i,.~
`
`1
`
`r.:·=-~= ~~~~
`• ; [:J:~'. ..
`I Fuu,WtRE
`J SYSTH!
`~.... ..... I
`t .. ,I
`
`~--
`
`:-:-.-.~
`J
`ISBN 0-201-48535-4
`
`CARDBus
`SYSTEM
`ARCHITECTURE
`
`EISA
`SYSTEM
`I
`" ... , .. ,
`ARCHITECTURE j
`
`'
`M~~. l"- ,1
`
`~
`ISBN 0-201-40997-6
`
`ISBN 0-201-40995-X
`
`W~~....i~idi~:?.~
`I PCI-X
`. ::~-
`;
`I SYSTEM
`·:::._·.:-

`! ARCHITECTURE 1
`
`ISBN 0-201-72682-3
`
`ISBN 0-201-40991-7
`
`ISBN 0-:!0!-.1097.l-4
`
`~ --r
`fi1 ... ~ .... ----
`·----·
`U~IVERSAL SERIAL
`Bus Srsn .\t
`ARCHITECTCRE
`,.._,_.__
`.
`.
`• v ... •.),o,,h
`
`j.,
`
`-
`
`ISB!'i 0.201-40992-5
`
`ISBN 0-201-41013-3
`
`ISBN 0-201-40990-9
`
`ISBN 0..201-55447-X
`
`ISBN O-.!Oi -.lO'F5-0
`
`http://www.awl.com/ cseng/ series/ mindshare/
`
`./-. Addison-Wesley
`
`---a111zatd
`
`I
`
`9
`
`

`

`-·
`
`-'·b.-d&a
`
`Contents
`
`About This Book ·
`The MindShare Architecture Series ....................................................................................... 1
`Cautionary Note ......................................................................................................................... 2
`Organization of This Book ....................................................................................................... 2
`Part One: Introduction to Fire Wire (IEEE 1394) .............................................................. 2
`Chapter 1: Why Fire Wire? ........................................................................................... 2
`Chapter 2: Overview of the Fire Wire Architecture .................................................. 2
`Part Two: Serial Bus Communications ............................................................................. 3
`Chapter 3: Communication Model ............................................................................. 3
`Chapter 4: Communications Services ........................................................................ 3
`Chapter 5: Cables ·& Connectors ................................................................................. 3
`Chapter 6: The Electrical Interface ............................................................................. 3
`Chapter 7: Arbitration .................................................................................................. 3
`Chapter 8: Asynchronous Packets .............................................................................. 3
`Chapter 9: Isochronous Packets .................................................................................. 3
`Chapter 10: PHY Packet Format ................................................................................. 4
`Chapter 11: Link to PHY Interface ............................................................................. 4
`Chapter 12: Transaction Retry .................................................................................... 4
`Part Three: Serial Bus Configuration ................................................................................ 4
`Chapter 13: Configuration Process ............................................................................. 4
`Chapter 14: Bus Reset (Initialization) ......................................................................... 4
`Chapter 15: Tree Identification ................................................................................... 4
`Chapter 16: Self Identification ..................................................................................... 4
`Part Four: Serial Bus Management .................................................................................... 5
`Chapter 17: Cycle Master ............................................................................................. 5
`Chapter 18: Isochronous Resource Manager ............................................................ 5
`Chapter 19: Bus Manager ............................................................................................. 5
`Chapter 20: Bus Management Services ...................................................................... 5
`Part Five: Registers and Configuration ROM .................................................................. 5
`Chapter 21: CSR Architecture ..................................................................................... 5
`Chapter 22: PHY Registers .......................................................................................... 5
`Chapter 23: Configuration ROM ................................................................................ 5
`Part Six: Power Management ............................................................................................. 6
`Chapter 24: Introduction to Power Management .................................................... 6
`Chapter 25: Cable Power Distribution ........................................ , .............................. 6
`Chapter 26: Suspend & Resume ................................................................................. 6
`Chapter 27: Power State Management.. ..................................................................... 6
`Appendix ............................................................................................................................... 6
`Example 1394 Chip Solutions ..................................................................................... 6
`Target Audience ......................................................................................................................... 7
`Prerequisite Knowledge ........................................................................................................... 7
`
`vii
`
`10
`
`

`

`·~
`
`Contents
`
`.
`Documentation Conventions ................................•....•..........•......•..........................
`................ 7
`Labels £or Multi. -byte Blocks .................. ·.·· .... ···········.....................................

`7
`1,
`.. . . ..... ....
`Hexadecimal Notation ................................... ····················· .............................
`.. ..... .
`Binary Notation ................................................................................................. ::::::::::::::::::::
`Decimal Notation······:················· .........................................................................................
`8
`Bit Versus Byte Notation ...... : ···························:································· ................................. 9
`Identification of Bit Fields (logical groups of bits or
`signals) ............................................•......•......•...............•....•.......•.......................................
`9
`··········
`Visit Our Web Page ......................•.•....................•..................•......•..................................
`10
`.
`·······
`We Want Your Feedback.....................................................................................................
`l0
`....
`
`Part One
`Introduction to FireWire
`(IEEE 1394a)
`
`Chapter 1: Why FireWire?
`'\
`Overvi.ew ....................................••....•................•....•..............•...••.•..•..•...•...........•....................... 13
`Motivations Behind Fire Wire Development ...................................................................... 13
`Inexpensive Alternate to Parallel Buses ......................................................................... 14
`Plug and Play Support ...................................................................................................... 14
`Eliminate Host Processor / Memory Bottleneck ............................................................. 14
`High Speed Bus with Scalable Performance .................................................................. 15
`Support for Isochronous Applications ............................................................................ 15
`BackPlane and Cable Environments ............................................................................... 15
`Bus Bridge ........................................................................................................................... 15
`1394 Applications ..................................................................................................................... 16
`IEEE 1394 Refinements ........................................••..•••....•••...•••••...•...•.•..•.•....•......................... 16
`Primacy Features ....................................................................................................................... 17
`
`Chapter 2: Overview of the IEEE 1394 Architecture

`IEEE 1394 0
`verv-1ew .........•..................•..........•....•••..•......••....•.••...••.•..•............•.....................
`Specifications and Related Documents ................................................................
`IEEE 1394-1995 and the IEEE 1394a Supplement ..........................................................
`21
`IEEE 1394 B
`............... ..
`.
`:
`........................................................................................................
`21
`u t Archit
`tur s
`.. ....
`.fi
`.
`ru
`ec
`e pec1 cations ................................................................................
`23
`IEEE 1394 Topology.....................................................................................................
`23
`................................ ?3
`Multiport Nodes and Repeaters
`Configuration ............................... :::::::::::::::::::::::::::::::::::::::::::::::::::::: ................................ 24
`Peer-To-Peer Transfers ...................................................................................................... 24
`Device Bay ......................................................................................................................... ..
`
`19
`
`;i
`
`viii
`
`,11ttd
`
`11
`
`

`

`,,,, ..
`
`•
`
`Contents
`
`The ISO/IEC 13213 Specification .......................................................................................... 24
`Node Architecture .... ,. ....................................................................................................... 25
`Address Space .................................................................................................................... 28
`Transfers and Transactions ............................................................................................... 30
`Asynchronous Transfers ............................................................................................ 30
`Isochronous Transfers ................................................................................................ 32
`Control and Status Registers (CSRs) ............................................................................... 33
`Configuration ROM ........................................................................................................... 33
`Message Broadcast ............................................................................................................. 34
`Interrupt Broadcast ............................................................................................................ 34
`Automatic Configuration ........................................................................................................ 34
`
`Part Two
`Serial Bus Communications
`
`Chapter 3: Communications Model
`Ov"emew .................................................................................................................................... 37
`Transfer Types ........................................................................................................................... 39
`Asynchronous ..................................................................................................................... 40
`Isochronous ......................................................................................................................... 41
`The Protocol Layers ................................................................................................................. 42
`Bus Management Layer .................................................................................................... 44
`Transaction Layer ............................................................................................................... 45
`Transaction Layer Services ........................................................................................ 45
`Link Layer ........................................................................................................................... 47
`Split Transactions ........................................................................................................ 49
`Concatenated Transactions ....................................................................................... 51
`Unified Transactions .................................................................................................. 52
`Physical Layer ..................................................................................................................... 53
`Twisted Pair Signaling ............................................................................................... 54
`Bus Configuration .................................................................................................. 55
`Arbitration .............................................................................................................. 55
`Data Transmission .................................................................................................. 56
`Power Pair .................................................................................................................... 56
`Packet-Based Transactions ........................................................................................ 56
`Asynchronous Packets ............................................................................................ 56
`Isochronous Packet ................................................................................................. 58
`Port Repeater ............................................................................................................... 59
`
`ix
`
`12
`
`

`

`. .,
`
`Contents
`
`le Asynchronous Transaction .......................................................... .
`....................... 60
`amp
`A S
`The Respon~~·:::::::::::::::::::::::::::::.:·······························································:::::::::::::::::::::::· ~i
`The Request
`.................. ············ · · ·· ········ ······ ................ .
`A.n Example Isochronous Transaction ............................................................

`•••...•••............ 63
`
`6S
`
`Chapter 4: Communications Services
`Overview..........................................................................................................................
`Anatomy Of Asynchronous Transactions ........................................................
`6
`6
`·••··•·•·······
`The Request Subaction ................................................................................................. ::::: 66
`Initiating the Transaction (The Request) ................................................................. 69
`Transaction Layer ......................................... ············ ..... ············.······ ...................... 69
`The Link Layer ........................................... ····································· ....................... 69
`The PHY Layer. ...................................................................................................... 70
`Receiving the Request (The Indication) ............................................................. , ..... 71
`Physical Layer ........................................................................................................ 71
`Link Layer .............................................................................................................. 71
`Transaction Layer ................................................................................................... 72
`The Acknowledgment ............................................................................................ 72
`Response Subaction ........................................................................................................... 73
`Reporting the Results (The Response) ..................................................................... 74
`Transaction Layer Response ................................................................................... 74
`Link Layer Response .............................................................................................. 75
`PHY Layer Response ............................................................................................. 75
`Response Reception .................................................................................................... 76
`Physical Layer ........................................................................................................ 76
`Link Layer .............................................................................................................. 76
`Transaction Layer ................................................................................................... 77
`The Acknowledgment ...................................................................... ...................... 77
`Transaction Label ........................................................................................................ 78
`Anatomy of Isochronous Transactions ................................................................................ 78
`Setting Up Isochronous Transactions ............................................................................. 79
`Maintaining Synchronization ........................................................................................... 79
`Isochronous Transactions ................................................................................................. 80
`Isochronous Transaction Initiation & Reception ........................................................... 80
`Initiating the Transaction ........................................................................................... 81
`L. kL
`81
`ayer ................................................................................................... :::::::::::
`rn
`81
`The PHY Layer. ......................................................................... · ...... ······.....
`82
`Transact~on Reception ................................................................................................
`83
`P~ys1cal Layer ................................................................................ ··· .....................
`83
`Link Layer ............................................................................................................ ..
`
`X
`
`_...,J
`acct.ii,B
`
`13
`
`

`

`.. -
`
`7
`~
`~
`~
`~
`)
`J
`1
`1
`
`2
`3
`3
`
`_ag
`
`Contents
`
`Chapter 5: Cables & Connectors
`Cable and Connector Types ................................................................................................... 85
`6-pin Connector (1394-1995) ............................................................................................. 86
`Make First/Break Last Power Pins .................................................................................. 87
`Optional 4-pin Connector (1394a supplement) ............................................................. 87
`Positive Retention .............................................................................................................. 88
`Cable Characteristics ............................................................................................................... 89
`6-Conductor Cables ........................................................................................................... 89
`4-Conductor Cables ........................................................................................................... 90
`Device Bay .................................................................................................................................. 92
`
`Chapter 6: The Electrical Interface
`Ovel'V'iew .................................................................................................................................... 95
`Common Mode Signaling ................................................................................................. 96
`Differential Signaling ........................................................................................................ 96
`Recognition of Device Attachment and Detachment ........................................................ 97
`IEEE 1394-1995 Device Attachment/Detachment... ...................................................... 97
`IEEE 1394a Device Attachment/Detachment ................................................................ 99
`Bus Idle State .................................................................................................................... 100
`The Port Interface ................................................................................................................... 101
`Differential Signal Specifications ...................................................................................... 104
`Arbitration Signaling ............................................................................................................ 105
`Line State Signaling (1, 0, and Z) ................................................................................... 105
`Line State Detection ......................................................................................................... 107
`Reset Signaling ....................................................................................................................... 110
`Line States During Configuration ...................................................................................... 110
`Line States During Normal Arbitration ............................................................................. 112
`Starting and Ending Packet Transmission ........................................................................ 114
`Dribble Bits ........................................................................................................................ 116
`Port State Control ................................................................................................................... 116
`Speed Signaling ...................................................................................................................... 117
`High Speed Devices Slowed Due to Topology ............................................................ 118
`Devices of Like Speed Directly Connected .................................................................. 118
`Speed Signaling Circuitry ............................................................................................... 119
`Data/Strobe Signaling ........................................................................................................... 122
`NRZ Encoding .................................................................................................................. 123
`Da ta-Strobe Encoding ...................................................................................................... 124
`Gap Timing ............................................................................................................................. 125
`Cable Interface Timing Constants ...................................................................................... 128
`Suspend/Resume .................................................................................................................... 133
`
`xi
`
`14
`
`

`

`--·~
`
`Contents
`~~~~~======================
`
`Cable Power ............................................................................................................................ 133
`Cable Power Requirements ............................................................... ·········· ................... 134
`Power Class ....................................................................................................................... 135
`Power Distribution .......................................................................................................... 137
`Bus Powered Nodes ......................................................................................................... 138
`
`Chapter 7: Arbitration
`Overview .................................................................................................................................. 141
`s· at·
`.
`b .
`M 1Uat1on 1gt1 mg ............................................................................................................ 142
`Mbitration SeNices ............................................................................................................... 145
`Asynchronous Arbitration .................................................................................................... 147
`Fairness Interval ............................................................................................................... 147
`Arbitration Enable Bit .............................................................................................. 147
`Fair Arbitration Service ............................................................................................ 148
`Arbitration Reset Gap .............................................................................................. 148
`The Acknowledge Packet and Immediate Arbitration Service ................................. 150
`Isochronous Mbitrati.on ........................................................................................................ 150
`Cycle Start and Priority Arbitration .............................................................................. 152
`Combined Isochronous and Asynchronous Mbitration ................................................ 152
`Cycle Start Skew ............................................................................................................... 152
`1394a Mbitration Enhancements ........................................................................................ 157
`Acknowledge Accelerated Arbitration ......................................................................... 157
`Fly-by Arbitration ............................................................................................................ 158
`Acceleration Control. ....................................................................................................... 159
`Priority Arbitration Service ............................................................................................ 161
`Sum.ma.ry of Arbitration Types ........................................................................................... 163
`
`Chapter 8: Asynchronous Packets
`Asynchronous Packets .........................................................................................

This document is available on Docket Alarm but you must sign up to view it.


Or .

Accessing this document will incur an additional charge of $.

After purchase, you can access this document again without charge.

Accept $ Charge
throbber

Still Working On It

This document is taking longer than usual to download. This can happen if we need to contact the court directly to obtain the document and their servers are running slowly.

Give it another minute or two to complete, and then try the refresh button.

throbber

A few More Minutes ... Still Working

It can take up to 5 minutes for us to download a document if the court servers are running slowly.

Thank you for your continued patience.

This document could not be displayed.

We could not find this document within its docket. Please go back to the docket page and check the link. If that does not work, go back to the docket and refresh it to pull the newest information.

Your account does not support viewing this document.

You need a Paid Account to view this document. Click here to change your account type.

Your account does not support viewing this document.

Set your membership status to view this document.

With a Docket Alarm membership, you'll get a whole lot more, including:

  • Up-to-date information for this case.
  • Email alerts whenever there is an update.
  • Full text search for other cases.
  • Get email alerts whenever a new case matches your search.

Become a Member

One Moment Please

The filing “” is large (MB) and is being downloaded.

Please refresh this page in a few minutes to see if the filing has been downloaded. The filing will also be emailed to you when the download completes.

Your document is on its way!

If you do not receive the document in five minutes, contact support at support@docketalarm.com.

Sealed Document

We are unable to display this document, it may be under a court ordered seal.

If you have proper credentials to access the file, you may proceed directly to the court's system using your government issued username and password.


Access Government Site

We are redirecting you
to a mobile optimized page.





Document Unreadable or Corrupt

Refresh this Document
Go to the Docket

We are unable to display this document.

Refresh this Document
Go to the Docket