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`INTERNATIONAL TELECOMMUNICATION UNION
`
`
`
`CCITT
`
`THE INTERNATIONAL
`TELEGRAPH AND TELEPHONE
`CONSULTATIVE COMMITTEE
`
`
`
`V.110
`(09/92)
`
`DATA COMMUNICATION
`OVER THE TELEPHONE NETWORK
`
`
`
`SUPPORT OF DATA TERMINAL EQUIPMENTS
`WITH V-SERIES TYPE INTERFACES BY AN
`INTEGRATED SERVICES DIGITAL NETWORK
`
`
`
`
`Recommendation V.110
`
`
`
`
`
`Qualcomm Incorporated v. Rembrandt Wireless Techs. LP.
`IPR2020-00510
`Qualcomm Ex. 1063
`Page 1 of 62
`
`

`

`
`
`
`
`
`
`FOREWORD
`
`The CCITT (the International Telegraph and Telephone Consultative Committee) is a permanent organ of the
`
`International Telecommunication Union (ITU). CCITT is responsible for studying technical, operating and tariff
`questions and issuing Recommendations on them with a view to standardizing telecommunications on a worldwide
`basis.
`
`The Plenary Assembly of CCITT which meets every four years, establishes the topics for study and approves
`
`Recommendations prepared by its Study Groups. The approval of Recommendations by the members of CCITT between
`Plenary Assemblies is covered by the procedure laid down in CCITT Resolution No. 2 (Melbourne, 1988).
`
`Recommendation V.110 was revised by Study Group XVII and was approved under the Resolution No. 2
`
`procedure on the 18th of September 1992.
`
`
`
`
`
`
`
`
`
`___________________
`
`CCITT NOTES
`
`In this Recommendation, the expression (cid:147)Administration(cid:148) is used for conciseness to indicate both a
`1)
`telecommunication Administration and a recognized private operating agency.
`
`2)
`
`A list of abbreviations used in this Recommendation can be found in Annex B.
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`All rights reserved. No part of this publication may be reproduced or utilized in any form or by any means, electronic or
`mechanical, including photocopying and microfilm, without permission in writing from the ITU.
`
` ITU 1993
`
`Page 2 of 62
`
`

`

`Recommendation V.1101)
`
`Recommendation V.110 (09/92)
`
`SUPPORT OF DATA TERMINAL EQUIPMENTS WITH V-SERIES TYPE INTERFACES
`BY AN INTEGRATED SERVICES DIGITAL NETWORK
`(Malaga-Torremolinos, 1984; amended at Melbourne, 1988, revised 1992)
`
`The CCITT,
`
`considering
`that the ISDN will offer the universal interfaces to connect subscriber terminals according to the reference
`
`(a)
`configuration described in Recommendation I.411;
`
`(b)
`that during the evolution of ISDN, however, there will exist for a considerable period data terminal
`equipment (DTEs) with V-Series type interfaces which have to be connected to the ISDN;
`
`(c)
`that bearer services supported by an ISDN are described in Recommendation I.211;
`
`(d)
`that the D-channel signalling protocol is described in Recommendations I.430, I.441/Q.921 and
`I.451/Q.931;
`unanimously declares the view
`
`(1)
`that the scope of this Recommendation shall cover the connection of terminals with interfaces for modems
`conforming to current V-Series Recommendations on the ISDN operating in accordance with circuit switched or leased
`circuit services;
`
`(2)
`that the following circuit switched service capabilities shall be supported:
`(cid:150)
`data transmission; (or)
`(cid:150)
`alternate speech/data transmission; (and/or)
`(cid:150)
`automatic calling and/or automatic answering;
`(3)
`that the reference configurations of § 1 shall apply;
`
`(4)
`that the support of interworking of terminal equipments (TEs) on an ISDN with DTEs on other types of
`
`networks, e.g. public switched telephone network (PSTN), is described in the Recommendations I.500-Series;
`
`(5)
`that the terminal adaptor (TA) functions necessary to support the connection of DTEs with V-Series type
`interfaces on an ISDN, shall include the following:
`(cid:150)
`conversion of electrical and mechanical interface characteristics;
`(cid:150)
`bit rate adaptation;
`(cid:150)
`end-to-end synchronization of entry to and exit from the data transfer phase;
`(cid:150)
`call establishment and disestablishment based on either manual or automatic calling and/or automatic
`answering.
`
`1
`
`Reference configurations
`
`Terminal adaptor reference model
`1.1
`The terminal adaptor functions have been defined in the context of a simple reference model. Annex A
`
`describes the reference model in further detail, and defines a basic terminal adaptor TA-A, and an auto-
`calling/autoanswering terminal adaptor TA-B.
`
`_______________
`1) This Recommendation is also included in the Recommendations of the I-Series under the number I.463.
`
`
`
`
`
`
`
`Recommendation V.110 (09/92)
`
`1
`
`Page 3 of 62
`
`

`

`1.2
`
`Connection types
`
`The terminal adaptor functions described in this Recommendation take into account interworking between TAs
`
`of different types, e.g. V-Series TE2 with X.21 TE2, and end-to-end connections of different types. These are described
`in further detail in Annex A.
`
`2
`
`Line signals at S and T reference points
`
`The TA signals at ISDN reference points S or T shall be in conformance with the characteristics of an ISDN(cid:146)s
`
`(cid:147)Basic user/network interface(cid:148) as described in Recommendation I.430 (layer 1 specification), I.441/Q.921 (layer 2
`specification) and I.451/Q.931 (layer 3 specification).
`
`2.1
`
`Bit rate adaptation of synchronous data signalling rates up to 19.2 kbit/s
`
`2.1.1
`
`General approach
`
`The bit rate adaptation functions within the TA are shown in Figure 1/V.110. The functions RA1 converts the
`
`user data signalling rate to an appropriate intermediate rate expressed by 2k × 8 kbit/s (where k = 0, 1 or 2).
`RA2 performs the second conversion from the intermediate rates to 64 kbit/s. The data signalling rates of 48 and
`56 kbit/s are converted directly into the 64 kbit/s B-channel rate.
`
`2.1.2
`
`Adaptation of V-Series data signalling rates to the intermediate rates
`
`
`
`
`
`The intermediate rate used with each of the V-Series data signalling rates are shown in Table 1/V.110.
`
`Note (cid:150) The specific V-Series data signalling rate(s) to be supported by an ISDN are for further study.
`
`TA
`
`R
`
`RA1
`
`V-Series
`
`RA2
`k
`2 (cid:215) 8 kbit/s
`
`S/T
`
`V-Series
`
`k
`2 (cid:215) 8 kbit/s
`
`64 kbit/s
`
`FIGURE 1/V.110
`
`Two step bit rate adaptation
`
`
`
`T1701650-92
`
`
`
`2
`
`Recommendation V.110 (09/92)
`
`Page 4 of 62
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`

`

`TABLE 1/V.110w
`
`First step rate adaptationw
`
`
`
`Data signalling rate (bit/s)
`
`Intermediate rate
`
`
`
`19 600
`11 200
`12 400
`14 800
`17 200
`19 600
`12 000
`14 400
`19 200
`
`8 kbit/s
`
`16 kbit/s
`
`32 kbit/s
`
`X
`X
`X
`X
`
`
`
`
`
`
`
`
`
`
`X
`X
`
`
`
`
`
`
`
`
`
`
`X
`X
`X
`
`
`
`2.1.2.1
`
`Frame structure
`
`
`
`The frame structure is shown in Table 2/V.110 and is described in the following paragraphs.
`
`As shown in Table 2/V.110, the conversion of the V-Series rates to the intermediate rates uses an 80-bit frame.
`
`The octet zero contains all binary 0, whilst octet 5 consists of a binary 1 followed by seven E bits (see § 2.1.2.4). Octets
`1-4 and 6-9 contain a binary 1 in bit number one, a status bit (S- or X-bit) in bit number 8 and six data bits (D-bits) in bit
`positions 2-7. The order of bit transmission is from left to right and top to bottom.
`
`Octet number
`
`
`0
`
`1
`
`2
`
`TABLE 2/V.110w
`
`Frame structurew
`
`
`
`Bit number
`
`1
`
`0
`
`1
`
`1
`
`2
`
`0
`
`D1
`
`D7
`
`3
`
`0
`
`D2
`
`D8
`
`4
`
`0
`
`D3
`
`D9
`
`D14
`
`D15
`
`5
`
`0
`
`D4
`
`D10
`
`D16
`
`6
`
`0
`
`D5
`
`D11
`
`D17
`
`7
`
`0
`
`D6
`
`D12
`
`D18
`
`8
`
`0
`
`S1
`
`X
`
`S3
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`9
`
`1
`
`1
`
`1
`
`1
`
`1
`
`1
`
`1
`
`D13
`
`D19
`
`E1
`
`D25
`
`D31
`
`D37
`
`D43
`
`D20
`
`D21
`
`D22
`
`D23
`
`D24
`
`E2
`
`D26
`
`D32
`
`D38
`
`D44
`
`E3
`
`D27
`
`D33
`
`D39
`
`D45
`
`E4
`
`D28
`
`D34
`
`D40
`
`D46
`
`E5
`
`D29
`
`D35
`
`D41
`
`D47
`
`E6
`
`D30
`
`D36
`
`D42
`
`D48
`
`S4
`
`E7
`
`S6
`
`X
`
`S8
`
`S9
`
`
`
`
`
`
`
`
`
`Recommendation V.110 (09/92)
`
`3
`
`Page 5 of 62
`
`

`

`2.1.2.2
`
`Frame synchronization
`
`The 17-bit frame alignment pattern consists of all 8 bits (set to binary 0) of octet zero and bit one (set to binary
`
`1) of the following nine octets (see also § 2.1.3).
`
`2.1.2.3
`
`Status bits (S1, S3, S4, S6, S8, S9 and X)
`
`The bits S and X are used to convey channel control information associated with the data bits in the data
`
`transfer state, as shown in Table 3/V.110. The S-bits are put into two groups SA and SB, to carry the condition of two
`interchange circuits. The X-bit is used to carry the condition of circuit 106, and in addition, signals the state of frame
`synchronization between TAs. The X-bit can also be used optionally to carry flow control information between TAs
`supporting asynchronous terminal equipment. This usage is specified in § 2.4.2.
`
`
`
`The use of S- and X-bits for synchronization of entry to and exit from the data transfer state is specified in § 4.
`
`The mechanism for proper assignment of the control information from the transmitting signal rate adapter
`
`interface via these bits to the receiving signal rate adapter interface is shown in Table 3/V.110 and described in § 4.
`
`
`
`For the S- and X-bits, a ZERO corresponds with the ON condition, a ONE with the OFF condition.
`
`Control information, conveyed by the S-bits, and user data, conveyed by the D-bits, should not have different
`
`transmission delays. The S-bits should therefore transmit control information sampled simultaneously with the D-bits in
`the positions specified in Table 4/V.110 and as presented in Figure 2/V.110.
`
`The X-bit should be presented upon arrival to control circuit 106. Circuit 106 shall respond as defined in § 3.3
`
`(X = ZERO, 106 = ON).
`
`TABLE 3/V.110w
`
`General mapping schemew
`
`
`
`108 ----------------------
`
`S1, S3, S6, S8 = SA
`
`-------------------------------- 107
`
`105 ----------------------
`
`S4, S9 = SB
`
`-------------------------------- 109
`
`Frame synch --------
`and 106/IWF
`
`X
`
`-------------------------------- 106
`
`
`
`TABLE 4/V.110p
`
`Coordination between S-bits and D-bitsp
`
`
`
`S-bit
`
`
`
`S1
`S3
`S4
`S6
`S8
`S9
`
`D-bit
`
`Octet No.
`
`2
`3
`4
`7
`8
`9
`
`Bit No.
`
`3 (D8)6
`5 (D16)
`7 (D24)
`3 (D32)
`5 (D40)
`7 (D48)
`
`Recommendation V.110 (09/92)
`
`
`
`
`
`4
`
`Page 6 of 62
`
`

`

`0 2
`
`6
`
`0 2
`
`5
`
`0 2
`
`4
`
`0 2
`
`3
`
`0 2
`
`2
`
`0 2
`
`1
`
`0 2
`
`0
`
`0 1
`
`9
`
`0
`
`0
`
`0
`
`0
`
`0
`
`0
`
`0
`
`12
`
`13
`
`14
`
`15
`
`16
`
`17
`
`18
`
`0 1
`
`1
`
`0 1
`
`0
`
`0 9
`
`0 8
`
`0 7
`
`0 6
`
`0 5
`
`0 4
`
`0 3
`
`0 2
`
`0 1
`
`0
`
`48
`
`*
`
`S 4
`
`020
`
`1
`
`S 3
`
`018
`
`017
`
`016
`
`015
`
`014
`
`013
`
`*
`1X0
`
`*
`
`0 9
`
`0 8
`
`0 7
`
`1S
`1
`
`0 6
`
`0 5
`
`0 4
`
`0 3
`
`0 2
`
`0 1
`
`100000000S
`9
`
`*
`
`103
`
`105
`
`108
`
`024
`
`023
`
`022
`
`021
`
`019
`
`0 1
`
`9
`
`0 1
`
`8
`
`0 1
`
`7
`
`0 1
`
`6
`
`0 1
`
`5
`
`0 1
`
`4
`
`0 1
`
`3
`
`0 1
`
`2
`
`0
`
`0
`
`10
`
`11
`
`0 9
`
`12
`
`0 8
`
`t1
`
`011
`
`010
`
`8, 16 or 32 kbit/s
`bearer on
`B-channel
`
`0 7
`
`0 6
`
`0 5
`
`0 4
`
`0 3
`
`0 2
`
`0 1
`
`0 4
`
`8
`
`0 4
`
`7
`
`0 4
`
`6
`
`0 4
`
`5
`
`0 4
`
`4
`
`0 4
`
`3
`
`0 4
`
`2
`
`0
`
`0
`
`0
`
`0
`
`0
`
`0
`
`0
`
`0 3
`
`2
`
`t 0
`
`0 2
`
`6
`
`0 2
`
`5
`
`0
`
`104
`
`109
`
`107
`
`103
`
`0 2
`
`0 1
`
`0 4
`
`8
`
`0 4
`
`7
`
`0 4
`
`6
`
`0 4
`
`5
`
`0 4
`
`4
`
`0 4
`
`3
`
`36
`
`37
`
`38
`
`39
`
`40
`
`41
`
`42
`
`0 3
`
`5
`
`0 3
`
`4
`
`0 3
`
`3
`
`0 3
`
`1
`
`0 3
`
`0
`
`0 2
`
`9
`
`0 2
`
`8
`
`0 2
`
`7
`
`*
`
`S 9
`
`048
`
`047
`
`046
`
`045
`
`044
`
`043
`
`1
`
`S 8
`
`042
`
`041
`
`040
`
`039
`
`038
`
`037
`
`*
`1X
`
`036
`
`035
`
`034
`
`033
`
`032
`
`031
`
`1S
`5
`
`030
`
`*
`
`026
`
`025
`
`1
`
`E 7
`E 6
`E 5
`E 4
`E 3
`E 2
`E 1
`
`1
`
`S 4
`
`24
`
`*
`
`105
`
`108
`
`029
`
`028
`
`027
`
`8, 16 or 32 kbit/s
`bearer on
`B-channel
`
`0 4
`
`3
`
`0 4
`
`2
`
`0 4
`
`1
`
`0 4
`
`0
`
`0 3
`
`9
`
`0 3
`
`8
`
`0 3
`
`7
`
`0 3
`
`6
`
`0
`
`0
`
`0
`
`0
`
`0
`
`0
`
`0
`
`29
`
`30
`
`31
`
`32
`
`33
`
`34
`
`35
`
`0 2
`
`8
`
`0 2
`
`7
`
`0 2
`
`6
`
`0 2
`
`5
`
`0 2
`
`4
`
`0 2
`
`3
`
`0 2
`
`2
`
`0 2
`
`1
`
`0 2
`
`0
`
`0 1
`
`9
`
`0 1
`
`8
`
`t1
`
`Indicates the sampling point for circuit 105 and 108
`Indicates the change point for circuits 107 and 109
`
`t 2
`T1701660-92
`
`104
`
`109
`
`107
`
`*
`
`Note 1 (cid:150) In order to maintain conformity with the bit rate adaptation of X.1 user classes of service described in Recom-
`mendation X.30 (I.461), the bits S1 and S6, S3 and S8, S4 and S9 are used to convey channel status information associated
`with the P-, Q- and R-bit groups respectively.
`Refer to § 2.1.1.2.3 of Recommendation X.30 (I.461) for detailed information concerning the mapping of the information
`on circuit C of the X.21 interface to the S-bits and to the I-bits of the distant interface.
`Note 2 (cid:150) The coordination between S- and D-bits described in Table 4/V.110 and Figure 2/V.110 is intended to provide for
`compatibility with Recommendation X.30 (I.461). Whether this coordination is strictly necessary in the context of
`Recommendation V.110 is for further study.
`
`FIGURE 2/V.110
`Coordination between S-bits and D-bits
`
`
`
`
`
`
`
`
`
`
`
`Recommendation V.110 (09/92)
`
`5
`
`Page 7 of 62
`
`

`

`2.1.2.4
`
`E-bit usage
`
`The E-bits are used to carry the following information:
`a) Rate repetition information: Bits E1, E2 and E3, in conjunction with the intermediate rate (see
`Table 2/V.110), provide the user data signalling rate (synchronous) identification. The coding of these
`bits shall be as shown in Table 5/V.110.
`b) Network independent clock information: Bits E4, E5 and E6 are used as specified in § 5 to carry network
`independent clock phase information.
`c) Multiframe information: Bit E7 is used as indicated in Table 5/V.110.
`
`TABLE 5/V.110w
`
`E-bit usagew
`(Note 1)w
`
`
`
`E7
`
`
`
`
`1 ou 0
`(Note 2)
`1
`1
`1
`1
`1
`
`E1
`
`E2
`
`E3
`
`E4
`
`R5
`
`E6
`
`(Note 4)
`
`(Note 3)
`
` C
`
`
`
`C
`C
`C
`C
`C
`
` C
`
`
`
`C
`C
`C
`C
`C
`
` C
`
`
`
`C
`C
`C
`C
`C
`
` 0
`
`
`
`0
`0
`1
`1
`1
`
` 0
`
`
`
`1
`1
`0
`0
`1
`
` 1
`
`
`
`0
`1
`0
`1
`0
`
`Intermediate rates
`kbit/s
`
`8
`
`bit/s
`600
`
`1200
`2400
`
`
`4800
`
`16
`
`bit/s
`
`
`
`
`7200
`9600
`
`32
`
`bit/s
`
`
`
`12 000
`14 400
`19 200
`
`Note 1 (cid:151) The data signalling rates of 600, 2400, 4800 and 9600 bit/s are also Recommendation X.1 user classes of
`service (see also Recommendation X.30/I.461).
`Note 2 (cid:151) In order to maintain compatibility with Recommendation X.30 (I.461), the 600 bit/s user rate E7 is coded to
`enable the 4 (cid:215) 80 bit multiframe synchronization. To this end, E7 in the fourth 80-bit frame is set to binary 0
`(see § 2.1.2.7 and Table 6a/V.110).
`Note 3 (cid:151) C indicates the use of E4, E5 and E6 for the Transport of Network Independent blocking information (see § 5).
`These bits shall be set to ONE when unused.
`Note 4 (cid:151) Synchronous rate information is carried by bits E1, E2 and E3 as indicated. Asynchronous rate information
`must be provided with out-of-band signalling (layer 3 messages in the D-channel) or with In-band parameter exchange as
`described in Appendix I.
`
`
`
`
`
`2.1.2.5
`
`Rate negotiation
`
`
`
`Negotiation of the synchronous rate may be appropriate in interworking situations involving interconnections
`
`with modems on the PSTN where the remote modem/DTE has the capability of operating at different rates depending
`upon the conditions. It may also be appropriate in interconnections for asynchronous transmission specified in § 2.3 and
`accommodate split rate operation. The need for rate negotiation and the method is for further study.
`
`2.1.2.6
`
`Data bits
`
`Data are conveyed in D-bits, i.e. up to 48 bits per 80-bit frame. In this Recommendation the octet boundaries
`
`of the user(cid:146)s data stream are not defined.
`
`6
`
`Recommendation V.110 (09/92)
`
`Page 8 of 62
`
`

`

`Bit assignment
`2.1.2.7
`The adaptation of 600, 1200 and 2400 bit/s rates to the 8 kbit/s intermediate rate are shown in
`
`Tables 6a/V.110, 6b/V.110 and 6c/V.110, respectively.
`
`The adaptation of 7200 and 14 400 bit/s rates to the 16 and 32 kbit/s intermediate rate, respectively, use the
`data bit assignments shown in Table 6d/V.110.
`
`The adaptation of 4800, 9600 and 19 200 bit/s rates to the 8, 16 and 32 kbit/s intermediate rate, respectively,
`use the data bit assignments shown in Table 6e/V.110.
`
`The adaptation of 12 000 bit/s user rate to 32 kbit/s intermediate rate use the data bit assignments shown in
`Table 6f/V.110.
`
`2.1.3
`
`Frame synchronization and additional signalling capacity
`
`Search for frame synchronization
`2.1.3.1
`The following 17-bit alignment pattern is used to achieve frame synchronization:
`
`00000000
`1XXXXXXX
`1XXXXXXX
`1XXXXXXX
`1XXXXXXX
`
`1XXXXXXX 1XXXXXXX
`1XXXXXXX
`1XXXXXXX
`1XXXXXXX
`
`To ensure a reliable synchronization, it is suggested that at least two 17-bit alignment patterns in consecutive
`
`frames be detected.
`
`Once frame synchronization is achieved, it is suggested that a persistence check be made of the
`S = X = OFF condition of § 4.1.2 prior to proceeding to transparent data transfer with the S = X = ON condition, as
`shown in Figure 3/V.110.
`
`Frame synchronization monitoring and recovery
`2.1.3.2
`Monitoring of the frame synchronization shall be a continuous process using the same procedures as for initial
`
`detection.
`
`Loss of frame synchronization shall not be assumed unless at least three consecutive frames, each with at least
`one framing bit error, are detected.
`
`Following loss of frame synchronization, the TA shall enter a recovery state as discussed in § 4.1.5. If
`recovery is not successful, further maintenance procedures may be used.
`
`Adaptation of intermediate rates to 64 kbit/s
`2.1.4
`Since rate adaptation of a single intermediate rate (e.g. 8, 16, or 32 kbit/s) to the 64 kbit/s B channel rate and
`
`the possible multiplexing of several intermediate rate streams2) to the 64 kbit/s B-channel rate must be compatible to
`enable interworking, a common approach is needed for the second step rate adaptation and, possibly, for intermediate
`rate multiplexing. This second step rate adaptation method is described in Recommendation I.460.
`
`Rate adaptation of 48 and 56 kbit/s user rates to 64 kbit/s
`2.2
`The 48 and 56 kbit/s user data signalling rates are adapted to the 64 kbit/s B-channel rate in one step as
`
`indicated in Tables 7a/V.110 and 7b/V.110 or 7c/V.110 respectively.
`
`_______________
`2) Multiplying of several intermediate rate streams is for further study.
`
`
`
`
`
`
`
`Recommendation V.110 (09/92)
`
`7
`
`Page 9 of 62
`
`

`

`
`
`0
`1
`1
`1
`1
`1
`1
`1
`1
`1
`
`TABLE 6a/V.110
`Adaptation of 600 bit/s user rate
`to 8 kbit/s intermediate rates
`
`0
`D1
`D1
`D2
`D3
`1
`D4
`D4
`D5
`D6
`
`0
`D1
`D1
`D2
`D3
`0
`D4
`D4
`D5
`D6
`
`0
`D1
`D2
`D2
`D3
`0
`D4
`D5
`D5
`D6
`
`0
`D1
`D2
`D2
`D3
`E4
`D4
`D5
`D5
`D6
`
`0
`D1
`D2
`D3
`D3
`E5
`D4
`D5
`D6
`D6
`
`0
`D1
`D2
`D3
`D3
`E6
`D4
`D5
`D6
`D6
`
`0
`S1
`X
`S3
`S4
`E7a)
`S6
`X
`S8
`S9
`
`a) See Note 2 to Table 5/V.110.
`
`
`TABLE 6c/V.110
`Adaptation of 2400 bit/s user rate
`to 8 kbit/s intermediate rate
`
`0
`0
`0
`0
`0
`0
`D3
`D3
`D2
`D2
`D1
`D1
`D6
`D6
`D5
`D5
`D4
`D4
`D9
`D9
`D8
`D8
`D7
`D7
`D10 D10 D11 D11 D12 D12
`1
`1
`0
`E4
`E5
`E6
`D13 D13 D14 D14 D15 D15
`D16 D16 D17 D17 D18 D18
`D19 D19 D20 D20 D21 D21
`D22 D22 D23 D23 D24 D24
`
`
`
`
`
`
`
`
`
`
`
`0
`S1
`X
`S3
`S4
`E7
`S6
`X
`S8
`S9
`
`
`0
`1
`1
`1
`1
`1
`1
`1
`1
`1
`
`
`
`
`
`
`
`
`TABLE 6e/V.110
`Adaptation of Na) (cid:215) 4800 bit/s user rate
`to the intermediate rate
`
`0
`0
`0
`0
`0
`0
`0
`D6
`D5
`D4
`D3
`D2
`D1
`1
`D10 D11 D12
`D9
`D8
`D7
`1
`D13 D14 D15 D16 D17 D18
`1
`D19 D20 D21 D22 D23 D24
`1
`0
`1
`1
`E4
`E5
`E6
`1
`D25 D26 D27 D28 D29 D30
`1
`D31 D32 D33 D34 D35 D36
`1
`D37 D38 D39 D40 D41 D42
`1
`D43 D44 D45 D46 D47 D48
`1
`a) N = 1, 2 or 4 only.
`
`
`
`
`
`0
`S1
`X
`S3
`S4
`E7
`S6
`X
`S8
`S9
`
`
`8
`
`Recommendation V.110 (09/92)
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`TABLE 6b/V.110
`Adaptation of 1200 bit/s user rate
`to 8 kbit/s intermediate rate
`
`0
`1
`1
`1
`1
`1
`1
`1
`1
`1
`
`0
`0
`0
`0
`0
`0
`D2
`D2
`D1
`D1
`D1
`D1
`D3
`D3
`D3
`D3
`D2
`D2
`D5
`D5
`D4
`D4
`D4
`D4
`D6
`D6
`D6
`D6
`D5
`D5
`E6
`E5
`E4
`0
`1
`0
`D8
`D8
`D7
`D7
`D7
`D7
`D9
`D9
`D9
`D9
`D8
`D8
`D10 D10 D10 D10 D11 D11
`D11 D11 D12 D12 D12 D12
`
`0
`S1
`X
`S3
`S4
`E7
`S6
`X
`S8
`S9
`
`TABLE 6d/V.110
`Adaptation of Na) (cid:215) 3600 bit/s user rate
`to the intermediate rate
`
`0
`0
`0
`0
`0
`0
`0
`D6
`D5
`D4
`D3
`D2
`D1
`1
`F
`F
`D10
`D9
`D8
`D7
`1
`D13 D14
`F
`F
`D11 D12
`1
`D15 D16 D17 D18
`F
`F
`1
`1
`E4
`E5
`E6
`1
`0
`1
`D19 D20 D21 D22 D23 D24
`1
`D25 D26 D27 D28
`F
`F
`1
`D29 D30
`F
`F
`D31 D32
`1
`F
`F
`D33 D34 D35 D36
`1
` F a) = Fill bit
`a) N = 2 or 4 only.
`
`0
`S1
`X
`S3
`S4
`E7
`S6
`X
`S8
`S9
`
`TABLE 6f/V.110
`Adaptation of 12 000 bit/s user rate
`to 32 kbit/s intermediate rate
`
`0
`0
`0
`0
`0
`0
`D6
`D5
`D4
`D3
`D2
`D1
`F
`F
`D10
`D9
`D8
`D7
`D13 D14
`F
`F
`D11 D12
`F
`F
`F
`D15
`F
`F
`E5
`E6
`E4
`1
`0
`0
`D16 D17 D18 D19 D20 D21
`D22 D23 D24 D25
`F
`F
`D26 D27
`F
`F
`D28 D29
`F
`F
`D30
`F
`F
`F
`
`0
`S1
`X
`S3
`S4
`E7
`S6
`X
`S8
`S9
`
`0
`1
`1
`1
`1
`1
`1
`1
`1
`1
` F = Fill
`
`Page 10 of 62
`
`

`

`108.1/2 = ON
`105 = ON
`107 = OFF
`106 = OFF
`109 = OFF
`
`108.1/2 = ON
`105 = ON
`107 = ON
`106 = 105
`109 = ON
`
`108.1/2 = ON
`105 = ON
`
`107 = OFF
`106 = 105
`109 = ON
`
`108.1/2 = OFF
`105 = OFF
`
`107 = OFF
`106 = 105
`109 = OFF
`
`T1701430-92
`
`TE2
`
`CALLING
`
`CALLED
`
`TE2
`
`TA
`
`B-channel
`
`TA
`
`Time-out
`
`B-channel connection
`established
`
`(S = X = OFF)
`
`Frames
`(S = X = OFF)
`
`Frame search
`
`Time-out
`
`Stapped by
`
`107 ON
`
`Frame search
`
`(S = X = OFF)
`
`(S = X = ON)
`
`(S = X = ON)
`
`(S = X = ON)
`
`Stopped by
`107 ON
`
`(D = 0)
`(S = OFF, X = ON)
`
`(S = X = ON)
`
`(D = 0)
`(S = OFF, X = ON)
`
`(D = 0)
`(S = OFF, X = ON)
`
`B-channel disconnection
`
`108.1/2 = ON
`105 = ON
`107 = OFF
`106 = OFF
`109 = OFF
`
`108.1/2 = ON
`105 = ON/OFF
`107 = OFF
`106 = OFF
`109 = OFF
`
`108.1/2 = ON
`105 = ON
`
`107 = ON
`106 = 105
`109 = ON
`
`108.1/2 = OFF
`105 = OFF
`
`107 = ON
`106 = 105
`109 = ON
`
`108.1/2 = OFF
`105 = OFF
`
`107 = OFF
`106 = 105
`109 = OFF
`
`Entry to data phase
`
`Data phase
`
`Exit from data phase
`
`B-channel connection of TA
`
`B-channel disconnection of TA
`
`Bidirectional switch-through TE2
`
`Bidirectional disconnection of TE2
`
`TA disconnecting procedure according to § 4.1.4 started
`
`FIGURE 3/V.110
`TA synchronization of entry to and exit from data transfer phase
`
`
`
`
`
`
`
`Recommendation V.110 (09/92)
`
`9
`
`
`
`
`
`Page 11 of 62
`
`

`

`TABLE 7a/V.110p
`
`Adaptation of 48 kbit/s user rate to 64 kbit/sp
`
`Octet number
`
`
`1
`
`2
`
`3
`
`4
`
`1
`
`1
`
`0
`
`1
`
`1
`
`2
`
`D1
`
`D7
`
`D13
`
`D19
`
`
`
`3
`
`D2
`
`D8
`
`D14
`
`D20
`
`Bit number
`
`4
`
`D3
`
`D9
`
`D15
`
`D21
`
`5
`
`D4
`
`D10
`
`D16
`
`D22
`
`6
`
`D5
`
`D11
`
`D17
`
`D23
`
`7
`
`D6
`
`D12
`
`D18
`
`D24
`
`8
`
`S1
`
`X
`
`S3
`
`S4
`
`Note 1 (cid:150) 48 kbit/s is also a Recommendation X.1 user class of service (see also Recommendation X.30/I.461, § 2.2.1).
`
`Note 2 (cid:150) Refer to § 2.1.2.3 for the use of status bits and bit X; however for international operation over restricted
`64 kbit/s bearer capabilities, bit X must be set to binary 1.
`
`
`
`
`
`TABLE 7b/V.110p
`
`Adaptation of 56 kbit/s user rate to 64 kbit/sp
`
`
`
`Octet number
`
`
`1
`
`2
`
`3
`
`Bit number
`
`4
`
`D4
`
`5
`
`D5
`
`6
`
`D6
`
`7
`
`D7
`
`8
`
`1
`
`1
`
`2
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`D1
`
`D8
`
`D15
`
`D22
`
`D29
`
`D36
`
`D43
`
`D50
`
`D2
`
`D9
`
`D16
`
`D23
`
`D30
`
`D37
`
`D44
`
`D51
`
`D3
`
`D10
`
`D17
`
`D24
`
`D31
`
`D38
`
`D45
`
`D52
`
`D11
`
`D18
`
`D25
`
`D32
`
`D39
`
`D46
`
`D53
`
`D12
`
`D19
`
`D26
`
`D33
`
`D40
`
`D47
`
`D54
`
`D13
`
`D20
`
`D27
`
`D34
`
`D41
`
`D48
`
`D55
`
`D14
`
`D21
`
`D28
`
`D35
`
`D42
`
`D49
`
`D56
`
`1
`
`1
`
`1
`
`1
`
`1
`
`1
`
`1
`
`
`
`10
`
`Recommendation V.110 (09/92)
`
`Page 12 of 62
`
`

`

`TABLE 7c/V.110p
`
`Alternative frame structure for the adaptation of 56 kbit/sp
`user rate to 64 kbit/sp
`
`Octet number
`
`
`1
`
`2
`
`3
`
`4
`
`1
`
`D1
`
`D8
`
`D15
`
`D22
`
`2
`
`D2
`
`D9
`
`D16
`
`D23
`
`
`
`3
`
`D3
`
`D10
`
`D17
`
`D24
`
`Bit number
`
`4
`
`D4
`
`D11
`
`D18
`
`D25
`
`5
`
`D5
`
`D12
`
`D19
`
`D26
`
`6
`
`D6
`
`D13
`
`D20
`
`D27
`
`D34
`
`7
`
`D7
`
`D14
`
`D21
`
`D28
`
`D35
`
`8
`
`0
`
`X
`
`S3
`
`S4
`
`1
`
`5
`
`6
`
`7
`
`8
`
`D29
`
`D36
`
`D43
`
`D50
`
`D30
`
`D37
`
`D44
`
`D51
`
`D31
`
`D38
`
`D45
`
`D52
`
`D32
`
`D39
`
`D46
`
`D53
`
`D33
`
`D40
`
`D47
`
`D54
`
`D41
`
`D48
`
`D55
`
`D42
`
`D49
`
`D56
`
`1
`
`1
`
`1
`
`Note 1 (cid:150) Refer to § 2.1.2.3 for the use status bits and bit X.
`Note 2 (cid:150) Table 7c/V.110 is a permitted option to provide for signalling to enter and to leave the data phase. However, the
`recommended approach shall be as in Table 7b/V.110 and the responsibility shall be on the user of Table 7c/V.110 to
`insure that interworking can be achieved.
`
`
`
`2.2.1
`
`Frame synchronization
`
`
`
`At the user data signalling rate of 48 kbit/s, the frame alignment pattern consists of 1011 in bit 1 of consecutive
`
`octets of one frame. To ensure reliable synchronization, it is suggested that at least five 4-bit alignment patterns in
`consecutive frames be detected.
`
`At the user data signalling rate of 56 kbit/s with the alternative frame structure according to Table 7c/V.110 the
`
`frame alignment pattern consists of OYY1111 in bit 8 of consecutive octets of one frame. Bits marked with Y may be
`either (cid:147)0(cid:148) or (cid:147)1(cid:148). To ensure a reliable synchronization, it is suggested that at least four 5-bit (01111) alignment patterns
`in the 8 bit sequence of OYYY1111 in consecutive octets be detected.
`
`
`
`Frame synchronization monitoring and recovery is described in § 2.1.3.2.
`
`2.3
`
`Adaptation for asynchronous rates of up to 19 200 bit/s
`
`2.3.1
`
`General approach
`
`The bit rate adaptation functions within the TA are shown in Figure 4/V.110. A three-step method is employed
`
`with the functional blocks RA0, RA1, and RA2. The RA0 function is an asynchronous-to-synchronous conversion step,
`for support of the rates specified in Table 8/V.110, using the same technique as defined in Recommendation V.14. It
`produces a synchronous bit stream defined by 2n × 600 bits (where n = 0 to 5). The functions RA1 and RA2 are the same
`as specified in § 2.1. Function RA1 adapts the user rate to the next higher rate expressed by 2k × 8 bit/s (where k = 0, 1
`or 2). RA2 performs the second conversion to 64 kbit/s.
`
`
`
`
`
`
`
`Recommendation V.110 (09/92)
`
`11
`
`Page 13 of 62
`
`

`

`R
`
`RA0
`
`n
`2 (cid:215) 600 bit/s
`
`RA1
`n
`2 (cid:215) 600 bit/s
`
`RA2
`k
`2 (cid:215) 8 kbit/s
`
`S/T
`
`Stop bit
`manipulation
`
`Step 1
`
`k
`2 (cid:215) 8 kbit/s
`Step 2
`
`64 kbit/s
`Step 3
`
`T1701670-92
`
`FIGURE 4/V.110
`Three step rate adaption bit
`
`
`
`
`
`2.3.2
`
`Supported asynchronous user rates
`
`
`
`The asynchronous user rates to be supported, mandatory and optional, are specified in Table 8/V.110.
`
`TABLE 8/V.110p
`
`Asynchronous user ratesp
`
`
`
`Data rate
`(bit/s)
`
`19.450 *
`19.475 *
`19.110 *
`19.150 *
`19.200 *
`19.300 *
`19.600 *
`11 200 *
`12 400 *
`13 600 *
`14 800 *
`17 200 *
`19 600 *
`12 000 *
`14 400 *
`19 200 *
`
`Rate tolerance
`(%)
`
`Number of data
`units
`
`Number of stop
`elements
`
`RA0/RA1 rate
`(bit/s)
`
`RA1 rate
`(kbit/s)
`
`± 2.5
`± 2.5
`± 2.5
`± 2.5
`± 2.5
`± 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`+ 1 (cid:150) 2.5
`
`5
`5.7 or 82
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`7 or 8
`
`1,5
`1:1.5:2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`1 or 2
`
`19.600
`19.600
`19.600
`19.600
`19.600
`19.600
`19.600
`11 200
`12 400
`14 800
`14 800
`19 600
`19 600
`19 200
`19 200
`19 200
`
`18
`18
`18
`18
`18
`18
`18
`18
`18
`18
`18
`16
`16
`32
`32
`32
`
`Note 1 (cid:150) * indicates rate whose support is mandatory for universal TA.
`Note 2 (cid:150) Number of data bits includes possible parity bits.
`
`
`
`
`2.3.3
`
`Asynchronous-to-synchronous conversion (RA0)
`
`The RA0 function is only used with asynchronous V-Series interfaces. Incoming asynchronous data is padded
`
`by the addition of stop elements to fit the nearest channel rate defined by 2n × 600 bit/s. Thus, a 7200 bit/s user data
`signalling
`rate shall be adapted
`to a synchronous 9600 bit/s stream and a 110 bit/s user data
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`signalling rate shall be adapted to synchronous 600 bit/s stream. The resultant synchronous stream is fed to RA1.
`Padding with stop elements is inhibited during the transmission of the break signal as described in § 2.3.5.
`
`2.3.4
`
`Overspeed/underspeed
`
`A terminal adaptor shall insert additional stop elements when its associated terminal is transmitting with a
`
`lower than nominal character rate. If the terminal is transmitting characters with an overspeed of up to 1% (or 2.5% in
`the case of nominal speeds lower than 600 bit/s), the asynchronous-to-synchronous converter may delete stop elements
`as often as is necessary to a maximum of one every eight characters at 1% overspeed. The converter on the receiving
`side shall detect deleted stop elements and re-insert them in the received data stream (circuit 104).
`
`The nominal length of the start elements and data units shall be the same for all characters. The length of the
`
`stop element may be reduced as much as 12.5% by the receiving converter for nominal speeds exceeding 300 bit/s to
`allow for overspeed in the transmitting terminal. For nominal speeds less than or equal to 300 bit/s, a 25% reduction in
`stop element is allowed.
`
`2.3.5
`
`Break signal
`
`
`
`The terminal adaptor shall detect and transmit the break signal as follows:
`
`If the converter detects M to 2M + 3 bits, all of start polarity, where M is the number of bits per character in
`
`the selected format including start and stop elements, the converter shall transmit 2M + 3 bits of start polarity.
`
`If the converter detects more than 2M + 3 bits, all of start polarity, the converter shall transmit all these bits as
`
`start polarity.
`
`For the cases where the asynchronous rate is lower than the synchronous rate for the converter, the following
`
`rules shall apply:
`the converter shall transmit start polarity (to RA1) for a time period equal to 2M + 3 bits at the
`asynchronous rate if the converter has detected M to 2M + 3 bits of start polarity;
`
`(cid:150)
`
`(cid:150)
`
`(cid:150)
`
`(cid:150)
`
`the converter shall transmit (to RA1) start polarity for a time period as long as the received break
`condition if the converter has detected more than 2M + 3 bits of start polarity;
`the 2M + 3 or more bits of start polarity received from the transmitting side shall be output to the
`receiving DTE;
`
`the DTE must transmit on circuit 103 at least 2M bits of stop polarity after the start polarity break signal
`before sending further data characters. The converter shall then regain character synchronism from the
`following stop to start transition.
`
`2.3.6
`
`Parity bits
`
`
`
`Possible parity bits included in the user data are considered as data bits by the RA0 function.
`
`2.4
`
`Flow control
`
`A flow control option, for use with TAs supporting asynchronous DTEs, is described in this section. Flow
`
`control allows the connection of asynchronous DTEs operating at different user data rates by reducing the character
`output of the faster to that of the slower. Support of flow control will require the use of end-to-end (TA-to-TA) protocol
`defined in § 2.4.2 and an incoming line (from network) buffer in addition to a selected local protocol (see § 2.4.1).
`Depending upon the local flow control protocol employed, there will also be a requirement for character buffering from
`the DTE interface. The size of this buffer is not defined in this Recommendation because it is dependent upon
`implementation.
`
`Local flow control of the DTE interface is required where the DTE operates at a rate higher than the
`
`synchronous rate established between TAs. End-to-end flow control is required where the synchronous rate established
`between TAs is consistent with the operating rate of one DTE (or interworking unit) and higher than the synchronous
`rate consistent with the operating rate of the other DTE (or interworking unit). Both local and end-to-end flow control
`could be required in some applications.
`
`
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`2.4.1
`
`Local flow control: TA to DTE
`
`Connection may be made between TAs connected to asynchronous DTEs operating at two different speeds. It
`
`is the responsibility of the TA connected to the faster DTE to execute a local flow control protocol to reduce the
`character rate to that of the slower DTE. This operation will require some buffer storage in the TA. A TA may support
`several different local flow control protocols, although only one will be selected at any one time. There are a number of
`such protocols in use, some of which are detailed in the following text.
`
`2.4.1.1
`
`105/106 operation
`
`This is an out-of-band flow control mechanism, utilizing two of the interchange circuits specified in
`
`Recommendation V.24. If a DTE requires to transmit a character, it turns ON circuit 105 (request to send). The DTE can
`only begin transmission when it receives in return circuit 106 ON (ready for sending). If, during transmission of a block
`of characters circuit 106 goes OFF, the DTE must cease transmission (after completing the transmission of any character
`of which transmission has started) until circuit 106 turns ON again.
`
`2.4.1.2
`
`XON/XOFF operation
`
`This is an in-band flow