`
`34
`
`The Link Contra"er
`
`the two P'C‘tnets'
`the SCO slots in the two piconets do not overlap. but as the clocks ol
`Masters dril't. the [Win SCU links wull move until they overlap (me another
`
`5.7 MASTER I SLAVE HOLE SWITCHING
`
`Bluetooth allows any device to request a switch in roles with respect to another dewcc n
`is communicating with. For example. a Master in an existing piconet might allow "selt‘to
`be paged and connected to a new device and then switch hem-cert SlavelMasier (tem-
`porarily imposed by the paging procedure) and Master/Shoe to integrate the nevi Slaw
`into its pieonet. This is accomplished with a Master/Slave switch and is particularly Useful
`in situations where a connection has just been established by a device which “”l‘malh
`wishes to he a Slave, such as where a mobile computing device enters a piconet Umlrolleil
`by a LAN access point.
`The mechanism essentially involves the slave sending its l-‘HS packet to the Master:
`the Master takes on a CLK offset to match the Slave's (‘LKN while the Slaw SWiI‘L‘hes to
`using its own C'LKN. and each device swaps access codes. The new Master also “ends '1"
`LMP message. which contains the lower part of the Bluetooth (‘LK "m contained in the
`l-‘HS together with the sub-slot offset information in its to allow the new Slave ti, l'ulh
`synchronise its timing.
`
`5.7.1 Messaging
`
`Figure 5—l3 shows the sequence ol messages exchanged when a Slave becomes a Master
`by initiating a Master I Slave switch. The Master side can also request the role switch.
`In version LOB of the Bluetooth core specification, there is a contradiction in the
`description of this process In the hasehand and link manager sections. The Sl:l\e most
`give the Master detailed information on its Clock, so that the Master can “love hum 1|“-
`Slave's timing. An LMP_slot_uff:-'et message is used by the Slave to pass this information
`to the Master. The version LOB LMP section specifies that a Slave requesting a Master
`Slave switch will send the message before requesting the switch: the version LOB base
`hand section specifies that the message will be sent later. after both sides have agreed to
`perform the Master/Slave swttch.
`The hasehand also implies that a Master which is becoming a Slave could hand m er
`its old Slaves to the new Master: hmvever. LMl’ does not provide any messages to tell the
`new Master the active member addresses of the old Slaves. or to p35,. on information
`about Slaves in Hold. Park or Snitl' modes. For the new Master to attempt to acquire the
`Slaves of the old Master. it would have to try polling all seven active member addresses
`using the old Master's timings. and see if any respond. However. if they do respond. there
`is no mechanism defined to move them straight onto the new Master‘s tinting and he
`quency hop sequence. The only way it could he done would be via two Manor/Slaw
`switches. So the new Master would heconte a Slave again. then switch roles to acquire th;
`"Id Master ‘5 SIM” “5 it“ Slave.
`[I ““111" PTUhably he simpler to let supervision timeout-
`elapse. then inquire and page to connect with the old Master‘s- Slaves.
`
`Qualcomm Incorporated
`Exhibit 1017
`
`Page 1 of 4
`
`Qualcomm Incorporated
`Exhibit 1017
`Page 1 of 4
`
`

`

`
`
`Master / Slave Role Switching
`
`85
`
`Baseband paging and page
`scanning procedures are used to
`set up an ACL link
`
`The Slave sends information on its
`clock to the Master
`
`The Slave asks the Master to
`switch roles
`
`
`
` Set Up ACL Link
`
`
`
`
`LMP slothoffset
`
`
`
`
`
`
`
` I
`LMP_ switchqreq
`
`
`
`
`LMP ‘ accept
`
`
`It the Master agrees. it responds
`
`
`with an acceptance message
`
`
`
`
`
`Devices swap TDD roles; fOrmer Slave now transmits in even slots
`
`Former Slave sends an FHS packet
`to give timing information and new
`active member address to former
`Master
`
`l
`
`
`
`
`Devices swap to frequency hop sequence of new Master
`
`test new link; new Stave responds
`
`New Master Sends POLL packet to
`
`Figure 5'13 MCwflgL‘ \qutdnCt.’ L‘ilttl‘l l‘tir Muster] Slave switch.
`
`In practice. the acquisition of Slut-es from a] Muster is unlikely to he a problem. tlh
`the main use for u Muster/Slave switch is to allow a device 10J0il] it piconet quickly by
`paging. then hand control of piconet hack to the former Master ol the piconet.
`
`5.7.2 Uniting Seatternets with Role Switch
`
`The devices linking it scatternet are present on more than one picunct and have ‘0 time
`share. spending a few $1015 on one picnnet and u few slots on the other. litich device has
`its own independent clock. and when devices join a piconcl. they ll‘ilt‘k the timing 0f the
`picunet's Master by keeping track of the offset between their clock and the Master's
`clock. Thig means that when devices are present on more than one piconct. they will have
`to track two sets of timings. When switching between timings. there will be some slots
`which cannot be used tt‘nr it fuller description of HL‘IIllcmt‘l timings 11nd hm” “3 ”Willi-’9
`them. refer to Chapter 19)-
`Sometimes.
`it
`is dcsimhig [U have a device join a pieonet as it Master 115 shtmri in
`Figure 544‘ (30,15de :1 LAN Access Point (LAP). It does not know which devices in the
`urett wish to connect. and it would he wasteful of its resources to constantly poil devices
`
`Page 2 of 4
`
`Page 2 of 4
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`

`

`86
`
`The Link Controller
`
`Step 1
`Piconet with Master and several Slaves.
`
`The scatternet is united into a piconet.
`
`Step 2
`The piconet's Master page scans.
`allowmg a new device to connect as its Master.
`
`The piconet's Master is now also a Stave;
`a Scatternet has been established
`
`Step 3
`Master Slave switch on the new link.
`
`Figure 5‘14 Forming 11 scutlernct and uniting it into n picnnet.
`
`to try to cnnneet to them. Instead. it periodically page scans. and any devices wishing [0
`enmteet page it_ This means that connecting devices become Masters M a small Picnnt’!
`containing just themselves and the LAN access point.
`[1' the situation were left like this. the LAN access point would lose control. It must
`N ”W MW“ 0' its link“ 50 ”“4“ '1 can control the allocation of bandwidth to the devices
`connected to it. Sn. the LAN access point requests a Master I Slave switch as it accepts
`the ennncctinn. The new joiner accepts the switch. and the LAN “can“ point is restored to
`working in at picnnct rather than u scatternel. as shown in Figure ‘Ll4
`
`5.8 LOW‘POWER OPERATION
`
`.
`'I
`.
`.
`DUMB Standby, Part-t. HUM. SHifl- Ur :‘Ven between an active transmit or receive opfii’a-
`tton‘. u device may enter low-power operation, Where any protocol nr bit processing ele-
`ntcnts thardw-are 0" Sl‘flw'dl'C) may h" turned Off. All svstem elneks may he disabled. and
`
`‘When another device's packet header trunsmlssinn has been received. indicating :1 multi-slut packet hut “villi «\
`diilerent AM address. and tints is nut directed at the present device
`
`Page 3 of 4
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`Page 3 of 4
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`

`

`Baseband / Link Controller Architectural Overview
`
`37
`
`the device may enter a very low power consumption mode of operation. Certain static
`data must he maintained. such as LC protocol state and buffer contents. and the only dy-
`namic information which must be maintained is the native clock counter. CLKN. To cott-
`
`serve power. this may be clocked with a much lower power. and therefore less accurate
`.iE-KHI. oscillator (+10 : 3.2 kH-zl. The tolerance specified in the standard on the Low-
`
`Power Oscillator tLPOt is .t 250 ppm.
`An accuracy of 250 ppm gives rise to a worst case slippage of l slot every 2.5s.
`This is why regular resynchronisation is important and is explained further in the later
`section on low-power operation. By way of illustration. the maximum duration for which
`a device is allowed to remain inactive in Sniff or Hold mode. or betvteen synchronising
`beacon instants in Park mode. is. 40.9s. This equates to 65-140 slots. which requires an an
`certainty window of 1 17 slots.
`[t
`is worth noting that .‘nlkHr. crystals are not at present commonplace. unlike the
`32.768kH7 crystals commonly used in wristwatches and the like. The tolerance of a
`quart? crystal does not allow “pulling" over such a large distance. and so we must wait for
`the commercial success of Bluetooth to create a large demand tor SlkHI parts to force the
`price of such components down.
`
`5.9 BASEBANDI LINK CONTROLLER ARCHITECTURAL C’VERVIEW
`
`in this short section. we will tie together the material in both the previous chapter and this
`chapter to examine the overall architecture of a typical Link Controller I Baseband
`system.
`Figure 5—15 shows a possible hasehand/Link Controller system. The data path is ei-
`ther 5C0 (via a direct PCM interface. through HCI) processed by the audio CODEC sub—
`system. or ACL via H("l. The data is buffered. so it may he read out at system speed
`subsequently following reception. or stored awaiting transmission. Typically. double
`buffering is used to ease the scheduling of these operations. Indeed. double buffering on
`transmit
`is almost essential
`for a Inulti-link device where retransmissions must he
`anticipated.
`The data path has already been discussed: it encodes or decodes data bursts during
`Ts or Rs. respectively. The Rs eorrelator effectively “sniffs” the received data. and when
`enabled. will search for the required access code. The sync word generator supplies a
`valid sync word derived from lite appropriate LAP to the radio interface and the eorrelator
`as appropriate. The limchase produces a native clock: CLKN from the appropriate s). stem
`reference Clock. which must therefore be accurate to 1 20 ppm. An offset control function
`then maintains and applies the necessary offsets to produce CLKN. ('LK. and (“LKli as
`required.
`
`The hop selection function combines the required (‘LK and BI) address parts to
`Pritduce the channel number and feeds these to the radio interface. Finally. the. encryption
`key generator produces and stores keys which are then loaded up by the key stream getter-
`atot~ and processed at symbol rate to produce a cipher stream for use by the hitstrcam
`data path.
`
`Page 4 of 4
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`Page 4 of 4
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`