(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2002/0000576A1
`(43) Pub. Date:
`Jan. 3, 2002
`Inukai
`
`US 20020000576A1
`
`(54) DISPLAY DEVICE
`(76) Inventor: Kazutaka Inukai, Kanagawa (JP)
`Correspondence Address:
`JOHN F. HAYDEN
`Fish & Richardson P.C.
`601 Thirteenth Street, NW
`Washington, DC 20005 (US)
`(21) Appl. No.:
`09/886,148
`(22) Filed:
`Jun. 22, 2001
`(30)
`Foreign Application Priority Data
`
`Jun. 22, 2000 (JP)...................................... 2000-188518
`
`
`
`Publication Classification
`
`... H01L 27/10
`(51) Int. CI.7.
`(52) U.S. Cl. .............................................................. 257/202
`
`(57)
`
`ABSTRACT
`
`An active matrix display device capable of Vivid color
`display having many tones is provided. The display device
`is characterized in that each of a plurality of pixels com
`prises a first TFT for Switching, a second TFT for Switching,
`a TFT for erasing, a TFT for EL driving, and an EL element,
`driving of the TFT for EL driving is controlled by the first
`TFT for Switching, the second TFT for Switching, and the
`TFT for erasing, and light emission by the EL element is
`controlled by the TFT for EL driving.
`
`G-CLK, G-SP
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 1 of 28
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`US 2002/0000576A1
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`G-CLK, G-SP
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`Fig. 1
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 2 of 28
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`US 2002/0000576A1
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 3 of 28
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`US 2002/0000576A1
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 4 of 28
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`US 2002/0000576A1
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 5 of 28
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`US 2002/0000576A1
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`Patent Application Publication
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`Patent Application Publication
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`Jan. 3, 2002
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 9 of 28
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 10 of 28 US 2002/0000576A1
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`Patent Application Publication
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`US 2002/0000576A1
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`Patent Application Publication
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`Jan. 3, 2002 Sheet 15 of 28 US 2002/0000576A1
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 18 of 28
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`Patent Application Publication
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`Jan. 3, 2002 Sheet 19 of 28 US 2002/0000576A1
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`Fig. 19A
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`
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`Fig. 19B
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`linear region
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`Vas-VTH | < VDs) ( Vos | < | VGS-VTH )
`IMAX ------------------------------------------------- ---------------------------------------
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`voltage-current characteristics
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`voltage current characteristics
`of TFT for EL driving
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`opposing electrode 111
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`voltage of source region 360
`of TFT 108 for EL driving
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`Patent Application Publication
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`Jan. 3, 2002 Sheet 20 of 28 US 2002/0000576A1
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`electric current
`IMAX
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`Fig. 20
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 21 of 28 US 2002/0000576A1
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`operating region of
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`Patent Application Publication
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`Jan. 3, 2002 Sheet 22 of 28
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`US 2002/0000576A1
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`
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`Fig. 22
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`Patent Application Publication
`Fig. 23A
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`Jan. 3, 2002. Sheet 23 of 28 US 2002/0000576A1
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 24 of 28 US 2002/0000576A1
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 25 of 28 US 2002/0000576A1
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`Patent Application Publication
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`Jan. 3, 2002 Sheet 26 of 28 US 2002/0000576A1
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`Fig. 26
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`Patent Application Publication
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`Patent Application Publication
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`Jan. 3, 2002. Sheet 28 of 28 US 2002/0000576A1
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`drain current (LogiDs)
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`Fig. 28B
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`gate voltage(VGs)
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`US 2002/0000576A1
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`Jan. 3, 2002
`
`DISPLAY DEVICE
`
`BACKGROUND OF THE INVENTION
`0001) 1. Field of the Invention
`0002 The present invention relates to an electronic dis
`play formed by forming EL (electroluminescence) elements
`on a Substrate. In particular, the present invention relates to
`an EL display using Semiconductor elements (elements
`using a semiconductor thin film). Further, the present inven
`tion relates to a display device with an EL display used in its
`display portion.
`0003 2. Description of the Related Art
`0004 Recently, technology for forming TFTs on a sub
`Strate has greatly progressed, and its application to an active
`matrix electronic display is actively developed. In particular,
`TFTS using a polysilicon film have higher field effect mobil
`ity (also referred to as mobility) than that of conventional
`TFTS using an amorphous Silicon film, and thus, they are
`capable of high-speed operation, which makes it possible to
`control pixels with a driver circuit formed on the substrate
`having the pixels formed thereon, while, conventionally,
`Such control of pixels is performed by a driver circuit
`provided outside the Substrate.
`0005 Since various kinds of circuits and elements are
`formed on one Substrate in Such an active matrix electronic
`display, there are various advantages Such as reduction in the
`manufacturing cost, miniaturization of the electronic dis
`play, improvement in yield, and improvement in throughput.
`0006. In addition, active matrix EL displays having EL
`elements as light emitting elements are actively researched.
`EL displays are also referred to as organic EL displayS
`(OELDs) or organic light emitting diodes (OLEDs).
`0007 Different from a liquid crystal display, an EL
`display is of a light emitting type. An EL element is
`Structured Such that a layer containing an organic compound
`which causes luminescence by applying an electric field
`thereto (hereinafter referred to as an EL layer) is sandwiched
`between a pair of electrodes (an anode and a cathode).
`Normally, the EL layer has a laminated Structure. A typical
`laminated Structure is “a positive hole transport layer/a light
`emission layer/an electron transport layer” proposed by
`Tang et al. of Eastman Kodak Company. This structure has
`a very highlight emission efficiency, and thus, is adopted by
`almost all EL displays under research and development at
`present.
`0008. The structure may also be such that “a positive hole
`injection layer/a positive hole transport layer/a light emis
`Sion layer/an electron transport layer” or “a positive hole
`injection layer/a positive hole transport layer/a light emis
`Sion layer/an electron transport layer/an electron injection
`layer” are laminated in this order on an anode. Further, a
`fluorescent pigment or the like may be doped into the light
`emission layer.
`0009. In the present specification, all layers provided
`between a cathode and an anode are collectively referred to
`as an EL layer. Therefore, all of the above-mentioned
`positive hole injection layer, positive hole transport layer,
`light emission layer, electron transport layer, and electron
`injection layer are included in the EL layer.
`
`0010 When the pair of electrodes apply predetermined
`Voltage to the EL layer Structured as in the above, carriers
`recombine in the light emission layer to emit light. That an
`EL element emits light is herein referred to as “the EL
`element is driven'. It is also to be noted that a light emitting
`element formed of an anode, an EL layer, and a cathode is
`herein referred to as an EL element.
`0011 Light emitted by an EL layer can be broken down
`into light emitted when a particle returns from a singlet
`excited State to a ground State (fluorescence) and light
`emitted when a particle returns from a triplet eXcited State to
`a ground State (phosphorescence). In the present invention,
`either one of the above two kinds of light emission may be
`used, or alternatively, both of them may be used.
`0012 Methods of driving an EL display include an ana
`log driving method (analog driving). An analog-driven EL
`display is described with reference to FIGS. 26 and 27.
`0013 FIG. 26 illustrates a structure of a pixel portion
`1800 of an analog-driven EL display. Gate signal lines
`G1-Gy to which a gate Signal from a gate Signal line driver
`circuit is inputted are connected to gate electrodes of TFTS
`1801 for Switching of the respective pixels. One of a source
`region and a drain region of each of the TFTs 1801 for
`Switching of each pixel is connected to a Source Signal line
`(also referred to as a data Signal line) S1, ..., SX to which
`an analog video signal is inputted, while the other is con
`nected to a gate electrode of a TFT 1804 for EL driving of
`each pixel and to a capacitor 1808 of each pixel.
`0014) A source region of the TFT 1804 for EL driving of
`each pixel is connected to a power Supply line V1, ..., VX,
`while a drain region of the TFT 1804 for EL driving is
`connected to an EL element 1806. Electric potential of the
`power Supply lines V1 to VX is referred to as power Source
`potential. Further, the power supply lines V1 to VX are
`connected to capacitors 1808 of the respective pixels.
`0015 The EL element 1806 has an anode, a cathode, and
`an EL layer provided between the anode and the cathode. In
`case the anode of the EL element 1806 is connected to the
`drain region of the TFT 1804 for EL driving, the anode of the
`EL element 1806 is a pixel electrode while its cathode is an
`opposing electrode. Conversely, in the case where the cath
`ode of the EL element 1806 is connected to the drain region
`of the TFT 1804 for EL driving, the anode of the EL element
`1806 is an opposing electrode while its cathode is a pixel
`electrode.
`0016. It is to be noted that the electric potential of an
`opposing electrode is herein referred to as opposing poten
`tial, and a power Source which applies the opposing potential
`to an opposing electrode is herein referred to as an opposing
`power source. The difference between the potential of a
`pixel electrode and the potential of an opposing electrode is
`Voltage for EL driving, which is applied to the EL layer.
`0017 FIG. 27 illustrates a timing chart in the case where
`the EL display illustrated in FIG. 26 is driven in an analog
`method. A period from the time when one gate Signal line is
`Selected to the time when the next gate Signal line is Selected
`is referred to as one line period (L). A period from the time
`when one image is displayed to the time when the next
`image is displayed is one frame period (F). With regard to
`the EL display illustrated in FIG. 26, since the number of the
`gate signal lines is y, y line periods (L1 to Ly) are provided
`in one frame period.
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`0.018. In the present specification, that a gate signal line
`is Selected means that all the thin film transistors whose gate
`electrodes are connected to the gate Signal line are in the ON
`State.
`0.019 AS the resolution becomes higher, the number of
`line periods in one frame period increases, and accordingly,
`a driver circuit has to be driven at a higher frequency.
`0020 First, the power Supply lines V1 to Vx are held at
`a certain power Source potential. The opposing potential
`which is the potential of the opposing electrodes is also held
`at a certain potential, which has different power Source
`potential Such that the EL elements emit light.
`0021. In a first line period (L1), the gate signal line G1 is
`Selected according to a gate Signal inputted from a gate
`Signal line driver circuit to the gate Signal line G1.
`0022. Then, an analog video signal is sequentially input
`ted to the source signal lines S1 to SX. Since all the TFTs
`1801 for Switching connected to the gate signal line G1 are
`in the ON State, the analog video signal inputted to the
`Source signal lines S1 to SX is inputted through the TFTs
`1801 for switching to the gate electrodes of the TFTs 1804
`for EL driving.
`0023 The amount of electric current through channel
`forming regions of the TFTs 1804 for EL driving is con
`trolled by the magnitude of the potential (voltage) of the
`signal inputted to the gate electrodes of the TFTs 1804 for
`EL driving. Therefore, the potential applied to the pixel
`electrodes of the EL elements 1806 is determined by the
`magnitude of the potential of the analog video Signal input
`ted to the gate electrodes of the TFTs 1804 for EL driving.
`The EL elements 1806 emit light under control of the
`potential of the analog video signal.
`0024. The above-described operation is repeated. When
`the analog video signal has been inputted to all the Source
`signal lines S1 to SX, the first line period (L1) ends. It is to
`be noted that the period inputting of the analog video signal
`to the Source Signal lines S1 to SX and a horizontal retrace
`line period may be one line period.
`0025 Then, in a second line period (L2), the gate signal
`line G2 is Selected by the gate Signal. AS in the case of the
`first line period (L1), an analog video signal is sequentially
`inputted to the Source Signal lines S1 to SX.
`0026. When the gate signal is inputted to all the gate
`signal lines G1 to Gy, all the line periods L1 to Ly end. When
`all the line periods L1 to Ly end, one frame period ends.
`During one frame period, all the pixels carry out display to
`form one image. It is to be noted that all the line periods L1
`to Ly plus a vertical retrace line period may be one frame
`period.
`0027. As described above, the amount of light emitted by
`the EL elements 1806 is controlled according to the analog
`Video signal. By controlling the amount of the emitted light,
`gradation display is carried out. This method is the So-called
`analog driving method, where gradation display is carried
`out by changing the potential of the analog video signal
`inputted to the Source Signal lines.
`0028. The control of the amount of current supplied to the
`EL elements by the gate voltage of the TFTs for EL driving
`
`in the above-described analog driving method will be
`described in detail with reference to FIG. 28.
`0029 FIG. 28A is a graph illustrating the transistor
`characteristics of the TFT for EL driving. Reference numeral
`2801 is referred to as Is-Vs characteristics (or an Is-Vs
`curve), wherein IDs is drain current and Vos is Voltage
`between the gate electrode and the Source region (gate
`voltage). By using this graph, the amount of current with
`regard to arbitrary gate Voltage can be known.
`0030. When gradation display is carried out in the analog
`driving method, a region indicated by a dotted line 2802 of
`the above-mentioned Is-Vs characteristics is used to drive
`the EL element. FIG. 28B is an enlarged view of the region
`surrounded by the dotted line 2802.
`0031. In FIG. 28B, a region illustrated by diagonal lines
`is referred to as a Saturated region. More specifically, in the
`region, the gate Voltage Satisfies Vos-VrkVDs, wherein
`VT is threshold Voltage. In this region, the drain current
`changes exponentially as the gate Voltage changes. This
`region is used to perform current control by the gate Voltage.
`0032. When a TFT for Switching is turned on, an analog
`Video signal inputted to a pixel is gate Voltage of a TFT for
`EL driving. Here, according to the IDs-Voss characteristics
`illustrated in FIG. 28A, drain current with regard to certain
`gate Voltage is decided in a ratio of one to one. More
`Specifically, correspondingly to the Voltage of the analog
`video signal inputted to the gate electrode of the TFT for EL
`driving, the potential of the drain region is decided. Prede
`termined drain current passes through the EL element, and
`the EL element emits light in an amount which corresponds
`to the amount of current.
`0033 AS described above, the amount of light emitted
`from the EL element is controlled by the Video Signal, and,
`by controlling the amount of light emission, gradation
`display is carried out.
`0034. However, the above-described analog driving
`method has a defect in that it is easily affected by variation
`in the characteristics of the TFTs. Even in the case where
`equal gate Voltage is applied to the TFTS for EL driving of
`the respective pixels, if there is variation in the Is-Vs
`characteristics of the TFTs for EL driving, the same drain
`current can not be outputted. Further, as is clear from FIG.
`28A, Since the Saturated region where the drain current
`changes exponentially as the gate Voltage changes is used, a
`Slight Shift in the Is-Vs characteristics can result in
`considerable variation in the amount of outputted current
`even if equal gate Voltage is applied. In this case, Slight
`variation in the Is-Vs characteristics results in consider
`able difference in the amount of light emitted from the EL
`elements between adjacent pixels even if a signal of equal
`Voltage is inputted thereto.
`0035) In this way, analog driving is quite sensitive to
`variation in the characteristics of the TFTs for EL driving,
`which is an obstacle to gradation display by a conventional
`active matrix EL display.
`
`SUMMARY OF THE INVENTION
`0036) The present invention is made in view of the above
`problem, and an object of the present invention is to provide
`an active matrix EL display capable of Vivid color display
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`US 2002/0000576A1
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`Jan. 3, 2002
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`having many tones. Another object of the present invention
`is to provide a high-performance display device (electronic
`apparatus) provided with Such an active matrix EL display
`as a display.
`0037. The inventor of the present invention thought that
`the problem with regard to the analog driving is attributable
`to gradation display performed by using the Saturated
`region, which is easily affected by variation in the Is-Vs
`characteristics Since the drain current changes exponentially
`as the gate Voltage changes.
`0.038 More specifically, in the case where there is varia
`tion in the IDs-Voss characteristics, Since, in the Saturated
`region, the drain current changes exponentially as the gate
`voltage changes, different current (drain current) is output
`ted even when equal gate Voltage is applied. As a result,
`there is a problem that desired gradation can not be attained.
`0.039
`Accordingly, the inventor of the present invention
`proposes a method where control of the amount of light
`emitted from EL elements is carried out not through control
`of current using the Saturated region but mainly through
`control of time during which the EL elements emit light.
`According to the present invention, the amount of light
`emitted from the EL elements is controlled by time to carry
`out gradation display. Such a driving method where grada
`tion display is carried out by controlling the light emission
`time of EL elements is referred to as a time-division driving
`method (hereinafter referred to as digital driving). It is to be
`noted that gradation display carried out by Such a time
`division driving method is referred to as time-division
`gradation display.
`0040. By the above-mentioned structure, according to the
`present invention, even if there is variation in the Is-Vs
`characteristics to Some extent, a situation can be avoided that
`there is considerable difference in the amount of light
`emitted from the EL elements between adjacent pixels even
`if a signal of equal Voltage is inputted thereto.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`0041
`FIG. 1 is a block diagram illustrating a circuit
`Structure of an EL display according to the present invention.
`0.042
`FIG. 2 is a circuit diagram of a pixel portion of the
`EL display according to the present invention.
`0.043
`FIG. 3 is a circuit diagram of a pixel of the EL
`display according to the present invention.
`0044 FIG. 4 illustrates a driving method of the EL
`display according to the present invention.
`004.5
`FIG. 5 is timing charts of a selection signal in a
`driving method according to the present invention.
`0046 FIG. 6 illustrates a driving method of an EL
`display according to the present invention.
`0047 FIG. 7 illustrates a driving method of an EL
`display according to the present invention.
`0048 FIG. 8 illustrates a driving method of an EL
`display according to the present invention.
`0049 FIG. 9 is a plan view of pixels of an EL display
`according to the present invention.
`
`0050 FIG. 10 is a block diagram illustrating the structure
`of a driver circuit of the EL display according to the present
`invention.
`0051
`FIG. 11 illustrates a manufacturing process of the
`EL display according to the present invention.
`0052 FIG. 12 illustrates the manufacturing process of
`the EL display according to the present invention.
`0053 FIG. 13 illustrates the manufacturing process of
`the EL display according to the present invention.
`0054 FIG. 14 is a detailed sectional view of an EL
`display according to the present invention.
`0055 FIG. 15 is a plan view and a sectional view of an
`EL display according to the present invention.
`0056 FIG. 16 is a circuit diagram of a source signal line
`driver circuit of the EL display according to the present
`invention.
`0057 FIG. 17 is a plan view of a latch of the source
`Signal line driver circuit of the EL display according to the
`present invention.
`0058 FIG. 18 is a circuit diagram of a gate signal line
`driver circuit of the EL display according to the present
`invention.
`0059 FIG. 19 illustrates a structure of a connection
`between an EL element and a TFT for EL driving, and
`Voltage-current characteristics of the EL element and of the
`TFT for EL driving.
`0060 FIG. 20 illustrates voltage-current characteristics
`of an EL element and of a TFT for EL driving.
`0061
`FIG. 21 illustrates relationship between gate volt
`age and drain current of a TFT for EL driving.
`0062 FIG. 22 is a block diagram of a display according
`to the present invention.
`0063 FIG. 23 is a plan view of a display with a driver
`circuit as a display according to the present invention.
`0064 FIG. 24 illustrates electronic apparatus using the
`EL display according to the present invention.
`0065 FIG. 25 illustrates electronic apparatus using the
`EL display according to the present invention.
`0066 FIG. 26 is a circuit diagram of a pixel portion of a
`conventional EL display.
`0067 FIG. 27 is a timing chart illustrating a driving
`method of the conventional EL display.
`0068)
`FIG. 28 illustrates Is-Vs characteristics of a
`TFT.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`0069. A structure and a driving method of an EL display
`according to the preset invention are described in the fol
`lowing. Here, a case where 2" tones are displayed according
`to an n-bit digital Video signal is described.
`0070 FIG. 1 illustrates an exemplary block diagram of
`an EL display according to the present invention. The EL
`display illustrated in FIG. 1 has a pixel portion 101 formed
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`US 2002/0000576A1
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`Jan. 3, 2002
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`of TFTs formed on a substrate, a source signal line driver
`circuit 102 disposed on the periphery of the pixel portion
`101, and a gate signal line driver circuit 103. It is to be noted
`that, though the EL display of the present embodiment has
`one Source Signal line driver circuit and one gate Signal line
`driver circuit, the present invention is not limited thereto,
`and there may be two or more Source Signal line driver
`circuits and two or more gate Signal line driver circuits.
`0071. A clock signal for sources (S-CLK) and a start
`pulse signal for the Sources (S-SP) are inputted to the Source
`signal line driver circuit 102. The source signal line driver
`circuit 102 is driven by the clock signal for the sources
`(S-CLK) and the start pulse signal for the sources (S-SP).
`0072 A clock signal for gates (G-CLK) and a start pulse
`Signal for the gates (G-SP) are inputted to the gate signal line
`driver circuit 103. The gate signal line driver circuit 103 is
`driven by the clock signal for the gates (G-CLK) and the
`Start pulse signal for the gates (G-SP).
`0073. In the present invention, the source signal line
`driver circuit 102 and the gate signal line driver circuit 103
`may be provided on the Substrate having the pixel portion
`101 provided thereon, or alternatively, may be provided on
`an IC chip and connected through an FPC or a TAB to the
`pixel portion 101.
`0074 FIG.2 is an enlarged view of the pixel portion 101.
`Source signal lines S1 to SX, power supply lines V1 to Vx,
`and gate signal lines G0, G1 to Gy, and G(y--1) are provided
`in the pixel portion 101.
`0075) A pixel 104 is a region having one of the source
`signal lines S1 to SX, one of the power supply lines V1 to Vx,
`and one of the gate signal lines G1 to Gy. A plurality of
`pixels 104 are arranged like a matrix in the pixel portion 101.
`0.076
`It is to be noted that, though no pixel is formed
`between the gate signal lines G0 and G1 in FIG. 2, the
`present invention is not limited thereto, and dummy pixels
`may be formed between the gate signal lines G0 and G1.
`0077 FIG. 3 is a circuit diagram of the pixel 104.
`Reference numerals 105,106, 107,108,109, and 110 denote
`a first TFT for Switching, a second TFT for Switching, a TFT
`for erasing, a TFT for EL driving, a capacitor, and an EL
`element, respectively. A pixel (j, i) illustrated in FIG. 3 has
`a Source signal line S (j is an arbitrary number from 1 to X),
`a power Supply line V, and a gate signal line Gi (i is an
`arbitrary number from 1 to y).
`0078 Agate electrode of the first TFT 105 for switching
`is connected to the gate Signal line Gi. Agate electrode of the
`second TFT 106 for Switching is connected to a gate signal
`line G(i+1) of a pixel (j, i+1) located next to the pixel (j, i).
`It is to be noted that, though the present embodiment has the
`above-described Structure, it may be that the gate electrode
`of the second TFT 106 for Switching is connected to the gate
`signal line G1 and the gate electrode of the first TFT 105 for
`Switching is connected to the gate signal line G(i+1) of the
`pixel (j, i+1) located next to the pixel (j, i).
`0079 A source region or drain region of the first TFT 105
`for Switching and a Source region or drain region of the
`second TFT 106 for Switching are connected in series. The
`Source region or drain region of the second TFT 106 for
`Switching not connected to the Source region or drain region
`of the first TFT 105 for Switching is connected to the source
`
`Signal line S. Further, the Source region or drain region of
`the first TFT 105 for Switching not connected to the source
`region or drain region of the second TFT 106 for Switching
`is connected to a gate electrode of the TFT 108 for EL
`driving.
`0080) A gate electrode of the TFT 107 for erasing is
`connected to a gate signal line G (i-1) of a pixel (j, i-1)
`located next to the pixel (j, i) illustrated in FIG. 3. One of
`a source region or a drain region of the TFT 107 for erasing
`is connected to the power Supply line V, and the other is
`connected to the gate electrode of the TFT 108 for EL
`driving.
`0081. The capacitor 109 is provided so as to be connected
`to the gate electrode of the TFT 108 for EL driving and to
`the power supply line V. The capacitor 109 is provided for
`the purpose of retaining the gate voltage of the TFT 108 for
`EL driving when the TFT 107 for Switching is in a nonse
`lected state (an OFF state). It is to be noted that, though the
`capacitor 109 is provided in the structure of the present
`embodiment, the present invention is not limited thereto, and
`the capacitor 109 may not be provided.
`0082) A source region of the TFT 108 for EL driving is
`connected to the power Supply line V, while a drain region
`of the TFT 108 for EL driving is connected to the EL element
`110.
`0083. It is to be noted that a power supply line may be
`commonly used by two pixels adjacent to each other in one
`line. In other words, it may be structured Such that the Source
`regions of the TFTs for EL driving of the two pixels are
`connected to one common power Supply line.
`0084. The EL element 110 is formed of an anode, a
`cathode, and an EL layer provided between the anode and
`the cathode. In case the anode is connected to the drain
`region of the TFT 108 for EL driving, the anode is a pixel
`electrode while the cathode is an opposing electrode. Con
`versely, in case the cathode is connected to the drain region
`of the TFT 108 for EL driving, the cathode is a pixel
`electrode and the anode is an opposing electrode.
`0085. The opposing electrode of the EL element 110 is
`connected to an opposing power Source (not shown) pro
`vided outside the substrate having the pixel portion 101
`formed thereon, and the opposing potential which is con
`Stant is always applied to the opposing electrode of the EL
`element 110. The power supply lines V1 to Vx are connected
`to a power Source (not shown) provided outside the Substrate
`having the pixel portion 101 formed thereon, and the power
`Source potential which is constant is always applied to the
`power supply lines V1 to VX. The difference between the
`opposing potential and the power Source potential is always
`held such that the EL element 110 emits light when the
`power Source potential is applied to the pixel electrode.
`0086. With regard to a typical present EL display, in the
`case where the amount of light emission per area of the pixel
`portion is 200 cd/m, necessary current per area of the pixel
`portion is several mA/cm°. Therefore, as the size of the pixel
`porti