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`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`____________
`
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________
`
`
`SAMSUNG DISPLAY CO., LTD.,
`Petitioner
`
`v.
`
`SOLAS OLED, LTD.,
`Patent Owner
`____________
`
`Case IPR2020-00320
`Patent No. 7.446,338
`____________
`
`
`
`DECLARATION OF RICHARD A. FLASCK.,
`IN SUPPORT OF PATENT OWNER’S RESPONSE
`
`
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`IPR2020-00320
`Ex. 2005
`Page 1 of 62
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`
`TABLE OF CONTENTS
`
`
`I.
`
`Introduction ................................................................................................... 1
`A.
`Engagement ......................................................................................... 1
`B.
`Background and Qualifications ........................................................... 1
`II. Materials Considered ..................................................................................... 4
`III. Relevant Legal Standards .............................................................................. 6
`A.
`Burden of Proof ................................................................................... 6
`B.
`Claim Construction ............................................................................. 6
`C.
`Obviousness ........................................................................................ 7
`IV. Person of Ordinary Skill in The Art .............................................................. 8
`V.
`The ’338 Patent (Ex. 1001) ......................................................................... 10
`A.
`Summary of ’338 Patent ................................................................... 10
`B.
`Elements of ’338 Patent .................................................................... 13
`1. Multi-transistor OLED Circuit ....................................................................... 13
`2. Low Resistance Electrodes ............................................................................ 14
`3. Color Display ................................................................................................. 15
`’338 Patent Claims ............................................................................ 15
`C.
`’338 Patent Prosecution History ....................................................... 18
`D.
`VI. Claim Construction ...................................................................................... 20
`VII. Summary of Grounds .................................................................................. 21
`VIII. Ground I: Obviousness Over Kobayashi and Shirasaki .............................. 23
`A. Overview of Kobayashi (Ex. 1003) .................................................. 23
`B.
`Overview of Shirasaki (Ex. 1004) ..................................................... 24
`C.
`Failure to Show Why One Skilled in the Art Would Be
`Motivated to Combine Kobayashi with Shirasaski as Proposed
`by Petitioner ...................................................................................... 26
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`1. Kobayashi and Shirasaki are directed to different problems, and a POSITA
`with Kobayashi would not be motivated to look to Shirasaki as Petitioner
`proposes ......................................................................................................... 26
`2. Petitioner’s arguments that Kobayashi and Shirasaki both disclose OLEDs or
`TFTs are insufficient to show motivation to combine .................................. 28
`3. Petitioner’s other arguments fail and mischaracterize what Shirasaki actually
`teaches or suggests. ....................................................................................... 29
`Failure to Show How One Skilled in the Art Would Have
`Combined Kobayashi with Shirasaski as Proposed by Petitioner
`or that One Skilled in the Art Would Have a Reasonable
`Expectation of Success ...................................................................... 31
`Failure to Show that the Combination of Kobayashi in View of
`Shirasaski Satisfies Limitation 1[b]: “a plurality of
`interconnections which are formed to project from a surface of
`the transistor array substrate, and which are arrayed in parallel
`to each other” .................................................................................... 35
`Failure to Show that the Combination of Kobayashi in View of
`Shirasaski Satisfies Limitation 1[c]: “a plurality of pixel
`electrodes for the plurality of pixels, respectively, the pixel
`electrodes being arrayed along the interconnections between the
`interconnections on the surface of the transistor array substrate” .... 39
`IX. Ground II: Obviousness Over Childs and Shirasaki ................................... 42
`A. Overview of Childs (Ex. 1005) ......................................................... 42
`Failure to Show Why One Skilled in the Art Would Be
`B.
`Motivated to Combine Childs with Shirasaski as Proposed by
`Petitioner ........................................................................................... 43
`1. Childs and Shirasaki are directed to different problems, and a POSITA with
`Childs would not be motivated to look to Shirasaki as Petitioner proposes . 44
`2. Petitioner’s arguments that Childs and Shirasaki are similar are insufficient to
`show motivation to combine ......................................................................... 45
`3. Petitioner’s other arguments fail and mischaracterize what Shirasaki actually
`teaches or suggests. ....................................................................................... 46
`Failure to Show How One Skilled in the Art Would Have
`Combined Kobayashi with Shirasaski as Proposed by Petitioner
`or that One Skilled in the Art Would Have a Reasonable
`Expectation of Success ...................................................................... 48
`
`D.
`
`E.
`
`F.
`
`C.
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`FLASCK POR DECLARATION
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`
`D.
`
`Failure to Show that the Combination of Kobayashi in View of
`Shirasaski Satisfies Limitation 1[c]: “a plurality of pixel
`electrodes for the plurality of pixels, respectively, the pixel
`electrodes being arrayed along the interconnections between the
`interconnections on the surface of the transistor array substrate” .... 51
`Conclusion ................................................................................................... 57
`
`
`X.
`
`
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`
`PATENT OWNER’S EXHIBIT LIST
`
`Ex. Description
`2001 United States Patent Application Publication 2004/0256617 A1
`2002 Defendants’ Responsive Claim Construction Brief
`2003 Defendants’ Claim Construction Presentation
`2004 Solas’s Notice of Agreement on Previously Disputed Claim Construction
`Terms
`2005 Declaration of Richard A. Flasck
`2006 Curriculum Vitae of Richard A. Flasck
`2007 Transcript of Deposition of Dr. Adam Fontecchio on September 11, 2020
`2008 The New Oxford American Dictionary (2d ed. 2005)
`
`
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`I, Richard A. Flasck, a resident of San Ramon, California, declare as follows:
`
`
`
`I.
`
`Introduction
`A. Engagement
`1.
`I have been retained by Patent Owner Solas OLED Ltd. (“Solas” or
`
`“Patent Owner”) through RAF Electronics Corp. to provide my opinions with
`
`respect to their Response to the Petition for Inter Partes Review in IPR2020-00320
`
`(“Petition” or “Pet.”) as to U.S. Patent No. 7,446,338 (“’338 patent,” Exhibit 1001).
`
`I have no interest in the outcome of this proceeding and my compensation is in no
`
`way contingent on my providing any particular opinions.
`
`2.
`
`As a part of this engagement, I have also been asked to provide my
`
`technical review, analysis, insights, and opinions regarding the Petition and the
`
`supporting declaration of Dr. Fontecchio (“Fontecchio Declaration” or “Fontecchio
`
`Decl.” Ex. 1018) with respect to the challenged claims of the ’338 patent.
`
`3.
`
`The statements made herein are based on my own knowledge and
`
`opinions.
`
`B.
`Background and Qualifications
`4. My qualifications for forming the opinions set forth in this Declaration
`
`are summarized here and explained in more detail in my curriculum vitae, which is
`
`attached as Exhibit 2006.
`
`
`
`1
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`I received a Bachelor of Science degree in Physics from the University
`
`
`
`5.
`
`of Michigan, Ann Arbor, in 1970. I thereafter received a Master of Science degree
`
`in Physics from Oakland University in Rochester, Michigan, in 1976. I am the
`
`founder and CEO of RAF Electronics Corp., where I developed and patented Liquid
`
`Crystal on Silicon (LCOS) microdisplay projection technology using active matrix
`
`transistor arrays as well as developed proprietary LED-based Solid State Lighting
`
`(SSL) products.
`
`6.
`
`After receiving my bachelor’s degree, I was employed as a scientist and
`
`a manager by Energy Conversion Devices, Inc., from 1970 through 1982. My work
`
`at Energy Conversion Devices concerned the development of electroluminescent
`
`displays, thin film photovoltaics, ablative imaging films, non-volatile memory,
`
`multi-chip modules, and superconducting materials. After
`
`leaving Energy
`
`Conversion Devices, I founded and served as CEO of Alphasil, Inc., where I
`
`developed amorphous silicon thin film transistor (TFT) active matrix liquid crystal
`
`displays (AMLCDs). My work at Alphasil included thin film transistor array
`
`substrate process and circuit design, data driver and gate driver design, scalers, video
`
`circuits, gamma correction circuits, backlighting, and inverter design. At Alphasil I
`
`also designed and incorporated touch panel screens into active matrix display
`
`devices. The touch panel technologies included surface acoustic wave and capacitive
`
`sensing. I worked at Alphasil from 1982 through 1989.
`
`
`
`2
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`After leaving Alphasil, I founded RAF Electronics Corp., described
`
`
`
`7.
`
`above. I have served as CEO of RAF Electronics since that time. At RAF I developed
`
`HDTV projection technology including transistor array substrates for LCOS devices
`
`and the associated optical systems. My activities at RAF have included
`
`developments in lighting systems using both traditional LED and OLED (Organic
`
`Light Emitting Diode) technologies. In 2016 I was granted US Patent 9,328,898
`
`which includes OLED and LED technology and lighting systems. In 2019 RAF
`
`received a CalSEED grant from the California Energy Commission to develop ultra-
`
`efficient lighting products and explore establishing a Central Valley manufacturing
`
`facility.
`
`8.
`
`In 1997, I took the position of President and COO at Alien Technology
`
`Corporation, where I was responsible for completing a Defense Advanced Research
`
`Projects Agency (DARPA) contract, and for implementing MEM fluidic self-
`
`assembly (FSA) technology. I left that position in 1999.
`
`9.
`
`In 2002, I co-founded and served as COO of Diablo Optics, Inc., where
`
`I developed, produced, and commercialized key optical components for HDTV
`
`projectors, such as polarization optics, condenser lenses, projection lenses, and ultra-
`
`high performance optical interference filters using thin film stacks in conjunction
`
`with LED and thin film transistor arrays and devices. I left Diablo in 2007.
`
`
`
`3
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`I am listed as an inventor on twenty-six patents issued in the United
`
`
`
`10.
`
`States and foreign countries, including one United States design patent. My
`
`inventions concern technologies including LED devices, semiconductor materials,
`
`glass materials, non-volatile memory cells, thin film transistors, flat panel
`
`backplanes and displays, and wafer based active matrices, and various transistor
`
`array substrates.
`
`11.
`
`I have authored or co-authored twenty-five articles or conference
`
`presentations, including numerous papers and presentations concerning lighting and
`
`display technologies. My curriculum vitae (Exhibit A) lists these articles, conference
`
`presentations, and patents.
`
`12.
`
`I am also a member of several professional organizations, including the
`
`OSA, SPIE, AES, SID, and the IEEE.
`
`13.
`
`In summary, I have almost 50 years of experience in the field of high
`
`tech product development including flat panel displays, transistor array substrates,
`
`touch panels, and OLED and LED devices.
`
`II. Materials Considered
`14.
`I have been asked to provide a technical review, analysis, insights, and
`
`opinions. My technical review, analysis, insights, and opinions are based on my
`
`education, research, and experience, as well as my study of relevant materials.
`
`
`
`4
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`I have reviewed the ’338 patent claims, specification, and prosecution
`
`
`
`15.
`
`history. My understanding of the claims is based on the plain and ordinary meaning
`
`of the claims as would be understood by a person of ordinary skill in the art, unless
`
`the inventor has provided a special meaning for a term. Unless otherwise noted, my
`
`opinions set forth herein do not rest on a disagreement with Dr. Fontecchio as to the
`
`meaning of any claim term or limitation.
`
`16.
`
`I have reviewed the Petition for Inter Partes Review and the Board’s
`
`Decision to Institute in this proceeding.
`
`17.
`
`I have reviewed the declaration of Dr. Adam Fontecchio. I have also
`
`reviewed the Kobayashi, Shirasaki, and Childs references submitted by Petitioner in
`
`this proceeding, as well as other references Petitioner and Dr. Hatalis rely upon. I
`
`have also reviewed the exhibits submitted by Petitioner, as well as the exhibits and
`
`documents cited in this declaration. I have reviewed Dr. Fontecchio’s deposition
`
`transcript in this proceeding (“Fontecchio Deposition” or “Fontecchio Dep.,” Ex.
`
`2007).
`
`18.
`
`I have also reviewed certain materials from the district court litigation
`
`involving the ’338 patent: Solas OLED Ltd., v. Samsung Display Co., Ltd., Samsung
`
`Electronics Co., Ltd., and Samsung Electronics America, Inc., Civil Action No.
`
`2:19-cv-00152-JRG (E.D. Tex.). They are the district court’s Claim Construction
`
`Memorandum and Order (Dkt. 99) dated April 17, 2020 (Ex. 1020) and the non-
`
`
`
`5
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`IPR2020-00320 (’338 Patent)
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`confidential portions of the Rebuttal Expert Report of Thomas L. Credelle Regarding
`
`
`
`
`
`Validity dated June 22, 2020 that relate to validity of the ’338 patent. The opinions
`
`in this declaration are my own opinions and based on my review of the relevant
`
`materials identified above and throughout this declaration.
`
`19. This declaration represents only opinions I have formed to date. I may
`
`consider additional documents as they become available or other documents that are
`
`necessary to form my opinions. I reserve the right to revise, supplement, or amend
`
`my opinions based on new information and on my continuing analysis.
`
`III. Relevant Legal Standards
`20.
`I am not an attorney. I offer no opinions on the law. But counsel has
`
`informed me of the following legal standards relevant to my analysis here. I have
`
`applied these standards in arriving at my conclusions.
`
`A. Burden of Proof
`21.
`I understand that in an inter partes review the petitioner has the burden
`
`of proving a proposition of unpatentability by a preponderance of the evidence.
`
`B. Claim Construction
`22.
`I understand that the Board will apply the “plain and ordinary meaning”
`
`standard to claim construction in this proceeding. I understand that the plain and
`
`ordinary meaning of a claim term is the meaning that the term would have to a person
`
`
`
`6
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`of ordinary skill in the art in question at the time of the invention when read in view
`
`
`
`
`
`of the patent claims and the specification.
`
`23.
`
`I understand that the Board does not construe claim terms unnecessary
`
`to resolving the controversy.
`
`C. Obviousness
`24.
`I understand that a claim of a patent may not be novel even though the
`
`invention is not identically disclosed or described in the prior art so long as the
`
`differences between the subject matter sought to be patented and the prior art are
`
`such that the subject matter as a whole would have been obvious to a person having
`
`ordinary skill in the art in the relevant subject matter at the time the invention was
`
`made.
`
`25.
`
`I understand that, to demonstrate obviousness, it is not sufficient for a
`
`petition to merely show that all of the elements of the claims at issue are found in
`
`separate prior art references or even scattered across different embodiments and
`
`teachings of a single reference. The petition must thus go further, to explain how a
`
`person of ordinary skill would combine specific prior art references or teachings,
`
`which combinations of elements in specific references would yield a predictable
`
`result, and how any specific combination would operate or read on the claims.
`
`Similarly, it is not sufficient to allege that the prior art could be combined, but rather,
`
`
`
`7
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`the petition must show why and how a person of ordinary skill would have combined
`
`
`
`
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`them.
`
`26.
`
`I understand that, to demonstrate obviousness, a petition must
`
`accurately identify and analyze the differences between the claimed invention and
`
`the prior art.
`
`27.
`
`I understand that obviousness cannot be shown by conclusory
`
`statements, and that the petition must provide articulated reasoning with some
`
`rational underpinning to support its conclusion of obviousness.
`
`IV. Person of Ordinary Skill in The Art
`28.
`I understand there are multiple factors relevant to determining the level
`
`of ordinary skill in the pertinent art, including (1) the levels of education and
`
`experience of persons working in the field at the time of the invention; (2) the
`
`sophistication of the technology; (3) the types of problems encountered in the field;
`
`and (4) the prior art solutions to those problems.
`
`29.
`
`I am familiar with OLEDs (including those with thin-film transistors
`
`(“TFTs”)) and how they are manufactured. I am also aware of the state of the art at
`
`the time the application resulting in the ‘338 patent was filed. I have been informed
`
`by Solas’s counsel that the earliest priority date for the ‘338 patent is September 29,
`
`2004. Based on the technology disclosed in the ‘338 patents, I believe that a person
`
`of ordinary skill in the art (“POSITA”) would include someone who, at the time of
`
`
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`the invention, had, (i) a Bachelor’s degree in Electrical Engineering and/or Materials
`
`
`
`
`
`Science and Engineering, Physics, or equivalent training, and (ii) approximately two
`
`years of experience working in design and development related to active matrix-
`
`OLED displays. Lack of work experience could have been remedied by additional
`
`education, and vice versa. Such academic and industry experience would be
`
`necessary to appreciate what was obvious and/or anticipated in the industry and what
`
`a POSITA would have thought and understood at the time. Based on these criteria,
`
`as of the relevant time frame for the ’338 patent, I possessed at least such experience
`
`and knowledge of a POSITA, hence am qualified to opine on the patent.
`
`30.
`
`I note that Dr. Fontecchio’s opines that a POSITA at the time of the
`
`invention of the ’338 patent (no later than September 29, 2004) “would have had a
`
`relevant technical degree in Electrical Engineering, Computer Engineering, Physics,
`
`or the like, and 2 to 3 years’ experience in active matrix display design and
`
`electroluminescence.” Fontecchio Decl. ¶ 74. Dr. Fontecchio’s definition differs
`
`from my own, insofar as he believes a POSITA could have had a “Computer
`
`Engineering” degree. His definition also specifies “2 to 3 years’ experience in active
`
`matrix display design and electroluminescence.” My definition of ordinary skill
`
`specifies “approximately two years of experience working in design and
`
`development related to active matrix-OLED displays.” Notwithstanding these
`
`
`
`9
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`differences in the definitions of ordinary skill, my opinions would not change if I
`
`
`
`
`
`were to apply Dr. Fontecchio’s proposed level of ordinary skill in the art.
`
`31.
`
`I further note that I am at least a POSITA and that for 50 years I have
`
`worked with colleagues who are POSITAs. Thus, I am well qualified to give
`
`technical opinions from the perspective of a POSITA.
`
`32. Throughout my declaration, even if I discuss my analysis in the present
`
`tense, I am always making my determinations based on what a POSITA would have
`
`known at the time of the invention, which is no later than 2004.
`
`V. The ’338 Patent (Ex. 1001)
`A.
`Summary of ’338 Patent
`33. The ‘338 patent, titled “Display Panel,” was filed by T. Shirasaki, et al.
`
`on Sept. 26, 2005 and issued on Nov. 4, 2008. It claims a priority date of Sept. 29,
`
`2004.
`
`34. Casio, the original assignee of the ‘338 patent was a pioneer in the
`
`development of practical and high performing displays utilizing organic light
`
`emitting diodes (OLEDs). The ’338 patent concerns display panels with light-
`
`emitting elements, such as organic electroluminescent display panels. (Ex. 1001,
`
`’338 patent at 1:14–21.) A commonly used organic electroluminescent display
`
`technology is the organic light emitting diode, or OLED. OLED display panels are
`
`
`
`10
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`currently used in high-end mobile phones, watches, televisions, and other products
`
`
`
`
`
`from several manufacturers.
`
`35. Displays used in phones, watches, televisions, etc. contain a two-
`
`dimensional array of picture elements, commonly called pixels, that are made up of
`
`red, green, and blue “subpixels.” By controlling the light emission of the subpixels,
`
`a desired image can be displayed. An example of this layout of sub-pixels is shown
`
`in the below annotated depiction of Figure 1 of the patent:
`
`
`
`36. As the ’338 patent explains, the highest quality OLED displays are
`
`“active matrix.” (Ex. 1001, ’338 patent at 1:19–21.) This means that each sub-pixel
`
`in the display has active elements and capacitors associated with it, which are
`
`responsible for sending the correct amount of current through the electroluminescent
`
`
`
`11
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`element and thus controlling the brightness of the subpixel. The ’338 patent shows
`
`
`
`
`
`an example sub-pixel circuit in Figure 2:
`
`
`
`37.
`
`In this example circuit, the light-emitting element is shown as the
`
`diodes 20. The TFT 23 in this example is called the “driving transistor”, the TFT21
`
`is the “switch transistor”, and TFT22 is the “hold transistor”. The driving method
`
`has a “selection period” and an “emission period.” During the selection period, the
`
`switch and hold transistors are turned on and current flows through the drive
`
`transistor (and not the diode) to set a voltage on the storage capacitor 24 that will
`
`determine the amount of current flowing to the diode during the “emission period”.
`
`During the emission period, a “driving current” flows through the driving transistor
`
`
`
`12
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`and is supplied to the light emitting diode. (Ex. 1001, ’338 patent at 14:51–16:13.)
`
`
`
`
`
`After a “frame” of data is displayed (a frame time is typically 1/60 sec and represents
`
`one image of a video signal), the sub-pixels are selected row by row to be written
`
`with new information.
`
`38. This flow of current during the selection period, which is “pulled
`
`through (out)” of the driver transistor, causes a corresponding charge to form
`
`between the electrodes of the capacitor 24. When the switch and holding transistors
`
`are turned off, a current flows through light emitting diode that depends on the
`
`charge on the capacitor, and in this example equals the write current. (Ex. 1001,’338
`
`patent at 15:54–16:13.) A POSITA in 2004 would understand that the direction of
`
`current flow is somewhat arbitrary and depends on the circuit design, e.g. channel
`
`type for transistors and orientation of the light emitting diode relative to the driving
`
`transistor.
`
`39. The patent specification describes a structure that implements a circuit
`
`of this type as a series of thin-film layers in the display panel, and the patent claims
`
`aspects of this structure.
`
`B.
`
`Elements of ’338 Patent
`1. Multi-transistor OLED Circuit
`40. The basic pixel circuit for active matrix OLED displays uses two
`
`transistors and one capacitor to drive each pixel; it is often referred to as “2T-1C”.
`
`
`
`13
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`Additionally, there are scan and data lines as well as a power supply line. In order to
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`compensate for variations in TFT characteristics, the ‘338 patent discloses a third
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`transistor (holding transistor) added to the circuit. In the disclosed operation, the
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`writing step allows current to flow through the driving transistor and switch
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`transistor (and to a lesser extent through the holding transistor) to charge the storage
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`capacitor, thus compensating for variations in TFT characteristics. The write current
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`that flows through the driving transistor and to the driving circuit can be called a
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`“pull out” current since that current flows out of the pixel circuit through the data
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`line to the off-matrix driver during the write period.
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`2.
`Low Resistance Electrodes
`41. Another inventive element of the ‘338 patent is lower-resistance
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`conductors for various interconnection lines for the active matrix OLED display to
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`suppress voltage drop. By decreasing the resistance of various interconnection lines,
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`performance will
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`improve. (Ex 1001 at 2:34-3:67.) The
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`lower-resistance
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`interconnections may “project from a surface of the transistor array substrate” i.e.
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`they may “extend beyond an outer surface of the layered structure upon which or
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`within which a transistor array is fabricated.” Ex. 1020 (Markman Order) at 15, 18.
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`Pixel electrodes are formed between the interconnection lines on the surface of the
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`transistor array substrate.
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`3.
`Color Display
`42. The inventive design of the ‘338 patent discloses a color active matrix
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`OLED display with red, green, and blue subpixels.
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`C.
`’338 Patent Claims
`43. This IPR challenges claims 1–3 and 5–13 of the ’338 patent.
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`Independent claim 1 recites:
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`A display panel comprising:
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`[a] a transistor array substrate which includes a plurality of pixels and
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`comprises a plurality of transistors for each pixel, each of the transistors
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`including a gate, a gate insulating film, a source, and a drain;
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`[b] a plurality of interconnections which are formed to project from a surface
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`of the transistor array substrate, and which are arrayed in parallel to each
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`other;
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`[c] a plurality of pixel electrodes for the plurality of pixels, respectively, the
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`pixel electrodes being arrayed along the interconnections between the
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`interconnections on the surface of the transistor array substrate;
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`[d] a plurality of light-emitting layers formed on the pixel electrodes,
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`respectively; and
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`[e] a counter electrode which is stacked on the light-emitting layers, wherein
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`said plurality of transistors for each pixel include a driving transistor, one of
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`the source and the drain of which is connected to the pixel electrode, a switch
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`transistor which makes a write current flow between the drain and the source
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`of the driving transistor, and a holding transistor which holds a voltage
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`between the gate and source of the driving transistor in a light emission period.
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`44. Dependent claim 2 depends from claim 1. Claim 2 recites: “A panel
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`according to claim 1, wherein said plurality of interconnections include at least one
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`of a feed interconnection connected to the other of the source and the drain of at least
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`one of the driving transistors, a select interconnection which selects at least one of
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`the switch transistors, and a common interconnection connected to the counter
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`electrode.”
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`45. Dependent claim 3 depends from claim 2. Claim 2 recites: “A panel
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`according to claim 2, wherein each of the light-emitting layers is formed between
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`two of the feed interconnection, the select interconnection, and the common
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`interconnection.”
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`46. Dependent claim 5 depends from claim 1. Claim 5 recites: “A panel
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`according to claim 1, wherein said plurality of pixels include a red pixel, a green
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`pixel, and a blue pixel.”
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`47. Dependent claim 6 depends from claim 5. Claim 6 recites: “A panel
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`according to claim 5, wherein said plurality of pixels comprises a plurality of sets
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`each including the red pixel, the green pixel, and the blue pixel arrayed in an arbitrary
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`order.”
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`48. Dependent claim 7 depends from claim 1. Claim 7 recites: “A panel
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`according to claim 1, wherein at least one of the interconnections has a thickness of
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`1.31 to 6.00 μm.”
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`49. Dependent claim 8 is a multiple dependent claim which depends in the
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`alternative from any of claims 1 or 2 to 7. Claim 8 recites: “A panel according to any
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`one of claims 1 or 2 to 7, wherein at least one of the interconnections has a width of
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`7.45 to 44.00 μm.”
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`50. Dependent claim 9 depends from claim 1. Claim 9 recites: “A panel
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`according to claim 1, wherein at least one of the interconnections has a resistivity of
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`2.1 to 9.6 μΩcm.”
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`51. Dependent claim 10 depends from claim 1. Claim 10 recites: “A panel
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`according to claim 1, wherein said plurality of interconnections are formed from a
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`conductive layer that is different from a layer forming the source and the drain of
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`each of the transistors and a layer forming the gate of the transistors.”
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`52. Dependent claim 11 depends from claim 1. Claim 11 recites: “A panel
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`according to claim 1, wherein said plurality of interconnections are formed from a
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`conductive layer different from a layer forming the pixel electrodes.”
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`IPR2020-00320 (’338 Patent)
`FLASCK POR DECLARATION
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`53. Dependent claim 12 depends from claim 1. Claim 12 recites: “A panel
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`according to claim 1, wherein said plurality of interconnections are thicker than a
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`layer forming the source and the drain of each of the transistors and a layer forming
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`the gate of each of the transistors.”
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`54. Dependent claim 13 depends from claim 1. Claim 13 recites: “A panel
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`according to claim 1, wherein said plurality of interconnections are thicker than the
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`pixel electrodes.”
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`D.
`55.
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`’338 Patent Prosecution History
`I have reviewed the prosecution history of the ’338 patent. (Ex. 1002.)
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`The application that led to the ’338 patent, Application No. 11/235,579 (“’579
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`application”) was filed on September 26, 2005. The ’579 application claimed
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`priority to a Japanese patent application filed on September 29, 2004.
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`56. On July 27, 2006, the applicant submitted an Information Disclosure
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`Statement (IDS) disclosing, among other references, WO 2005/019314 (“Yamada
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`I”) and its U.S. national counterpart U.S. 2004/0256617 (“Yamada II”), after
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`Yamada I was cited in the International Search Report for the international
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`application counterpart to the ’338 patent. (E