Paper No. 8
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SAMSUNG DISPLAY CO., LTD.,
`Petitioner,
`
`v.
`
`SOLAS OLED LTD.,
`Patent Owner.
`____________
`
`Case No. IPR2020-00320
`U.S. Patent No. 7,446,338
`____________
`
`
`PATENT OWNER’S RESPONSE TO
`SUPPLEMENTAL PRE-INSTITUTION BRIEF
`
`
`
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`
`
`
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`SAMSUNG DISPLAY CO., LTD.,
`Petitioner,
`
`v.
`
`SOLAS OLED LTD.,
`Patent Owner.
`____________
`
`Case No. IPR2020-00320
`U.S. Patent No. 7,446,338
`____________
`
`
`PATENT OWNER’S RESPONSE TO
`SUPPLEMENTAL PRE-INSTITUTION BRIEF
`
`
`
`
`
`
`
`Case No. IPR2020-00320
`U.S. Patent No. 7,446,338
`
`Pursuant to the Board’s authorization of April 27, 2020, Patent Owner
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`submits this response to Petitioner’s Supplemental Pre-Institution Brief Ad-
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`dressing District Court Claim Construction Order (Paper 7). For the reasons
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`set forth in this responsive brief and in Patent Owner’s Preliminary Response
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`(Paper 6), institution of this IPR should be denied.
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`A. The Petition Fails to Establish Obviousness under the Court’s
`Construction of “Write Current” or under Any Other
`Construction of That Term
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`In its Supplemental Brief, Petitioner relies solely on the Shirasaki prior
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`art reference to allegedly satisfy the “write current” limitation. Paper 7 at 1–
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`5. But as explained in the Patent Owner’s Preliminary Response, the petition
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`does not point to Shirasaki as containing a “write current” at all. Rather, the
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`petition points to Kobayashi and Childs as purportedly satisfying the “switch-
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`ing transistor which makes a write current flow between the drain and the
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`source of the driving transistor” limitation and thus as satisfying the “write
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`current” element. Paper 1 at 50, 77. The petition points to Shirasaki as satis-
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`fying a different limitation, the “holding transistor which holds a voltage be-
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`tween the gate and source of the driving transistor in a light emission period.”
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`Paper 1 at 51–52, 78.
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`2
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`Case No. IPR2020-00320
`U.S. Patent No. 7,446,338
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`The Patent Owner’s Preliminary Response explained how Kobayashi
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`and Childs do not satisfy the “write current” limitation under the arguments
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`that Petitioner advanced concerning “voltage control” during claim construc-
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`tion in the district court. Paper 6 at 7, 8, 16–18, 25–26. These arguments were
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`directed to a Kobayashi and Childs “write current” theory that Petitioner no
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`longer appears to be advancing and to a term that the district court had not yet
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`construed. To be clear, the claims of the ’338 patent do not exclude “voltage
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`control,” so long as a “write current” is present. But any “write current” that
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`may or may not be present in Kobayashi or Childs is irrelevant to the question
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`of obviousness, as the Supplemental Brief makes clear that Petitioner’s obvi-
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`ousness combination replaces the pixel circuit of Kobayashi or Childs with
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`that of Shirasaki, meaning that any “write current” present in those two refer-
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`ences is not present in the proposed combinations with Shirasaki.
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`To remedy the petition’s failure to identify any “write current” present in
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`the obviousness combinations, the Supplemental Brief attempts to show that
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`there is a “write current” in Shirasahi. But notably, the Supplemental Brief
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`does not point to any place in the petition that identifies any current in Shira-
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`saki as a “write current.” Indeed, the only portion of the petition that mentions
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`any “current” in Shirasaki is a verbatim quote from Shirasaki, which mentions
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`3
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`Case No. IPR2020-00320
`U.S. Patent No. 7,446,338
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`four different types of current in Shirasaki: a “store[d]” current, a “memory
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`current,” a “display current,” and the current in a “voltage-current character-
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`istic.” Paper 1 at 54–55. The petition does not identify any one of these four
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`currents as a “write current,” let alone explain how it satisfies the limitation.
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`The Supplemental Brief argues for the first time that it is the “memory
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`current α” in Shirasaki that is a “write current.” But tellingly, the original pe-
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`tition never mentioned the “α” current or annotated a figure from Shirasaki to
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`describe it. This is a new argument, not present in the petition. The petition is
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`required to identify “with particularity . . . the evidence that supports the
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`grounds for the challenge to each claim” and to “specify where each element
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`of the claim is found in the prior art.” 35 U.S.C. § 312(a)(3); 37 C.F.R.
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`§ 42.104(b)(5). Adhering to this requirement in petitions is “of the utmost im-
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`portance.” Intelligent Bio-Sys., Inc. v. Illumina Cambridge Ltd., 821 F.3d 1359,
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`1369 (Fed. Cir. 2016). These late arguments should be disregarded, and the
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`petition should be denied for failure to identify a “write current” in the pro-
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`posed combinations.
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`Petitioner seems to argue the late disclosure of this theory can be justified
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`by the district court’s recent construction of the term “write current” as “pull-
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`out current.” Paper 7 at 3. But as Petitioner concedes, it was Petitioner that
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`Case No. IPR2020-00320
`U.S. Patent No. 7,446,338
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`proposed that the term be construed (Solas argued no construction was re-
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`quired) and proposed the construction “pull-out current.” Paper 7 at 3; Ex.
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`1020 at 18, 23. Even if Petitioner had not contemplated construing the term
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`when the IPR petition was filed, the fact that the district court adopted a con-
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`struction proposed by Petitioner cannot justify introducing new obviousness
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`arguments in a Supplemental Brief.
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`B.
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`Even If the Board Were to Adopt the District Court’s
`Construction of “Transistor Array Substrate,” Institution
`Should Be Denied
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`The Patent Owner’s Preliminary Response explains how the combination
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`of Childs with Shirasaki fails to satisfy the construction of “transistor array
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`substrate” advanced by Petitioner in district court. Paper 6 at 27–28. The
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`Board should find that Petitioner has failed to establish a reasonable likelihood
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`of prevailing on the Childs–Shirasaki combination for that reason.
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`However, even if the Board were to adopt the construction for “transistor
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`array substrate” that the district court ultimately adopted, institution should be
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`denied because the petition fails to show that either the Kobayashi–Shirasaki
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`combination or the Childs–Shirasaki combination satisfies the “write current”
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`limitation, for the reasons explained above, or the other limitations discussed
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`in the Patent Owner’s Preliminary Response.
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`5
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`Case No. IPR2020-00320
`U.S. Patent No. 7,446,338
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`Dated: May 11, 2020
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`
`
` /Neil A. Rubin/
`Neil A. Rubin (Reg. No. 67,030)
`RUSS AUGUST & KABAT
`12424 Wilshire Boulevard, 12th Floor
`Los Angeles, CA 90025
`Telephone: 310-826-7474
`
`Attorney for Patent Owner,
`SOLAS OLED LTD.
`
`6
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`
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`Case No. IPR2020-00320
`U.S. Patent No. 7,446,338
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`CERTIFICATE OF SERVICE
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`I hereby certify that “Patent Owner’s Response to Supplemental Pre-Institu-
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`tion Brief” (Paper No. 8) was served on May 11, 2020 by email sent to:
`
`David A. Garr
`Grant D. Johnson
`COVINGTON & BURLING LLP
`One CityCenter
`850 Tenth Street, NW
`Washington, DC 20001
`Telephone: 202-662-6000
`Email: dgarr@cov.com
`Email: gjohnson@cov.com
`
`Peter P. Chen
`COVINGTON & BURLING LLP
`3000 El Camino Real
`5 Palo Alto Square, 10th Floor
`Palo Alto, CA 94306
`Telephone: 650-632-4700
`Email: pchen@cov.com
`
`Email: Samsung-Solas@cov.com
`
`
` /Neil A. Rubin/
`Neil A. Rubin (Reg. No. 67,030)
`
`
`7
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