`
`IN THE UNITED STATES DISTRICT COURT
`FOR THE EASTERN DISTRICT OF TEXAS
`MARSHALL DIVISION
`
`SOLAS OLED LTD.,
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`Plaintiff,
`
`v.
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`SAMSUNG DISPLAY CO., LTD., et al.,
`
`Defendants.
`
`§
`§
`§
`§
`§
`§
`§
`§
`§
`
`CIVIL ACTION NO. 2:19-CV-00152-JRG
`
`CLAIM CONSTRUCTION
`MEMORANDUM AND ORDER
`
`Before the Court is the Opening Claim Construction Brief (Dkt. No. 74) filed by Plaintiff
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`Solas OLED Ltd. (“Plaintiff” or “Solas”). Also before the Court are the Responsive Claim
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`Construction Brief (Dkt. No. 80) filed by Defendants Samsung Display Co., Ltd., Samsung
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`Electronics Co., Ltd., and Samsung Electronics America, Inc. (“Defendants” or “Samsung”) as
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`well as Plaintiff’s reply (Dkt. No. 82).
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`The Court held a hearing on April 7, 2020.
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`Table of Contents
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`I. BACKGROUND ....................................................................................................................... 2
`II. LEGAL PRINCIPLES ........................................................................................................... 3
`III. AGREED TERMS................................................................................................................. 6
`IV. DISPUTED TERMS .............................................................................................................. 8
`A. “transistor array substrate” .................................................................................................... 8
`B. “project from a surface of the transistor array substrate” ................................................... 15
`C. “write current” ..................................................................................................................... 18
`D. “configured to wrap around one or more edges of a display” ............................................ 24
`V. CONCLUSION...................................................................................................................... 28
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`Case 2:19-cv-00152-JRG Document 99 Filed 04/17/20 Page 2 of 28 PageID #: 2899
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`I. BACKGROUND
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`
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`Plaintiff alleges infringement of United States Patents Nos. 6,072,450, 7,446,338 (“the
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`’338 Patent”), and 9,256,311 (“the ’311 Patent”) (collectively, “the patents-in-suit”). (Dkt. No. 74,
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`Exs. A–B). The parties present disputed terms only as to the ’338 Patent and the ’311 Patent.
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`
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`The ’338 Patent, titled “Display Panel,” issued on November 4, 2008, and bears a filing
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`date of September 26, 2005. Plaintiff submits that the ’338 Patent relates to controlling amounts
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`of electrical current flowing through individual light-emitting elements of a display. (See Dkt. No.
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`74, at 1–5.) Defendants submit that the relevant type of display is active-matrix organic
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`electroluminescent (“AMOLED”) displays. (Dkt. No. 80, at 2.) The Abstract of the ’338 Patent
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`states:
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`
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`A display panel includes a transistor array substrate which has a plurality of pixels
`and is formed by providing a plurality of transistors for each pixel, each of the
`transistor having a gate, a gate insulating film, a source, and a drain. A plurality of
`interconnections are formed to project to a surface of the transistor array substrate
`and arrayed in parallel to each other. A plurality of pixel electrodes are provided
`for each pixel and arrayed between the interconnections on the surface of the
`transistor array substrate along the interconnections. Each of a plurality of light-
`emitting layers is formed on each pixel electrode. A counter electrode is stacked
`on the light-emitting layer.
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`The ’311 Patent, titled “Flexible Touch Sensor,” issued on February 9, 2016, and bears a
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`filing date of October 28, 2011. Plaintiff submits that “[t]he ’311 patent specification describes
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`touch sensors which are flexible and curve along with the contours of the display of the end device,
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`such as a mobile phone.” (Dkt. No. 74, at 5.) The Abstract of the ’311 Patent states:
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`In one embodiment, an apparatus include a substantially flexible substrate and a
`touch sensor disposed on the substantially flexible substrate. The touch sensor
`comprising drive or sense electrodes made of flexible conductive material
`configured to bend with the substantially flexible substrate.
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`II. LEGAL PRINCIPLES
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`
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`It is understood that “[a] claim in a patent provides the metes and bounds of the right which
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`the patent confers on the patentee to exclude others from making, using or selling the protected
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`invention.” Burke, Inc. v. Bruno Indep. Living Aids, Inc., 183 F.3d 1334, 1340 (Fed. Cir. 1999).
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`Claim construction is clearly an issue of law for the court to decide. Markman v. Westview
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`Instruments, Inc., 52 F.3d 967, 970–71 (Fed. Cir. 1995) (en banc), aff’d, 517 U.S. 370 (1996).
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`
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`“In some cases, however, the district court will need to look beyond the patent’s intrinsic
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`evidence and to consult extrinsic evidence in order to understand, for example, the background
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`science or the meaning of a term in the relevant art during the relevant time period.” Teva Pharm.
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`USA, Inc. v. Sandoz, Inc., 135 S. Ct. 831, 841 (2015) (citation omitted). “In cases where those
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`subsidiary facts are in dispute, courts will need to make subsidiary factual findings about that
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`extrinsic evidence. These are the ‘evidentiary underpinnings’ of claim construction that we
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`discussed in Markman, and this subsidiary factfinding must be reviewed for clear error on appeal.”
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`Id. (citing 517 U.S. 370).
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`
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`To ascertain the meaning of claims, courts look to three primary sources: the claims, the
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`specification, and the prosecution history. Markman, 52 F.3d at 979. The specification must
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`contain a written description of the invention that enables one of ordinary skill in the art to make
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`and use the invention. Id. A patent’s claims must be read in view of the specification, of which
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`they are a part. Id. For claim construction purposes, the description may act as a sort of dictionary,
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`which explains the invention and may define terms used in the claims. Id. “One purpose for
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`examining the specification is to determine if the patentee has limited the scope of the claims.”
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`Watts v. XL Sys., Inc., 232 F.3d 877, 882 (Fed. Cir. 2000).
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`Nonetheless, it is the function of the claims, not the specification, to set forth the limits of
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`the patentee’s invention. Otherwise, there would be no need for claims. SRI Int’l v. Matsushita
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`Elec. Corp., 775 F.2d 1107, 1121 (Fed. Cir. 1985) (en banc). The patentee is free to be his own
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`lexicographer, but any special definition given to a word must be clearly set forth in the
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`specification. Intellicall, Inc. v. Phonometrics, Inc., 952 F.2d 1384, 1388 (Fed. Cir. 1992).
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`Although the specification may indicate that certain embodiments are preferred, particular
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`embodiments appearing in the specification will not be read into the claims when the claim
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`language is broader than the embodiments. Electro Med. Sys., S.A. v. Cooper Life Sciences, Inc.,
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`34 F.3d 1048, 1054 (Fed. Cir. 1994).
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`
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`This Court’s claim construction analysis is substantially guided by the Federal Circuit’s
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`decision in Phillips v. AWH Corporation, 415 F.3d 1303 (Fed. Cir. 2005) (en banc). In Phillips,
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`the court set forth several guideposts that courts should follow when construing claims. In
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`particular, the court reiterated that “the claims of a patent define the invention to which the patentee
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`is entitled the right to exclude.” Id. at 1312 (quoting Innova/Pure Water, Inc. v. Safari Water
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`Filtration Sys., Inc., 381 F.3d 1111, 1115 (Fed. Cir. 2004)). To that end, the words used in a claim
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`are generally given their ordinary and customary meaning. Id. The ordinary and customary
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`meaning of a claim term “is the meaning that the term would have to a person of ordinary skill in
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`the art in question at the time of the invention, i.e., as of the effective filing date of the patent
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`application.” Id. at 1313. This principle of patent law flows naturally from the recognition that
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`inventors are usually persons who are skilled in the field of the invention and that patents are
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`addressed to, and intended to be read by, others skilled in the particular art. Id.
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`
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`Despite the importance of claim terms, Phillips made clear that “the person of ordinary
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`skill in the art is deemed to read the claim term not only in the context of the particular claim in
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`which the disputed term appears, but in the context of the entire patent, including the
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`specification.” Id. Although the claims themselves may provide guidance as to the meaning of
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`particular terms, those terms are part of “a fully integrated written instrument.” Id. at 1315
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`(quoting Markman, 52 F.3d at 978). Thus, the Phillips court emphasized the specification as being
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`the primary basis for construing the claims. Id. at 1314–17. As the Supreme Court stated long
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`ago, “in case of doubt or ambiguity it is proper in all cases to refer back to the descriptive portions
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`of the specification to aid in solving the doubt or in ascertaining the true intent and meaning of the
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`language employed in the claims.” Bates v. Coe, 98 U.S. 31, 38 (1878). In addressing the role of
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`the specification, the Phillips court quoted with approval its earlier observations from Renishaw
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`PLC v. Marposs Societa’ per Azioni, 158 F.3d 1243, 1250 (Fed. Cir. 1998):
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`Ultimately, the interpretation to be given a term can only be determined and
`confirmed with a full understanding of what the inventors actually invented and
`intended to envelop with the claim. The construction that stays true to the claim
`language and most naturally aligns with the patent’s description of the invention
`will be, in the end, the correct construction.
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`Phillips, 415 F.3d at 1316. Consequently, Phillips emphasized the important role the specification
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`plays in the claim construction process.
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`
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`The prosecution history also continues to play an important role in claim interpretation.
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`Like the specification, the prosecution history helps to demonstrate how the inventor and the
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`United States Patent and Trademark Office (“PTO”) understood the patent. Id. at 1317. Because
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`the file history, however, “represents an ongoing negotiation between the PTO and the applicant,”
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`it may lack the clarity of the specification and thus be less useful in claim construction proceedings.
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`Id. Nevertheless, the prosecution history is intrinsic evidence that is relevant to the determination
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`of how the inventor understood the invention and whether the inventor limited the invention during
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`prosecution by narrowing the scope of the claims. Id.; see Microsoft Corp. v. Multi-Tech Sys.,
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`Inc., 357 F.3d 1340, 1350 (Fed. Cir. 2004) (noting that “a patentee’s statements during prosecution,
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`whether relied on by the examiner or not, are relevant to claim interpretation”).
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`
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`Phillips rejected any claim construction approach that sacrificed the intrinsic record in
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`favor of extrinsic evidence, such as dictionary definitions or expert testimony. The en banc court
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`condemned the suggestion made by Texas Digital Systems, Inc. v. Telegenix, Inc., 308 F.3d 1193
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`(Fed. Cir. 2002), that a court should discern the ordinary meaning of the claim terms (through
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`dictionaries or otherwise) before resorting to the specification for certain limited purposes.
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`Phillips, 415 F.3d at 1319–24. According to Phillips, reliance on dictionary definitions at the
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`expense of the specification had the effect of “focus[ing] the inquiry on the abstract meaning of
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`words rather than on the meaning of claim terms within the context of the patent.” Id. at 1321.
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`Phillips emphasized that the patent system is based on the proposition that the claims cover only
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`the invented subject matter. Id.
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`Phillips does not preclude all uses of dictionaries in claim construction proceedings.
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`Instead, the court assigned dictionaries a role subordinate to the intrinsic record. In doing so, the
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`court emphasized that claim construction issues are not resolved by any magic formula. The court
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`did not impose any particular sequence of steps for a court to follow when it considers disputed
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`claim language. Id. at 1323–25. Rather, Phillips held that a court must attach the appropriate
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`weight to the intrinsic sources offered in support of a proposed claim construction, bearing in mind
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`the general rule that the claims measure the scope of the patent grant.
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`III. AGREED TERMS
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`
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`In their January 28, 2020 Joint Claim Construction and Prehearing Statement (Dkt. No. 65,
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`at 1–2), their March 18, 2020 Joint Claim Construction Chart (Dkt. No. 83, Ex. A, at pp. 1 & 8 of
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`8), and Plaintiffs’ April 15, 2020 Notice of Agreement on Previously Disputed Claim Construction
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`Terms1 (the “Notice of Agreement”) the parties submitted the following agreements:
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`United States Patent No. 6,072,450
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`
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`Term
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`“active elements” (Claim 1)
`
`
`Agreed Construction
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`“circuit elements that have gain or that direct
`current flow, e.g., transistors”
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`“wherein said at least one first electrode is
`formed to have a substantially uneven surface
`in contact with the organic electroluminescent
`layer”
`
`
`“wherein said at least one first electrode has a
`rough surface which is in contact with the said
`organic electroluminescent layer” (Claim 3)
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`
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`
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`Term
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`“computer readable non-transitory storage
`media” (Claim 7)
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`United States Patent No. 9,256,311
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`
`Agreed Construction
`
`“a tangible computer-readable storage media
`possession structure, which (1) may be
`volatile, non-volatile, or a combination of
`volatile and non-volatile, but (2) may not be a
`propagating electrical or electromagnetic
`signal per se, including but not limited to
`semiconductor-based integrated circuits”
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`
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`1 The Notice of Agreement included two terms on which the parties now agree. One such term is
`included in Part III of this Order and the other term is included in Part IV of this Order.
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`United States Patent No. 7,446,338
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`Term
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`Agreed Construction
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`“the pixel electrodes being arrayed along the
`interconnections between the interconnections
`on the surface of the transistor array substrate”
`(Claim 1)2
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`“the pixel electrodes are arrayed along the
`interconnections and located between the
`interconnections, and the pixel electrodes are
`on the surface of the transistor array substrate”
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`A. “transistor array substrate”3
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`IV. DISPUTED TERMS
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`Plaintiff’s Proposed Construction
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`Defendants’ Proposed Construction
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`“layered structure upon which or within which
`a transistor array is fabricated”
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`“a layered structure composed of a bottom
`insulating layer through a topmost layer on
`whose upper surface pixel electrodes are
`formed, which
`contains
`an
`array of
`transistors”4
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`(Dkt. No. 65, at 2; Dkt. No. 74, at 7; Dkt. No. 80, at 4; Dkt. No. 83, Ex. A, at p. 4 of 8.) The parties
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`submit that this term appears in Claim 1 of the ’338 Patent. (Id.)
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`2 This term was included in the late-breaking Notice of Agreement. Having considered the parties’
`briefing, the arguments from the parties at the claim construction hearing, and the relevant legal
`authorities, the Court finds that the parties’ agreed construction of this term comports with Court’s
`view and does not present risk of jury confusion as discussed in footnote 3 of this Order.
`3 On April 15, 2020, Plaintiff filed the Notice of Agreement in which Plaintiff agreed to adopt
`Defendants’ proposed construction of this term. However, this late-breaking agreement comes to
`the Court after completion of the parties’ briefing, holding a claim construction hearing, and
`completing several drafts of this Order. The Court has substantive concerns about the parties’
`agreement as to this particular term. The Court concludes that the inclusion of directional terms
`such as “upper” might lead to jury confusion. The Court also concludes that the referral to pixel
`electrodes in light of other claim language already addressing pixel electrodes would likely create
`uncertainty and confusion. For these reasons and other reasons set forth herein, the Court declines
`to accept the parties’ agreement as to this term.
`4 Defendants’ response brief adds the word “pixel” to Defendants’ proposed construction.
`(Compare Dkt. No. 65, at 2 with Dkt. No. 80, at 4; see Dkt. No. 80, at 7 n.2.)
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`(1) The Parties’ Positions
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`Plaintiff argues that “Samsung’s proposal departs from the plain meaning and incorporates
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`specific features from one of the preferred embodiments disclosed in the specification.” (Dkt. No.
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`74, at 9.) Plaintiff also argues that “[t]here is no support in the specification, or elsewhere in the
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`intrinsic or extrinsic record for defining the transistor array substrate by something else—having
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`nothing directly to do with the transistor array—that is formed on top of it.” (Id., at 10.) Further,
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`Plaintiff argues that to the extent Defendants are relying on the “bottom emission type”
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`embodiment in columns 10 and 11 of the ’338 Patent, “[Defendants’] proposed construction
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`(requiring that the electrodes be formed on the ‘upper surface’ of the ‘topmost layer’) improperly
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`excludes th[e] ‘top emission type’ embodiment from the claims.” (Id., at 11 (citing ’338 Patent at
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`11:66–12:5).)
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`
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`Defendants respond that this disputed term “does not have a customary meaning in the art,”
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`“is a term specific to the ’338 patent,” and is defined by the ’338 Patent. (Dkt. No. 80, at 4.)
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`Defendants argue that the claim language and the specification demonstrate that “the transistor
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`array substrate must contain a plurality of transistors for each pixel (i.e., an array of transistors).”
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`(Id., at 4–5.) Defendants also argue that their proposed construction is consistent with the
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`alternative embodiment cited by Plaintiff. (See id., at 10.) Finally, Defendants argue that
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`Plaintiff’s proposed construction “provides no basis to determine whether particular layers of a
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`device are within or outside the ‘transistor array substrate,’ and as a result the scope of the claim
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`could not be ascertained with reasonable certainty.” (Id., at 12.)5
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`5 Defendants also submit that Plaintiff’s current proposal is contrary to Plaintiff’s past position in
`negotiations with another party (Dkt. No. 80, at 9), but the circumstances of this evidence are
`unclear. (See Dkt. No. 80, Ex. 4.) Further, even if this evidence is considered, Defendants fail to
`show that a party’s prior claim interpretation is limiting or probative as to the proper construction
`under the principles set forth in Phillips. 415 F.3d 1303.
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`Plaintiff replies that to the extent the specification sets forth a definition, the specification
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`defines the particular “transistor array substrate 50,” not “transistor array substrate” generally.
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`(Dkt. No. 82, at 1.) Alternatively, Plaintiff argues that Defendants’ proposal is inconsistent with
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`the disclosures cited by Defendants, “add[ing] words like ‘topmost’ that never appear in the
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`specification” and introducing elements, such as “electrodes,” that “are not part of element 50 and
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`are only one of several structures located directly on element 50 in the Figure 6 embodiment.”
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`(Id., at 2 (emphasis omitted).)
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`(2) Analysis
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`Claim 1 of the ’338 Patent recites (emphasis added):
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`1. A display panel comprising:
`a transistor array substrate which includes a plurality of pixels and
`comprises a plurality of transistors for each pixel, each of the transistors including
`a gate, a gate insulating film, a source, and a drain;
`a plurality of interconnections which are formed to project from a surface
`of the transistor array substrate, and which are arrayed in parallel to each other;
`a plurality of pixel electrodes for the plurality of pixels, respectively, the
`pixel electrodes being arrayed along
`the
`interconnections between
`the
`interconnections on the surface of the transistor array substrate;
`a plurality of light-emitting layers formed on the pixel electrodes,
`respectively; and
`a counter electrode which is stacked on the light-emitting layers,
`wherein said plurality of transistors for each pixel include a driving
`transistor, one of the source and the drain of which is connected to the pixel
`electrode, a switch transistor which makes a write current flow between the drain
`and the source of the driving transistor, and a holding transistor which holds a
`voltage between the gate and source of the driving transistor in a light emission
`period.
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`Plaintiff’s expert has acknowledged that the term “transistor array substrate” does not have
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`a specific, well-established meaning in the relevant art. (See Dkt. No. 80, Ex. 3, Feb. 6, 2020
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`Flasck dep., at 57:5–7 (“I’ve seen and heard in the industry people refer to transistor array
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`substrates in a variety of contexts.”), 69:3–11 & 104:4–105:3; see also id. at 69:17–19 (“Q. There
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`is no IEEE definition for ‘transistor array substrate,’ is there? A. I believe that is correct.”).)
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`The parties agree, however, that the word “substrate” has a well-established meaning in the
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`relevant art. Plaintiff cites extrinsic dictionary definitions of “substrate.” (See Dkt. No. 74, Ex. 4,
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`The Authoritative Dictionary of
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`IEEE Standards Terms 1123
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`(7th ed. 2000)
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`(SOLAS_SAMSUNG_0002233) (defining “substrate” in the context of “integrated circuit” as
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`meaning “[t]he supporting material upon or within which an integrated circuit is fabricated or to
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`which an integrated circuit is attached” or “[t]he base material upon which or in which a transistor
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`or integrated circuit is fabricated; for example, materials such as glass-ceramic or silicon oxide”);
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`see also id., Ex. 5, The New Oxford American Dictionary 1688 (2d ed. 2005) (SDC0068828)
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`(including a definition of “substrate” as meaning “a material that provides the surface on which
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`something is deposited or inscribed, for example the silicon wafer used to manufacture integrated
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`circuits”).)
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`These definitions are informative as to the meaning of “substrate.” See Phillips, 415 F.3d
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`at 1318 (“Because dictionaries, and especially technical dictionaries, endeavor to collect the
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`accepted meanings of terms used in various fields of science and technology, those resources have
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`been properly recognized as among the many tools that can assist the court in determining the
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`meaning of particular terminology to those of skill in the art of the invention.”). Construction of
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`“substrate” within the construction of the disputed term is appropriate to clarify the meaning of
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`“substrate” in this context. As set forth herein, the intrinsic evidence provides sufficient context
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`for understanding the disputed term as a whole.
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`Turning to the specification, the parties have discussed disclosure regarding a “bottom
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`emission type”:
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`The layer structure of the display panel 1 will be described with reference to FIG. 6.
`. . .
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`The display panel 1 is formed by stacking various kinds of layers on the insulating
`substrate 2 which is optically transparent.
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`* * *
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`To use the display panel 1 as a bottom emission type, i.e., to use the insulating
`substrate 2 as the display screen, transparent materials are used for the gate
`insulating film 31, protective insulating film 32, and planarization film 33. The
`layered structure from the insulating substrate 2 to the planarization film 33
`is called a transistor array substrate 50.
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`An insulating line 61 parallel to the scan line X is formed on the surface of the
`planarization film 33, i.e., on the surface of the transistor array substrate 50 between
`the red sub-pixel Pr and the green sub-pixel Pg.
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`* * *
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`The plurality of sub-pixel electrodes 20a are arrayed in a matrix on the upper
`surface of the planarization film 33, i.e., the upper surface of the transistor array
`substrate 50.
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`’338 Patent at 8:18–23, 10:42–51 & 11:50–52 (emphasis added).
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`The parties have also discussed disclosure of a “top emission type”:
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`To use the display panel 1 as a top emission type, i.e., to use the opposite side of
`the insulating substrate 2 as the display screen, a reflecting film having high
`conductivity and high visible light reflectance is preferably formed between the sub-
`pixel electrode 20a and the planarization film 33. Alternatively, the sub-pixel
`electrode 20a itself is preferably formed as a reflecting electrode.
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`Id. at 11:66–12:5 (emphasis added). If a reflecting film is thus present, then under Defendants’
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`proposed construction the reflecting film would be part of the “transistor array substrate” because
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`the reflecting film would be the layer upon which pixel electrodes are formed. Defendants’
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`proposed construction is therefore consistent with both the “bottom emission type” and the “top
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`emission type.” Plaintiff argues that the disclosure of “insulating line 61 . . . formed on the surface
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`of the planarization film 33” (’338 Patent at 10:48–49) is inconsistent with Defendants’ proposal
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`of pixel electrodes formed on an upper surface of the transistor array substrate (Dkt. No. 74, at 10),
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`but Plaintiff fails to justify precluding multiple structures from being formed on a transistor array
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`substrate.
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`
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`Figure 6 of the ’338 Patent provides context for the above-reproduced disclosures. Figure
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`6 of the ’338 Patent, annotated to draw attention to the above-cited reference numerals 2, 33, and
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`50, is reproduced here:
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`
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`The specification thus discloses an “insulating substrate 2” that is one portion of a
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`“transistor array substrate 50,” which includes other layers as well. ’338 Patent at 10:42–47
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`(reproduced above).
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`
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`Nonetheless, “patent coverage is not necessarily limited to inventions that look like the
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`ones in the figures.” MBO Labs., Inc. v. Becton, Dickinson & Co., 474 F.3d 1323, 1333 (Fed. Cir.
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`2007). Further, as Plaintiff points out, these disclosures appear in the Detailed Description of the
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`Invention section of the specification, which begins by stating that “[t]he best mode for carrying
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`out the present invention will be described below with reference to the accompanying drawings.”
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`Id. at 4:40–44.
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`Case 2:19-cv-00152-JRG Document 99 Filed 04/17/20 Page 14 of 28 PageID #: 2911
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`In some cases, disclosure of what a structure “is called” can be probative. See Sinorgchem
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`Co., Shandong v. Int’l Trade Comm’n, 511 F.3d 1132, 1136 (Fed. Cir. 2007) (“the word ‘is’ . . .
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`may ‘signify that a patentee is serving as its own lexicographer’”) (citations omitted); see also
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`Edwards Lifesciences LLC v. Cook Inc., 582 F.3d 1322, 1334 (Fed. Cir. 2009) (“the specification’s
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`use of ‘i.e.’ signals an intent to define the word to which it refers”); TriStrata, Inc. v. Microsoft
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`Corp., 594 Fed. App’x 653, 655–56 (Fed. Cir. Dec. 4, 2014) (emphasizing that the specification
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`uses the disputed term in conjunction with the phrase “is called”).
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`Here, however, the above-reproduced portion of the specification refers to what “is called
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`a transistor array substrate 50.” Id. at 10:45–47 (emphasis added). The use of a particular reference
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`numeral, “50” (id.), favors finding that this disclosure refers to a specific structure in a particular
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`disclosed embodiment rather than to the meaning of “transistor array substrate” in general.
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`As to Defendants’ proposal of “contains an array of transistors,” the above-discussed
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`evidence cited by Defendants does not compel requiring the array of transistors to be within, let
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`alone entirely within, the substrate. To the extent that this is set forth in Figure 6 or in description
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`in the specification of particular aspects of preferred embodiments, Defendants fail to justify
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`importing this limitation into the claims. See Phillips, 415 F.3d at 1323; see also MBO Labs., 474
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`F.3d at 1333 (quoted above). The opinion of Plaintiff’s expert that “[t]he transistor array substrate
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`is a structure containing a transistor array,” cited by Defendants, does not compel otherwise. (See
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`Dkt. No. 74, Ex. 1, Jan. 28, 2020 Flasck Decl., at ¶ 30.)
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`Finally, Defendants propose including limitations as to “pixel electrodes” and “transistors,”
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`but Claim 1 of the ’338 Patent (reproduced above) separately recites limitations as to “a plurality
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`of transistors for each pixel” and “a plurality of pixel electrodes for the plurality of pixels.”
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`Defendants’ proposal as to these limitations would therefore tend to confuse rather than clarify the
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`Case 2:19-cv-00152-JRG Document 99 Filed 04/17/20 Page 15 of 28 PageID #: 2912
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`scope of the claim. See Apple, Inc. v. Ameranth, Inc., 842 F.3d 1229, 1237 (Fed. Cir. 2016)
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`(“Construing a claim term to include features of that term already recited in the claims would make
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`those expressly recited features redundant.”).
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`The Court therefore hereby construes “transistor array substrate” to mean “layered
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`structure upon which or within which a transistor array is fabricated.”
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`B. “project from a surface of the transistor array substrate”
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`Plaintiff’s Proposed Construction
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`Defendants’ Proposed Construction
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`“extend from an external surface of the
`transistor array substrate”6
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`“extend above the upper surface of the
`transistor array substrate”
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`(Dkt. No. 65, at 2; Dkt. No. 74, at 13; Dkt. No. 80, at 12; Dkt. No. 83, Ex. A, at p. 4 of 8.) The
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`parties submit that this term appears in Claim 1 of the ’338 Patent. (Id.)
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`(1) The Parties’ Positions
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`Plaintiff argues that “[n]othing in the intrinsic or extrinsic evidence cited by Samsung in
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`connection with this term uses the word ‘above,’ or requires that the claimed ‘project[ing]’ occur
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`in a specific direction.” (Dkt. No. 74, at 13.) Plaintiff also argues that “[t]he claim expressly refers
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`to ‘a surface,’ suggesting there can be more than one,” and “[n]othing in the specification or
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`elsewhere in the intrinsic record limits the claimed ‘a surface’ to a specific ‘the upper surface.’”
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`(Id., at 14.)
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`
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`Defendants respond:
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`The parties’ dispute centers on whether this means that the interconnections extend
`beyond the boundary of the transistor array substrate, as Defendants propose and
`the ’338 patent describes, or whether the interconnections may be fully embedded
`within the transistor array substrate, as Solas proposes. The plain meaning of the
`claim language and the disclosures of the specification all support Defendants’
`proposal.
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`6 Plaintiff previously proposed: “extend from a surface of the transistor array substrate.” (Dkt. No.
`65, at 2; Dkt. No. 74, at 13.)
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`Case 2:19-cv-00152-JRG Document 99 Filed 04/17/20 Page 16 of 28 PageID #: 2913
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`(Dkt. No. 80, at 12.)7
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`Plaintiff replies:
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`Solas believes that it is clear that the “surface” in its construction is an external
`surface of the transistor array substrate. However, if necessary to avoid the
`confusion reflected in Samsung’s brief or in certain questions asked at the
`deposition of Solas’s expert, Solas would not object to replacing the word “sur