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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`____________
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`SAMSUNG DISPLAY CO., LTD.,
`Petitioner
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`v.
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`SOLAS OLED, LTD.,
`Patent Owner
`____________
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`Case IPR2020-00320
`Patent No. 7.446,338
`____________
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`PATENT OWNER RESPONSE
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`IPR2020-00320 (’338 Patent)
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`TABLE OF CONTENTS
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`I.
`II.
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`III.
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`B.
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`B.
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`Introduction ................................................................................................... 1
`Samsung’s Theories and Assertions Under Ground I-- Obviousness
`Over Kobayashi in View of Shirasaki—Fail as a Matter of Law ................. 3
`A. Merely Showing Supposed Interconnections Formed Anywhere
`Above a Surface of A Substrate—as Samsung Admittedly
`Did—Does Not Show “Interconnections Formed to Project
`From” That Surface ............................................................................ 3
`Samsung Also Fails to Show the Supposed Pixel Electrodes
`“Arrayed Along” Any Interconnections—and Samsung’s
`Theories Render That Separate Claim Requirement
`Meaningless ...................................................................................... 12
`Samsung’s Theories and Assertions Under Ground II-- Obviousness
`Over Childs in View of Shirasaki—Fail For Similar Reasons .................... 21
`Samsung Plainly Does Not and Cannot Show “a plurality of
`A.
`pixel electrodes “on the surface of the transistor array substrate” .... 21
`Samsung Again Also Fails to Show the Supposed Pixel
`Electrodes “Arrayed Along” Any Interconnections—and
`Petitioner’s Theories Render That Separate Claim Requirement
`Meaningless ...................................................................................... 25
`IV. Conclusion ................................................................................................... 28
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`PATENT OWNER’S EXHIBIT LIST
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`Ex. Description
`2001 United States Patent Application Publication 2004/0256617 A1
`2002 Defendants’ Responsive Claim Construction Brief
`2003 Defendants’ Claim Construction Presentation
`2004 Solas’s Notice of Agreement on Previously Disputed Claim Construction
`Terms
`2005 Declaration of Richard A. Flasck
`2006 Curriculum Vitae of Richard A. Flasck
`2007 Transcript of Deposition of Dr. Adam Fontecchio on September 11, 2020
`2008 The New Oxford American Dictionary (2d ed. 2005)
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`I.
`Introduction
`On Ground 1, Samsung’s Reply only further exposes the fact that Samsung
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`has failed to show a plurality of interconnections “formed to project from” a surface
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`of the transistor array substrate.” In its first ground, Samsung relies solely on
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`Kobayashi to satisfy this express claim requirement and all of 1[b], for that matter.
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`But even a cursory glance at Kobayashi shows that Samsung’s theories must fail.
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`That
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`is because, whatever
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`spatial
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`relationships Kobayashi’s
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`supposed
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`interconnections have with the surface of the transistor array substrate, they
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`demonstrably do not “project from” that surface. This claim requirement—"project
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`from” has a meaning -Each word must means something. The element is not “formed
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`to project upward, from a surface” or formed away from a surface” or “formed to
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`project with respect to a surface” or something as broad as (d) above…”. Instead, it
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`is formed “to project from a surface.”
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`This is where Samsung’s problems become insurmountable, because its
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`theories rest on an interpretation that is several steps broader and more dissimilar to
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`the actual claim requirement than either (a) – (c) above. As Samsung’s expert
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`admitted during deposition, to make Kobayashi satisfy the claim requirements,
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`Samsung misinterpreted the actually claimed phrase, formed to “project from a
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`surface” to merely require that the interconnections are (d) formed anywhere
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`“above” a surface:
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`That is not the only fatal problem under Ground 1. Applying the parties’
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`agreed construction, Samsung’s Reply makes at least Samsung’s failure to show the
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`(i) “arrayed along” claim requirement abundantly clear. Samsung admits that 117
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`is not coplanar with 118. Indeed, 117 and 118 do not share any overlapping layers
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`in the formation of the entire package. Reply at 20
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`Samsung’s Ground 2 fares no better. Childs does not satisfy the “Lower”
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`electrodes (green) are not “on the surface” of the transistor array substrate (orange).
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`(Id.) Instead, large portions of the pixel electrodes are buried under and in the
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`alleged substrate. (Id.) One look at the patent specification proves this beyond
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`reasonable debate. While Samsung expressly relies in Figure 2, the reference makes
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`clear that the lower electrode 21 is not on any surface of the substrate. Just the
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`opposite is true. Childs clearly explains that The “Figures 2 and 3 illustrate a LED
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`construction in which the lower electrode 21 is formed as a thin film in the circuit
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`substrate 100. Indeed, it then states that “the subsequently-deposited organic
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`semiconductor material 22 contacts this thin-film electrode layer 21 at a window 12a
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`in a planar insulating layer 12 (for example
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`And again, as with Ground 1, even if not in the same plane or layer, the
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`separate “arrayed along” requirement must imply being adjacent to one another and
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`some overlap in at least one of the interconnections. And in sharp contrast to the
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`relationship between the electrodes and interconnections in the ’338 patent claims
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`and specification, Childs simply does not meet this limitation.
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`Samsung’s IPR fails in its entirety.
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`II.
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`Samsung’s Theories and Assertions Under Ground I-- Obviousness
`Over Kobayashi in View of Shirasaki—Fail as a Matter of Law
`A. Merely Showing Supposed Interconnections Formed Anywhere Above a
`Surface of A Substrate—as Samsung Admittedly Did—Does Not Show
`“Interconnections Formed to Project From” That Surface
`Samsung’s Reply only further exposes the fact that Samsung has failed to
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`show a plurality of interconnections “formed to project from” a surface of the
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`transistor array substrate.” In its first ground, Samsung relies solely on Kobayashi to
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`satisfy this express claim requirement and all of 1[b], for that matter. But even a
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`cursory glance at Kobayashi shows that Samsung’s theories must fail. That is
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`because, whatever spatial relationships Kobayashi’s supposed interconnections have
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`with the surface of the transistor array substrate, they demonstrably do not “project
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`from” that surface. This claim requirement—"project from” has a meaning -Each
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`word must means something. The element is not “formed to project upward, from a
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`surface” or formed away from a surface” or “formed to project with respect to a
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`surface” or something as broad as (d) above…”. Instead, it is formed “to project
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`from a surface.”
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`Like all words and phrases, “formed to project from” has a meaning—and that
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`meaning has its limits. Notably, the patentee did not employ the phrases (a) “formed
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`to project upward” or (b) “formed to project above a surface;” or “formed to project
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`with respect to a surface.” None of these phrases mean the same thing as the actual
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`claim requirement, "formed to project from a surface.”
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`This is where Samsung’s problems become insurmountable, because its
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`theories rest on an interpretation that is several steps broader and more dissimilar to
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`the actual claim requirement than either (a) – (c) above. As Samsung’s expert
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`admitted during deposition, to make Kobayashi satisfy the claim requirements,
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`Samsung misinterpreted the actually claimed phrase, formed to “project from a
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`surface” to merely require that the interconnections are (d) formed anywhere
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`“above” a surface:
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`While the parties agree that being formed above a surface is necessary to being
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`formed to project from that surface, it is not sufficient to project from that surface.
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`Stated differently, an interconnection that projects from a surface must be formed
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`above that surface, but not all interconnections formed above a surface will also
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`project from it.
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`Thus, the claim term “from” introduces an obvious additional spatial
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`requirement beyond just being located above a surface. Specifically, the surface
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`must also be a “starting point” from which the interconnection projects. See, e.g.,
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`https://www.merriam-webster.com/dictionary/from (“a function word to indicate a
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`starting point of a physical movement or a starting point in measuring or reckoning
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`or
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`in
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`a
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`statement
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`of
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`limits”);
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`https://dictionary.cambridge.org/us/dictionary/english/from (“used to show the
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`place where someone or something starts) (emphasis added).
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`But Samsung’s theory entirely ignores out the notion of projecting from a
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`starting point in space—in this case, the surface of the transistor array substrate. That
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`fails as a matter of law, because “[e]ach element contained in a patent claim is
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`deemed material to defining the scope of the patented invention.” Warner-Jenkinson
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`Co., Inc. v. Hilton Davis Chem. Co., 520 U.S. 17, 29, 117 S.Ct. 1040, 137 L.Ed.2d
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`146 (1997).
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`A look at Samsung’s visual demonstrative of its claim interpretation and claim
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`mapping does not pass the eyeball test. According to Samsung, the uppermost layer
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`of the “transistor array substrate” in Kobayashi is “insulating layer 116,” and the
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`interconnections are the “auxiliary wiring elements 118.” (Petition at 44–46.) Using
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`Samsung’s own annotated figure, the “transistor array substrate” under petitioner’s
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`theory is highlighted in orange, and the “interconnections” are highlighted in red.
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`This picture alone tells the full story. It is true that the red-annotated “auxiliary
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`wiring elements 118” are formed above the orange-annotated substrate. But the
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`wiring elements 118 are not “projecting from” it, as expressly required by the
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`claim. Samsung’s theory must fail.
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`To illustrate this point further, under Samsung’s merely “above” the surface
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`application of the claims, other parts of Figure 7 would also “project from” the
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`surface of the transistor array substrate. For instance, 122 would also “project”
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`from the substrate, by virtue of being in the same device and merely “above” it.
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`But this obviously fails—and only proves that Samsung is ignoring requirements of
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`the claim.
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`To be sure, the district court’s claim construction does not change this failure
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`one bit. The dispute between the parties did not concern the term “from” and its
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`spatial requirements, which the district court certainly did not purport to eliminate
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`from the claim. Instead, the dispute went to whether the claimed “surface” had to be
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`“the upper surface” of the transistor array substrate or any “exterior surface.”
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`Markman Order at 15. The district court ruled that the claimed surface had to be “an
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`outer surface”—id. at 18—but that ruling is irrelevant to Samsung’s failure to show
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`projecting “from” as expressly required by the claims.
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`And at any rate, merely being formed above the surface of the substrate plainly
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`does not meet any reasonable application of the district court’s construction, which
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`requires “extending beyond an outer surface” of the substrate.
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`Unable to deal with this failure directly, Samsung’s Reply injects a second red
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`herring based on other district court rulings. In particular, Samsung suggests that the
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`district court “struck” expert testimony making the argument that Kobayashi did not
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`satisfy limitation 1[b] because the auxiliary wiring elements of Kobayashi are not in
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`physical contact or near the transistor array substrate. Reply at 15. This argument
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`both mischaracterizes the district court’s order and overlooks the fact that the district
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`court actually allowed almost precisely the opinion Samsung says was excluded.
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`Mr. Credelle’s expert report in district court devotes seven paragraphs to
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`Kobayashi and limitation 1[b], Ex. 1024, ¶¶ 219–225. Of these paragraphs, two of
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`them provide his opinions about why the specific disclosure of Kobayashi does not
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`satisfy limitation 1[b]. Ex. 1024, ¶¶ 222, 225. The district court did not strike either
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`of these paragraphs. In particular, the district court did not strike any of paragraph
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`222 of Mr. Credelle’s report, where he opines that the auxiliary wiring elements of
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`Kobayashi do not satisfy the limitation because “[t]hey do not contact the surface of
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`the transistor array substrate and are not even close to doing so.” Ex. 1024, ¶ 222.
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`This is, in substance, the argument that Samsung argues was stricken, but under the
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`district court’s orders Mr. Credelle will be permitted to make exactly this argument
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`to the jury at trial, along with the other arguments in the six paragraphs concerning
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`Kobayashi and limitation 1[b] that were not stricken.
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`The sole paragraph of Mr. Credelle’s Kobayashi opinions that the district
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`court excluded was paragraph 221, which never mentions Kobayashi at all and does
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`not directly argue it is missing any claim limitation. Rather, the paragraph contains
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`Mr. Credelle’s opinions concerning the correct construction of the term—a term that
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`the district court had already construed. The district court explained that it was
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`excluding the testimony precisely because it was claim construction testimony,
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`intruding on the district court’s role to construe the claims, not because it was
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`substantively wrong. (Ex. 1026 at 88:11–16 (“However, with regard to the claim
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`construction testimony of Mr. Credelle, particularly as located in Paragraph 221 of
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`his report, I find that that is improper. It’s an attempt to impose what he considers
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`the plain and ordinary meaning to the Court's adopted construction.”); Ex. 1027 at 9
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`(“the Court GRANTED the Motion as it related to Mr. Credelle’s opinions on claim
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`construction and the Court struck ¶ 221 of Mr. Credelle’s report”); see also Ex. 1020
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`(“Likewise, the parties are ordered to refrain from mentioning any portion of this
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`[claim construction order], other than the actual definitions adopted by the Court, in
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`the presence of the jury.”)).
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`Because the district court did not strike the substance of Mr. Credelle’s
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`opinions concerning Kobayashi and indeed permitted Mr. Credelle to make the
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`substantive argument that Samsung complains about, the Board should likewise
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`consider the argument and reject Samsung’s petition.
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`Continuing its trend of distracting from the claim language, Samsung also
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`suggests it can ignore the “from” requirement because “Solas’s argument is
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`contradicted by the ’338 patent disclosures; including the specification’s preferred
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`embodiment.” Reply at 17. Not so. Because the claims at issue use the “comprising”
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`transition, there is no reason that every “interconnection” in a preferred embodiment
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`would need to satisfy the term “project from a surface of the transistor array
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`substrate.”
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`But even if we assume that interconnection 91 must satisfy this claim
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`limitation, it does not follow that the auxiliary wiring elements 118 of Kobayashi do
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`as well. (Ex. 2005, ¶ 98.) We can see the significant difference between the two
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`structures by comparing the following highlighted portions of the ’338 patent (left)
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`and Kobayashi (right) figures from the Petition:
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`The common interconnections 91 could reasonably be understood by a POSITA to
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`“project from a surface” of the yellow transistor array substrate. (Ex. 2005, ¶ 99.)
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`They begin near that surface and extend a significant distance away from the surface,
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`both relative to their distance from the surface and relative to their overall
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`dimensions. (Id.) The auxiliary wiring elements 118 in Kobayashi, on the other hand,
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`do not “project from a surface” of the yellow layers. (Id.) They are far above the
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`surface, relative to their own dimensions, and their extent in the vertical direction
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`(the direction they would need to be “projecting” or “protruding” is small relative to
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`the other relevant dimensions. (Id.)
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`For these reasons, a POSITA would understand that the “auxiliary wiring
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`elements 118” of Kobayashi do not satisfy the “project from a surface” requirement,
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`under its plain meaning or as construed by the district court. (Ex. 2005, ¶ 101.)
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`B.
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`Samsung Also Fails to Show the Supposed Pixel Electrodes
`“Arrayed Along” Any Interconnections—and Samsung’s
`Theories Render That Separate Claim Requirement Meaningless
`Samsung also fails to show that Kobayashi in view of Shirasaki renders
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`limitation 1[c] obvious. Samsung’s Petition relies solely on Kobayashi to satisfy
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`1[c]. (Petition at 46–48.) But notwithstanding Samsung’s hand-waiving and other
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`distractions, Kobayashi does not teach all three separate requirements of 1[c]. And
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`Samsung’s theories otherwise merely render one, if not two, of these requirements
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`superfluous and meaningless.
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`According to the Petition and Samsung’s Reply, the pixel electrodes are the
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`“first electrodes 117,” and the interconnections are the “auxiliary wiring elements
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`118.” (Petition at 46–48.)
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`As shown in Samsung’s annotated figure, its alleged “pixel electrodes” are
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`highlighted in green, and alleged “interconnections” are highlighted in red.
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`On this issue, both sides agree on the relevant claim construction for claim
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`requirement 1[c]. That construction undoubtedly has three separate requirements,
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`which are highlighted below:
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`Applying this construction, it cannot reasonably be disputed that Kobayashi’s first
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`electrode 117 must meet three separate requirements. 117 must be (i) arrayed along
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`auxiliary wiring elements 118; and (ii) located between the auxiliary auxiliary
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`wiring elements 118; and (iii) on the surface of the transistor array substrate.
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`But as explained in Solas’s POR and its supporting materials, the first
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`electrode 117 in Kobayashi are not (i) “arrayed along” or (ii) “located between” the
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`auxiliary wiring elements 118, as those terms would be understood by a POSITA.
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`(Ex. 2005, ¶ 104.)
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`Samsung’s Reply makes at least Samsung’s failure to show the (i) “arrayed
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`along” claim requirement abundantly clear. Samsung admits that 117 is not coplanar
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`with 118. Indeed, 117 and 118 do not share any overlapping layers in the formation
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`of the entire package. Reply at 20. This point is confirmed with one look at
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`Samsung’s demonstrative:
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`Even if we were to just accept—despite what our eyes can see—Samsung’s
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`assertion that 117 and is (ii) located between 118; and (iii) on the surface of
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`substrate—that would still leave one question unresolved for any POSITA. That is:
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`how can any POSITA view 117 as being (i) “arrayed along” 118? As explained by
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`Mr. Flask—in an declaration that Samsung did not respond to—the answer is
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`obvious to the naked eye: A POSITA cannot, and would not, view it this way.
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`“Each element contained in a patent claim is deemed material to defining the
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`scope of the patented invention.” Warner-Jenkinson Co., Inc. v. Hilton Davis Chem.
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`Co., 520 U.S. 17, 29, 117 S.Ct. 1040, 137 L.Ed.2d 146 (1997). And here, “arrayed
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`along” has to mean and require something beyond the other requirements of 1[c].
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`As the record in this proceeding has now established, any POSITA would understand
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`this plain requirement of being arrayed “along” to demand a showing that the
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`electrode is arrayed “in an line matching the length or direction of” the
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`interconnections. https://www.merriam-webster.com/dictionary/along) see also
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`https://dictionary.cambridge.org/us/dictionary/english/along (in a line next to
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`something long) (emphasis added).The patent specification demands this as well.
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`That intrinsic record describes the process of elements of the preferred embodiments
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`being formed or arrayed alongside others. Ex. 1001 at 2:45–47; 5:61–6:2; 7:44–8:15;
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`10:48–11:65; 12:30–13:17; Figs. 1, 3–6
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`This applies equally in the context and description of pixel electrodes being
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`arrayed alongside the claimed plurality of interconnections—as shown by
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`Samsung’s own demonstrative:
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`But Samsung’s petition does not show this 117 and 118 being . To the
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`contrary, by design, elements 117 is several horizontal layers below from elements
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`118. Indeed, the plain language of the ’338 patent claims—and even the description
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`of the embodiments in the patent—stands in stark contrast with Samsung’s claim
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`mapping with Kobayashi:
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`Even if we can look past Samsung’s hand-waiving on the requirement that
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`elements 117 be located between elements 118, that does not also separately get them
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`elements 117 being “arrayed along” elements 118. Even if not in the same plane or
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`layer, the separate “arrayed along” requirement must imply being adjacent to one
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`another and some overlap in at least one of the interconnections. And in sharp
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`contrast to the relationship between the electrodes and interconnections in the ’338
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`patent claims and specification, Kobayashi’s elements 117 are not along or even
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`adjacent to elements118.
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`Thus, Samsung’s claim mapping entirely reads out this separate requirements.
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`That fails. Indeed, any applications of the claims that “that render some portion of
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`the claim language superfluous are disfavored.” Power Mosfet Techs. LLC, v.
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`Siemens AG, 378 F.3d 1396, at 1410 (Fed. Cir. 2004); see also Elekta Instrument
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`S.A. v. O.U.R. Scientific Int'l, Inc., 214 F.3d 1302, 1305, 1307 (Fed.Cir.2000) (claim
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`language “only within a zone extending between latitudes 30°–45°” does not read
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`on a device with radiation sources extending between 14° and 43° because “[a]ny
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`other conclusion renders the reference to 30° superfluous”); Unique Concepts, Inc.
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`v. Brown, 939 F.2d 1558, 1563 (Fed.Cir.1991) (“When the language of a claim is
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`clear, as here, and a different interpretation would render meaningless express claim
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`limitations, we do not resort to speculative interpretation based on claims not
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`granted.”).
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`To further illustrate this failure, under Samsung’s interpretation and
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`application of the claims, the gate and source elements 104 and 105—and even the
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`drain 114—would all be arrayed along elements 118:
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`Put differently, Samsung’s interpretation—which requires only that the electrodes
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`elements 117 be at a lower layer, even those not adjacent to or not overlapping with
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`any layer shared by any wiring elements 118—would indistinguishably render 104,
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`105, and 114 all “arrayed along” 118. That just does not fly.
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`For its part, Samsung’s Reply presents only a single argument in a single
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`paragraph on this point. Reply at 20-21. In that paragraph,. Samsung builds a
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`strawman and misunderstands Solas’s plain meaning interpretation as requiring
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`electrodes and interconnections be “coplanar.” Based on this strawman, Samsung
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`again contends that Solas’s arguments are contradicted by the disclosures of the ’338
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`patent. Id.
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`But the specification does nothing to support this contention. Samsung claims
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`that a sentence in the disclosure proves that pixel electrodes do not need to be
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`adjacent to or share any overlapping horizontal portions with any interconnections.
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`But the sentence Samsung quotes is directed to a single embodiment and, incredibly,
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`does not even mention the phrase “arrayed along.” Reply at 21. In any event, that
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`embodiment, in Figure 6, clearly does not support Samsung’s argument—it shows
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`the green pixel electrodes sharing overlapping horizontal portions with a plurality of
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`interconnections 90 and 89—and even shows it right adjacent to the third
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`interconnection 91:
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`Moreover, the sentence to which Samsing cites refers to Figure 2 in any event.
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`Accordingly, Samsung’s petition must fail—as a matter of law—for this
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`second independent reason.
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`III. Samsung’s Theories and Assertions Under Ground II-- Obviousness
`Over Childs in View of Shirasaki—Fail For Similar Reasons
`Samsung Plainly Does Not and Cannot Show “a plurality of pixel
`electrodes “on the surface of the transistor array substrate”
`Samsung has not established that Childs in view of Shirasaki renders
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`A.
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`limitation 1[c] obvious.1 (Petition at 69–75.) The Petition does not argue that
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`Shirasaki teaches this limitation. (Petition at 69–75.). Under Samsung’s theory, the
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`transistor array substrate is all layers of Childs up to the “planar insulating layer 12,”
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`the interconnections are the “conductive barrier[s] 240,” and the pixel electrodes are
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`the “lower electrode[s] 21” (Petition at 64, 68–70.)
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`1 Both references in Ground 2 were cited and before the examiner during the original
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`prosecution of the claims of the ’338.Ex. 1102 at 193-195; 253-289.
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`As discussed above, in the parallel district court case, the parties agreed to
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`construe the phrase “the pixel electrodes being arrayed along the interconnections
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`between the interconnections on the surface of the transistor array substrate” as “the
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`pixel electrodes are (i) arrayed along the interconnections and (ii) located between
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`the interconnections, and (iii) the pixel electrodes are on the surface of the transistor
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`array substrate.” (Ex. 1020 at 8.)
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`But Childs does not satisfy this limitation under this agreed construction. (Ex.
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`2005, ¶ 133.)) “Lower” electrodes (green) are not “on the surface” of the transistor
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`array substrate (orange). (Id.) Instead, large portions of the pixel electrodes are
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`buried under and in the alleged substrate. (Id.)
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`One look at the patent specification proves this beyond reasonable debate.
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`While Samsung expressly relies in Figure 2, the reference makes clear that the lower
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`electrode 21 is not on any surface of the substrate. Just the opposite is true. Childs
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`clearly explains that The “Figures 2 and 3 illustrate a LED construction in which the
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`lower electrode 21 is formed as a thin film in the circuit substrate 100. Indeed, it
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`then states that “the subsequently-deposited organic semiconductor material 22
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`contacts this thin-film electrode layer 21 at a window 12a in a planar insulating layer
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`12 (for example of silicon nitride) that extends over the thin-film structure of the
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`substrate 100.”
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` Recognizing this fatal problem, Petition proposes modifying Childs by
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`placing the lower electrodes 21 on top of another insulating layer, either an added
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`layer not already in Childs or on top of upper planar insulating layer 12. The
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`petitioner and/or Dr. Fontecchio propose combining Childs with one of Kobayashi,
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`Nakamura, or Park to add this insulating layer. (Petition at 72–75.) But neither any
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`of these references nor the Fontecchio declaration identify any benefit to adding this
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`insulating layer to Childs’s existing design. (Ex. 2005, ¶ 134.) Adding this layer will
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`require further deposition and photolithography steps and will increase the cost of
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`the device. (Id.) In addition, in Kobayashi at least, the additional insulating layers
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`are made from silicon nitride. Dr. Fontecchio opines that silicon nitride is opaque
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`and therefore, it would block the light 250 emitted from the EL element. (Ex. 1018,
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`¶ 187; Ex. 2007 at 72:12–14 (“Q. And is silicon nitride an opaque material that
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`would block visible light? A. It is.”), at 127:14–23 (“Q. Why do you think that Childs
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`identifies silicon nitride as the first choice to use for that material -- for that layer
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`rather? A. Oh, to block light. I think it’s probably the most likely reason. Q. And
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`why would the designer Childs want layer 12 to block light? A. So that you don't
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`get extra light onto the transistor elements and probably parts. Also so you just
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`have control over it.”).)
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`No reason for incurring these costs and disadvantages is provided other than
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`to follow the approach claimed in the ’338 patent. (Ex. 2005, ¶ 135.) Dr. Fontecchio
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`argues that other references like Inukai and Arai teach that it is important to have a
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`level insulator surface on which to deposit the pixel electrodes. (Id.) But a POSITA
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`would not see this as a reason to modify Childs, because the surface of Childs that
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`the pixel electrodes are deposited on is insulating layer 8, which is already flat in the
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`areas where the pixel electrodes are deposited, as shown in Childs Figure 2. (Id.)
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`B.
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`Samsung Again Also Fails to Show the Supposed Pixel Electrodes
`“Arrayed Along” Any Interconnections—and Petitioner’s
`Theories Render That Separate Claim Requirement Meaningless
`In addition, the pixel electrodes (green) are not “arrayed along” or “located
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`between” the interconnections (pink). (Id.) In fact, parts of the pixel electrodes are
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`almost directly beneath the interconnections. (Id.) Thus, even if a POSITA were
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`motivated to add an additional insulating layer to Childs, it would not satisfy this
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`limitation, because the resulting pixel electrodes (green) would not be “arrayed
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`along” or “located between” the interconnections (pink). (Ex. 2005, ¶ 136.) For
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`example, the Kobayashi combining reference does not have electrodes “along” and
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`“between” the interconnections, as discussed above. (Id.) Neither the Petition nor
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`Dr. Fontecchio has identified interconnections in any of Nakamura, Park, Inukai, or
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`Arai or explained how combining with them would produce electrodes “along” and
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`“between” the interconnections. (Id.)
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`Again, as with Ground 1, even if not in the same plane or layer, the separate
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`“arrayed along” requirement must imply being adjacent to one another and some
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`overlap in at least one of the interconnections. And in sharp contrast to the
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`relationship between the electrodes and interconnections in the ’338 patent claims
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`and specification, Childs simply does not meet this limitation.
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`Thus, Samsung’s claim mapping entirely reads out this separate requirements.
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`That fails. Indeed, any applications of the claims that “that render some portion of
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`the claim language superfluous are disfavored.” Power Mosfet Techs. LLC, v.
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`Siemens AG, 378 F.3d 1396, at 1410 (Fed. Cir. 2004); see also Elekta Instrument
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`S.A. v. O.U.R. Scientific Int'l, Inc., 214 F.3d 1302, 1305, 1307 (Fed.Cir.2000) (claim
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`language “only within a zone extending between latitudes 30°–45°” does not read
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`on a device with radiation sources extending between 14° and 43° because “[a]ny
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`other conclusion renders the reference to 30° superfluous”); Unique Concepts, Inc.
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`v. Brown, 939 F.2d 1558, 1563 (Fed.Cir.1991) (“When the language of a claim is
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`clear, as here, and a different interpretation would render meaningless express claim
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`limitations, we do not resort to speculative interpretation based on claims not
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`granted.”).
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`Moving the pixel electrodes of Childs, by adding a new insulating layer or by
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`placing them on t
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