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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`____________
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`FLEX LOGIX TECHNOLOGIES INC.,
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`Petitioner
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`V.
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`VENKAT KONDA,
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`Patent Owner
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`____________
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`Case IPR2020-00261
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`Patent 8,269,523 B2
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`_________
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`PATENT OWNER’S MOTION TO EXCLUDE EVIDENCE
`PURSUANT TO 37 C.F.R. § 42.64(c)
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`Paper No. 48
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`IPR2020-00261
`Patent 8,269,523 PO’s Motion to Exclude Evidence, under 37 C.F.R. § 42.62(c)
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`TABLE OF CONTENTS
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`I.
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`INTRODUCTION & RELIEF REQUESTED ........................................... 1
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`II. REASONS WHY THE REQUESTED RELIEF SHOULD BE
`GRANTED ..................................................................................................... 1
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`A. Prior to filing the Petitions, Petitioner should have known that Dr. Baker is not
`qualified as a Person of Ordinary Skill in the Art (“POSITA”) According to Its Own
`Definition and Should Not Have Filed Dr. Baker’s Declaration under the Penalty of
`Perjury ............................................................................................................................... 1
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`B. Dr. Baker Is Not Qualified in the “Pertinent Art” of This Case. ................................. 4
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`C. Dr. Baker’s Own Prior Testimony Disqualifies Him as a POSITA ............................. 8
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`D. Having known the evidence of secondary considerations, Dr. Baker with his
`dishonest testimony disqualifies him as a POSITA ..................................................... 10
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`III. CONCLUSION ............................................................................................ 15
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`Page ii of 20
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`Paper No. 48
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`IPR2020-00261
`Patent 8,269,523 PO’s Motion to Exclude Evidence, under 37 C.F.R. § 42.62(c)
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`I.
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`INTRODUCTION & RELIEF REQUESTED
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`Pursuant to 37 C.F.R. § 42.64(c), 37 C.F.R. § 42.11, and 37 C.F.R. §
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`42.51(b)(iii) Patent Owner Venkat Konda (“Patent Owner” or “PO”) hereby moves
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`to exclude from evidence exhibits Ex. 1002, Ex. 1003 and all the support presented
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`in the Petition with respect to Ex. 1002 and Ex. 1003 served with the Petition
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`(“Motion”). PO timely filed and served its objections to Ex. 1002 and 1003 on
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`August 17, 2020. See Paper 25; 37 C.F.R. § 42.64; Paper 30, 1-2. PO submits the
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`declaration of Venkat Konda under the penalty of perjury in support of the Motion.
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`(See, Ex. 2033.) PO therefore respectfully requests the Board exclude this
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`evidence.
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`II. REASONS WHY THE REQUESTED RELIEF SHOULD BE
`GRANTED
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`A. Prior to filing the Petitions, Petitioner should have known that Dr. Baker is
`not qualified as a Person of Ordinary Skill in the Art (“POSITA”)
`According to Its Own Definition and Should Not Have Filed Dr. Baker’s
`Declaration under the Penalty of Perjury
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` In the Petition, Petitioner submitted that “A person of ordinary skill in the
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`art (“POSITA”) at the time of the alleged invention of the ‘523 Patent would have
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`had a master’s degree in electrical engineering or a similar field, and at least two to
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`three years of experience with integrated circuits and networks. (Ex. 1002, ¶¶18-
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`19) Petitioner acknowledges that “[M]ore education can supplement practical
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`experience and vice versa. (Id.).” (Petition, at 23)
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`Page 1 of 20
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`However Petitioner’s witness, Dr. Baker stated “All of my opinions stated
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`in this declaration are based on my own personal knowledge and professional
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`judgment. In forming my opinions, I have relied on my knowledge and
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`experience in designing, developing, researching, and teaching regarding
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`circuit design and memory devices referenced in this declaration.” (Ex. 1002,
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`¶3). Notably, Petitioner’s sole declarant by his own admission has no experience in
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`networks. Expertise in networks is different from expertise in memory.
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`Dr. Baker submitted that he has education in Electrical Engineering and
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`experience in “circuit designs for networks and communications.” See, Ex. 1002
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`at ¶¶ 7-9. However, the term “networks” appears only once in Dr. Baker’s entire
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`CV of 35 pages. Even in that one instance “networks” is used to refer to Aerohive
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`Networks, where Aerohive Networks is the name of a company (and the subject
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`matter relates to memory, not networks) (See, Exhibit 1003 at 30.)
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`In comparison, the term “memory” appears more than 150 times in Dr.
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`Baker’s CV of 35 pages. (This count even excludes the terms DRAM, ROM,
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`EPROM, EEPROM, etc. where the letter “M” stands for memory in these terms).
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`Clearly, Dr. Baker’s expertise is in memory. He has absolutely has no
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`qualifications in “networks”. Accordingly Dr. Baker misrepresented that he has
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`Page 2 of 20
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`experience in networks in his declaration (Ex. 1002) which had no support in Dr.
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`Baker’s CV (Ex. 1003).
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`PO further contends that Dr. Baker is not qualified as a POSITA according
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`to Petitioner’s own definition, let alone as an expert witness regarding the field of
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`interconnection networks which is very fundamental to the Challenged Claims of
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`the ‘523 in the Petition. Expertise in the field of interconnection networks is totally
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`different the expertise in the field of networks.
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`Furthermore a POSITA would have understood that in a multi-stage network
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`forward connecting links are not connected from the last stage and backward
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`connecting links are not connected from the first stage. Accordingly a POSITA
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`would have easily understood that if there is only one stage in a multi-stage
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`network, that single stage will neither have any forward connecting links or any
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`backward connecting links and with no need for any experimentation let alone
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`“undue experimentation”. (See, Dr. Chaudhary’s Decl., Exhibit 2025 at ¶¶32-34.)
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`Accordingly Dr. Baker either does not have basic understanding of multi-stage
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`networks or disingenuously gave his declaration in support of the Petition.
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`Therefor PO’s contention is not about the sufficiency or the weight of Dr.
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`Baker’s declaration. PO’s challenges the admissibility of Dr. Baker’s declaration
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`because Dr. Baker is simply not even qualified as a POSITA in view of Petitioner’s
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`Page 3 of 20
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`own definition of POSITA. Accordingly, PO files this motion to exclude exhibits
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`Ex. 1002, Ex. 1003, and all support presented in the Petition based on Ex. 1002
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`and Ex. 1003 served with the Petition should be excluded.
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`B. Dr. Baker Is Not Qualified in the “Pertinent Art” of This Case.
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`Petitioner in its Opposition to PO’s Motion to exclude Dr. Baker’s
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`testimony, in a related PGR Proceeding (See, Ex. 2021), refers to several previous
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`PTAB cases. To the extent they are relevant in this case, particularly to Dr. Baker’s
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`lack of qualifications in the “pertinent art,” PO responds to them as follows:
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`(1) Apple Inc. v. Achates Reference Publ’g, Inc., IPR2013-00080, Paper 90 at
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`48-49 (PTAB June 2, 2014) relates to claim construction of certain terms by the
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`expert declarant in support of the petition and is so not relevant to the present case.
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`(2) Laird Techs., Inc. v. GrafTech, IPR2014-00025, Paper 45 at 42 (PTAB
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`March 25, 2015) relates to the sufficiency and weight of the expert declarant in
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`support of the petition, and so is not relevant to the present case in which Dr.
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`Baker’s testimony is inadmissible because he lacks any experience in the field of
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`the invention and misrepresented his expertise in networks.
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`(3) With respect to MindGeek, s.a.r.l. v. Skky Inc., IPR2014-01236, Paper 45 at
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`23 (PTAB January 29, 2016), the Board’s final decision was that with or without
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`the consideration of the weight of the expert witness’s declaration and exhibits it
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`did not affect the final outcome and so it is not relevant to the present case.
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`(4) With respect to AVX Corp. v. Greatbatch, Ltd., IPR2014-00697, Paper 57 at
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`26 (PTAB October 21, 2015), the Board’s final decision was that the moving party
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`did not dispute the declarant was a POSITA, and so it is not relevant to the present
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`case. Here, PO contends that Dr. Baker is not even qualified as a POSITA, and so
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`PO’s Motion is directed to the admissibility of Dr. Baker’s testimony because he is
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`unqualified as such in the field of the invention, namely, networks, according to
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`Petitioner’s own definition.
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`(5) With respect to CaptionCall, LLC v. Ultratec, Inc., IPR2013-00550, Paper
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`57 at 11-12 (PTAB March 3, 2015), the moving party disputed that the declarant
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`was a POSITA in “telecommunications technology for the deaf and hard of
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`hearing”, whereas it conceded that the declarant was qualified in
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`“telecommunications technology”. There, the moving party argued to constrict the
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`“pertinent art,” to a particular subset of individuals who use the pertinent
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`technology, rather than the pertinent technology itself, and the Board’s final
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`decision thus noted that the relevant inquiry was as to the sufficiency and weight of
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`the testimony by the expert declarant, not the admissibility of the testimony.
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`Page 5 of 20
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`In the present case, PO contends Dr. Baker does not have any expertise in
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`networks. Accordingly, Dr. Baker’s testimony is inadmissible, and exhibits Ex.
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`1002, Ex. 1003, and all support presented in the Petition based on Ex. 1002 and
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`Ex. 1003 served with the Petition should be excluded.
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`PO, in his preliminary response (Paper 9 at 8), submitted that a POSITA at
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`the time of the invention of the ‘523 Patent would have had a master’s degree in
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`electrical engineering or a similar field, and at least two to three years of
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`experience with integrated circuits, interconnection networks and Field
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`Programmable Gate Arrays. More education can supplement practical
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`experience and vice versa.
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`Notably, Petitioner submitted that “Indeed, Dr. Baker has considerable
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`experience and knowledge in field programmable gate array (“FPGA”) technology
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`as well as interconnected networks. See Ex. 1002 at ¶¶ 7, 9, 14; see generally Ex.
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`1003. For instance, Dr. Baker authored and coauthored numerous papers in the
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`area of FPGAs (Ex. 1002 at ¶9; Ex. 1003 at 17) and has industrial experience with
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`memory modules and controllers implemented with FPGAs and application
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`specific integrated circuits (“ASICs”) (Ex. 1003 at 3).” (See, Exhibit 2021 at 6-7
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`(emphasis added)). Petitioner also argued that “Patent Owner ignores other parts of
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`the Declaration which describe, for example, Dr. Baker’s education in Electrical
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`Page 6 of 20
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`Engineering and experience in “circuit designs for networks and communications”
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`and “communications systems, and fiber optics.” See e.g., Ex. 1002 at ¶¶ 7-9.”
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`(See, Ex. 2021 at 6).
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`As described below, these are four misrepresentations by Petitioner, its
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`Counsel and Dr. Baker regarding the field programmable gate array (“FPGA”)
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`technology, “communications systems” and “fiber optics” as to the field of the
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`invention, namely, interconnection networks.
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`The term “FPGA” appears four times in Dr. Baker’s CV of 35 pages. Three
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`of those refer to the use of an FPGA and not to implementation or design of an
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`FPGA or the interconnection network for the FPGA (An analogy is that a person
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`who can drive an automobile is not a POSITA in the design of an automobile or
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`the drivetrain to connect to an internal combustion engine). (See, Ex. 1003 at 1, 3
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`and 17.) The fourth reference in Dr. Baker’s CV of 35 pages is to implement
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`memory for an FPGA (See, Exhibit 1003 at 2), which is independent of the
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`implementation of an interconnection network implemented in the FPGA itself.
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`The term “fiber optics” is used three times in Dr. Baker’s CV of 35 pages
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`(See, Ex. 1003 at 2 twice and at 16). All three of them refer to fiber optic devices
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`which have got nothing to do with “networks” or “interconnection networks” or
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`FPGAs. The term “communications” is used five times in Dr. Baker’s CV of 35
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`Page 7 of 20
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`pages (See, Ex. 1003 at 2, at 6 twice, at 23and at 26). None of the five of them has
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`anything to do with “networks” or “interconnection networks” or FPGAs.
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`The term “interconnected networks” or “interconnection networks” appears
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`ZERO times in Dr. Baker’s CV of 35 pages. Furthermore the Curriculum Vitae of
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`Dr. Baker (Ex. 1003) does not list a single publication, or a course taught at UNLV
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`or a granted patent in the design or implementation of either networks or
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`interconnection networks or Field Programmable Gate Arrays.
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`In summary, Dr. Baker has no experience in the implementation of
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`“networks” or “interconnection networks” for a “Field Programmable Gate Array
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`(“FPGA”)” which is the “pertinent art” in the current case. Accordingly, Dr.
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`Baker’s testimony is inadmissible, and, therefore, exhibits Ex. 1002, Ex. 1003 and
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`all support presented in the Petition based on Ex. 1002 and Ex. 1003 served with
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`the Petition should be excluded.
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`C. Dr. Baker’s Own Prior Testimony Disqualifies Him as a POSITA
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`The Board denied a third concurrently filed Petition, namely, IRP2020-
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`00262, under U.S.C. § 325(d). In that Petition, Petitioner, based on Dr. Baker’s
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`Declaration, challenged claims 1 and 20-22 of the ‘523 Patent under § 102 as being
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`anticipated by US Patent # 6,940,308 (“Wong“) and claims 15-18, 32, and 47
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`under § 103 as being obvious over Wong.
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`Page 8 of 20
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` Notably, PO’s Contingent Motion to Amend in this IPR narrowed challenged
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`Claim 1 (i.e., substitute contingent claim 49) by replacing y ≥ 1 with y > 1.
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`Furthermore, in the subsequent Preliminary Guidance the Board clearly noted that:
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`“Proposed substitute independent claim 49 recites ‘a plurality of stages y . . . where
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`y>1,’ as compared to ‘a plurality of stages y . . . where y≥1’ as recited in original
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`independent claim 1. Thus, proposed substitute claim 49 is narrower than original
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`claim 1.” (See, Paper 41, 5). (Subsequently, the Board granted PO’s Motion to
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`withdraw PO’s Contingent Motion to Amend on March 17, 2021 (See, paper 46).)
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`However, Petitioner’s Opposition to PO’s Contingent Motion to Amend
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`nevertheless argued that claim 49 was broadened and thus anticipated by Wong.
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`(See, Paper 38, 20-28.) In support of that argument, Petitioner submitted another
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`declaration of Dr. Baker in support of Petitioner’s argument. (See, Ex. 1052 at ¶¶
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`52-150.) It is clear that Dr. Baker does not have basic qualifications in the pertinent
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`art of the ‘523 Patent based on his conclusion that narrower claim 49 (i.e., y˃ 1) in
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`PO’s Contingent Motion to Amend is anticipated or rendered obvious by Wong
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`after the Board had previously ruled that broader Claim 1 (i.e., y≥1) was neither
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`anticipated or obvious over Wong.
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`Therefore, the record evidences that Dr. Baker does not qualify as a POSITA
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`in the pertinent art. Accordingly, Dr. Baker’s testimony is inadmissible, and,
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`Page 9 of 20
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`therefore, exhibits Ex. 1002, Ex. 1003 and all support presented in the Petition
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`based on Ex. 1002 and Ex. 1003 served with the Petition should be excluded.
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`D. Having known the evidence of secondary considerations, Dr. Baker with
`his dishonest testimony disqualifies him as a POSITA
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`The Board has repeatedly “cautioned Petitioners in prior proceedings that
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`petitions may be denied if they do not address known evidence of secondary
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`considerations.” Stryker Corp v. KFX Medical, LLC, IPR2019-00817 (PTAB Sep.
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`16, 2019) (Paper 10) (citing cases); See Transocean Offshore Deepwater Drilling,
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`Inc. v. Maersk Drilling USA, Inc., 699 F.3d 1340, 1349 (Fed. Cir. 2012); Graham
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`v. John Deere Co., 383 U.S. 1 (1966). However, despite being well aware of the
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`objective evidence of non-obviousness, including the longstanding need,
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`unsuccessful attempts of others, and the commercial success of Patent Owner's 2D-
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`layout of multi-stage networks disclosed in the ‘523 Patent, Dr. Baker provided
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`declaration in support of Petitioner’s Opposition to PO’s Contingent Motion to
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`Amend argument that claim 49 was broadened and thus anticipated by Wong (See,
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`Ex. 1052 at ¶¶ 52-150.)
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`Even though Benes/BFT multi-stage networks offer O(N*Log N) crosspoint
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`complexity compared to 2D-Mesh Networks with O(N^2) crosspoint complexity,
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`lack of known 2D-Mesh-like 2D layouts for multi-stage networks was a long felt
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`need and unsolved for years to implement them as an FPGA fabric. And, the lack
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`of 2D-Mesh like layouts for Benes/BFT Multi-stage networks left FPGA
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`manufacturers with no other choice excepting to use 2D-Mesh based fabrics for
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`years. However, 2D-Mesh based FPGA fabrics consume ~75% of die area,
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`considerable power consumption and slower performance.
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`There have been several unsuccessful attempts to address these technical
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`issues. However, the prior art VLSI layouts of Benes and butterfly fat tree
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`networks require large area to implement the switches on the chip, a large number
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`of wires, longer wires, with increased power consumption, and increased latency of
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`the signals which effect the maximum clock speed of operation. The column-based
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`layout disclosed in Wong is not practical for implementation of an FPGA. Dr.
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`Baker is aware that this is validated in 2013 Ph.D. dissertation by Co-founder of
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`Petitioner Flex Logix, Dr. Cheng Wang (“Wang”) and his Ph.D. advisor, Dr. Dejan
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`Markovic (“Markovic”), where Wang plagiarized and brazenly claimed it as his
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`invention. (Ex. 2004 titled “Building Efficient, Reconfigurable Hardware using
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`Hierarchical Interconnects” awarded in 2013 by the Department of Electrical
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`Engineering at the University of California, Los Angeles (“UCLA”), at 48-51 in
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`the section 2.5 titled “Prior Attempts at Hierarchical FPGAs”. US Patent #
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`6,940,308 (“Wong“) is referred as “Wong04” in the Exhibit 2004 and the reference
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`to Wong04 appears three times in the Exhibit 2004 in the pages 48, 49 and 178.
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`Wang in the Exhibit 2004 describes Wong04 in the “Section 2.5 Prior attempts at
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`Page 11 of 20
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`Hierarchical FPGAs” (i.e. in pages 48 and 49) as unsuccessful prior attempts.
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`However Figure 2.13 in page 48 and Figure 3.1 in page 55 in the Exhibit 2004 are
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`blatant plagiarization of the alternate vertical and horizontal wire based layouts for
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`multi-stage networks disclosed in the ‘523 Patent, by Wang and Markovic.
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`Dr. Baker knows that the same day, i.e., April 3, 2019, PO dismissed the
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`lawsuit against the Petitioner in the federal district, PO sued Markovic, Wang and
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`the Petitioner in the Superior Court of the State of California, County of Santa
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`Clara (See, Exhibit 2030, Fourth Amended Complaint: Venkat Konda PhD vs
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`Markovic, Wang, Flex Logix Technologies et al., Case No:19CV345846, filed on
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`March 22, 2021) (hereinafter “Verified California Complaint”). The Verified
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`California Complaint was filed with the support of Dr. Chaudhary’s declaration
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`(See, Exhibits 2031 – 2032.)
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`Dr. Baker knows that the ‘523 Patent was a national stage application of
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`international application PCT Application No. PCT/US2008/064605 (the “‘605
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`PCT application”) (Ex. 1007), filed May 22, 2008, was published as the PCT
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`Publication NO. WO 2008/147928 A1(The “Konda ‘928 PCT”). The Konda ‘928
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`PCT is referred as one of the “2008 Konda Publications” in the Verified California
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`Complaint (See, Exhibit 2031,¶47) and Dr. Chaudhary’s Declaration in support of
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`the Verified California Complaint (See, Exhibit 2031, ¶15).
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`Dr. Baker is also aware that Exhibit 2030 ¶¶ 78, 248 state that “The
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`disclosure in Chapters II and III and portions of Chapters V and VI of Wang’s
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`2013 Ph.D. dissertation brazenly copies the 2008 Konda Publications and 2011
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`Konda Publication, especially the figures and layouts, as shown by the highlighted
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`portions of Exhibit 22. (See, Dr. Chaudhary Decl. at ¶¶ 16-19, ¶¶ 23-25 and ¶¶ 29,
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`31-32.)”.
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`The 2D-layout with alternate horizontal and vertical wiring disclosed in the
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`‘523 Patent is the first breakthrough for the commercial success of multi-stage
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`networks as FPGA fabric. This is validated in a 2011 publication by Co-founders
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`of Petitioner Flex Logix, Wang and Markovic who plagiarized and brazenly
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`claimed it as their invention. (Ex. 2002 titled “A 1.1 GOPS/mW FPGA Chip with
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`Hierarchical Interconnect Fabric” published in the 2011 VLSI symposium on VLSI
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`Circuits, at 1 in sections titled “Introduction” and “Hierarchical Interconnect
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`Architecture” and at 2, Figure 2b titled “alternated x-y routing”). Notably the
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`column-based layout disclosed in Wong is not even cited in this paper which
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`validates that the column-based layout of Wong is not commercially relevant.
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`Dr. Baker also knows that Exhibit 2030 ¶¶ 70, 247 state that “Defendants
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`Markovic and Wang blatantly plagiarized the disclosures in the 2008 Konda
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`Publications and shamelessly published the 2011 VLSI Paper in which they
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`intentionally misrepresented that Dr. Konda’s alternate vertical and horizontal
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`layout of Benes/BFT layouts was their innovation in furtherance of their illicit
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`scheme of violating Konda Business Knowledge and Practices received in
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`confidence and obtained by trolling Dr. Konda and unfairly competing against Dr.
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`Konda. (See, Dr. Chaudhary Decl. at ¶¶ 16-19, ¶¶ 20-22 and ¶¶ 29-30.)”.
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`The 2D-layouts disclosed in the ‘523 Patent initiated the commercial success
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`of multi-stage network based FPGA fabrics. With the 2D-layouts disclosed in the
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`‘523 Patent, commercial FPGAs achieved ~2X area savings with significant power
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`and performance improvements over 2D-Mesh based fabrics. This is validated in a
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`2009 DARPA Proposal by Co-founder of Petitioner Flex Logix Markovic as
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`principal investigator and assisted by Wang. (See, Ex. 2003) on various pages 1) at
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`8, Figure 4: titled “Hierarchical Konda interconnect architecture” referring to the
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`2D-layout disclosed in the ‘523 Patent, 2) at 9 in the section titled “Basis of
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`confidence” in their own words as follows: “Konda network architecture is a
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`patent-protected technology that is recognized by many semiconductor companies
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`including Cisco, Xilinx, Altera, and LSI Logic. To demonstrate the network in
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`hardware, UCLA team has taped out 3 chips (namely Chip 1 (90nm, LUT-slice
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`FPGA, concept demo), Chip 2 (65nm, LUT and DSP slices, small scale), and Chip
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`3 (45nm, DSP-slice FPGA, small scale)) and successfully implemented variants of
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`Konda network and also variants of processor-block features,” which mentions
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`commercial recognition by commercial organizations and the implementation of
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`2D-layouts disclosed in the ‘523 Patent in 3 chips implemented at UCLA and taped
`
`out, and 3) at 11, in the section titled “Proposed Network Architecture” and Figure
`
`7 titled “Konda interconnect network architecture and routing tracks for N = 8
`
`LUTs,” again based on the 2D-layouts disclosed in the ‘523 Patent.
`
`Accordingly, Petitioner has publicly acknowledged the commercial benefit
`
`of 2D-layouts of multi-stage networks disclosed in the ‘523 Patent. Therefore,
`
`despite being aware of these well-known secondary considerations, the Board
`
`should note that Dr. Baker, under the penalty of perjury, provided a dishonest
`
`declaration in support of Petitioner’s Opposition to PO’s Contingent Motion to
`
`Amend argument that claim 49 was broadened and thus anticipated by Wong.
`
`Accordingly, PO files this motion to exclude exhibits Ex. 1002, Ex. 1003, and all
`
`support presented in the Petition based on Ex. 1002 and Ex. 1003 served with the
`
`Petition should be excluded.
`
`III. CONCLUSION
`
`In conclusion, PO respectfully requests the Board to grant this Motion to
`
`exclude, pursuant to 37 C.F.R. § 42.64, 37 C.F.R. § 42.11, and 37 C.F.R. §
`
`42.51(b)(iii). For the foregoing reasons, Ex. 1002, Ex. 1003 and all the support
`
`presented in the Petition based on Ex. 1002 and Ex. 1003 should be excluded.
`
`
`
`Page 15 of 20
`
`
`
`
`Paper No. 48
`
`IPR2020-00261
`Patent 8,269,523 PO’s Motion to Exclude Evidence, under 37 C.F.R. § 42.62(c)
`
`Date: April 13, 2021
`
`Respectfully submitted,
`
`
`
`
`
`/Venkat Konda/
`Venkat Konda
`Pro Se Counsel
`6278 Grand Oak Way
`San Jose, CA 95135
`
`
`
`Page 16 of 20
`
`
`
`
`Paper No. 48
`
`IPR2020-00261
`Patent 8,269,523 PO’s Motion to Exclude Evidence, under 37 C.F.R. § 42.62(c)
`
`CERTIFICATE OF COMPLIANCE
`
`Pursuant to 37 C.F.R. §42.24(a)(1)(v), PO certifies that PO’s Motion to
`
`Exclude Evidence under 37 C.F.R. § 42.64(c), filed April 13, 2021, contains 15
`
`pages and 3,690 words, per computer generated information.
`
`
`
`
`Dated: April 13, 2021
`
`
`
`
`
`
`
`/Venkat Konda/
`Venkat Konda
`Pro Se Counsel
`
`
`Certificates - Page 1 of 20
`
`
`
`
`
`
`Paper No. 48
`
`IPR2020-00261
`Patent 8,269,523 PO’s Motion to Exclude Evidence, under 37 C.F.R. § 42.62(c)
`
`CERTIFICATE OF SERVICE
`
`
`
`Pursuant to 37 C.F.R. §42.6(e) and consent of the Petitioner, I certify that on
`
`April 13, 2021, a copy of PO’s Motion to Exclude Evidence was served on counsel
`
`of record for Petitioner by email to PH-FlexLogix-Konda-IPR@paulhastings.com
`
`
`
`Dated: April 13, 2021
`
`
`
`
`
`
`
`
`
`
`
`Respectfully submitted,
`
`
`
`/Venkat Konda/
`Venkat Konda
`Pro Se Counsel
`
`Certificates - Page 2 of 20
`
`
`
`
`
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