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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`____________
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`FLEX LOGIX TECHNOLOGIES INC.,
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`Petitioner
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`V.
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`VENKAT KONDA,
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`Patent Owner
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`____________
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`Case PGR2020-00260
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`Patent 8,269,523 B2
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`_________
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`PATENT OWNER’S MOTION TO EXCLUDE EVIDENCE
`PURSUANT TO 37 C.F.R. § 42.64
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`IPR2020-00260
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`TABLE OF CONTENTS
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`I.
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`INTRODUCTION ......................................................................................... 1
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`II. RELIEF REQUESTED ................................................................................. 1
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`III. REASONS WHY THE REQUESTED RELIEF SHOULD BE
`GRANTED ..................................................................................................... 2
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`A. Prior to filing the Petitions, Petitioner should have known that Dr. Baker is not
`qualified as a Person of Ordinary Skill in the Art (“POSITA”) According to Its Own
`Definition ........................................................................................................................... 2
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`B. Petitioner Should Not Have Filed Dr. Baker’s Declaration under the Penalty of
`Perjury ............................................................................................................................... 4
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`C. Dr. Baker Is Not Qualified in the “Pertinent Art” of This Case. ................................. 5
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`D. Petitioner, Its Counsel and Dr. Baker under the Penalty of Perjury Misrepresented
`That Dr. Baker Is Qualified in the “Pertinent Art” Several More Times ................... 9
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`E. Dr. Baker Made Several Key Errors in the Petition Due to His Lack of Expertise in
`the “Pertinent Art”. ........................................................................................................ 10
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`F. Dr. Baker Is the Only Witness in Support of the Petition. .......................................... 15
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`IV. CONCLUSION ............................................................................................ 15
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`Page ii of 19
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`I.
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`INTRODUCTION
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`Paper No. 25
`PO’s Motion to Exclude Evidence
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`Flex Logix Technologies Inc. (“Flex Logix” or “Petitioner”) filed its petition
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`for inter partes review (“IPR”) IPR2020-002601 regarding claims 1, 15-18, 20-22,
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`32 and 47 (2-7 and 11) (the “Challenged Claims”) of U.S. Patent No. 8,269,523
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`(Ex. 1001, “the ‘523 Patent”) on December 16, 2019 (Paper 1 or “Petition”). Patent
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`Owner Venkat Konda (“Patent Owner”) submitted his Preliminary Response
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`pursuant to 37 C.F.R. § 42.107 in opposition to the Petition on May 6, 2020 (Paper
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`8). The Board instituted the IPR2 on August 3, 2020 (Paper 22).
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`II. RELIEF REQUESTED
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`Pursuant to 37 C.F.R. § 42.64, 37 C.F.R. § 42.11, and 37 C.F.R. §
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`42.51(b)(iii) Patent Owner hereby moves to exclude from evidence exhibits Ex.
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`1002, Ex. 1003 and all the support presented in the Petition with respect to Ex.
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`1002 and Ex. 1003 served with the Petition (“Motion”). Patent Owner submits the
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`declaration of Venkat Konda under the penalty of perjury in support of the Motion.
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`Venkat Konda holds a Ph.D. degree in Computer Science and engineering and,
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`1 Petitioner concurrently filed two additional petitions for IPR of the ‘523
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`Patent. Those two petitions are IPR2020-00261 and IPR2020-00262.
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`2 The Board also instituted IPR2020-00261 but denied IPR2020-00262.
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`Page 1 of 19
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`unlike Dr. Baker, had extensive experience in designing, developing, researching,
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`and teaching interconnection networks, for over two decades at the time of the
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`effective priority date of the ‘523 Patent. See Ex. 2024.
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`III. REASONS WHY THE REQUESTED RELIEF SHOULD BE
`GRANTED
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`A. Prior to filing the Petitions, Petitioner should have known that Dr. Baker is
`not qualified as a Person of Ordinary Skill in the Art (“POSITA”)
`According to Its Own Definition
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` In the Petition, Petitioner submitted that “A person of ordinary skill in the
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`art (“POSITA”) at the time of the alleged invention of the ‘523 Patent would have
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`had a master’s degree in electrical engineering or a similar field, and at least two to
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`three years of experience with integrated circuits and networks. (Ex. 1002, ¶¶18-
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`19) Petitioner acknowledges that “[M]ore education can supplement practical
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`experience and vice versa. (Id.).” (Petition, at 23)
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`However Petitioner’s witness, Dr. Baker stated “All of my opinions stated
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`in this declaration are based on my own personal knowledge and professional
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`judgment. In forming my opinions, I have relied on my knowledge and
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`experience in designing, developing, researching, and teaching regarding
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`circuit design and memory devices referenced in this declaration.” (Ex. 1002,
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`¶3).
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`Page 2 of 19
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`Notably, Petitioner’s sole declarant by his own admission has no experience
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`in networks. Expertise in networks is different from expertise in memory.
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`Dr. Baker submitted that he has education in Electrical Engineering and
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`experience in “circuit designs for networks and communications.” See, e.g., Ex.
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`1002 at ¶¶ 7-9. However, the term “networks” appears only once in Dr. Baker’s
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`entire CV of 35 pages. Even in that one instance “networks” is used to refer to
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`Aerohive Networks, where Aerohive Networks is the name of a company (and the
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`technical subject matter relates to memory, not networks) (See, Exhibit 1003 at
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`30.)
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`In comparison, the term “memory” appears more than 150 times in Dr.
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`Baker’s CV of 35 pages. (This count even excludes the terms DRAM, ROM,
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`EPROM, EEPROM, etc. where the letter “M” stands for memory in these terms).
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`Clearly, Dr. Baker’s expertise is in memory. He has absolutely has no
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`qualifications in “networks”.
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`Accordingly Dr. Baker misrepresented that he has experience in networks
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`in his declaration (Ex. 1002) which had no support in Dr. Baker’s CV (Ex. 1003).
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`Consequently, Patent Owner files this Motion to exclude Petitioner’s exhibits Ex.
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`1002, Ex. 1003, and all support presented in the Petition based on Ex. 1002 and
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`Ex. 1003 served with the Petition should be excluded.
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`Page 3 of 19
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`B. Petitioner Should Not Have Filed Dr. Baker’s Declaration under the
`Penalty of Perjury
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`Patent Owner contends that Dr. Baker is not qualified as a POSITA
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`according to Petitioner’s own definition, let alone as an expert witness regarding
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`the field of interconnection networks which is very fundamental to the
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`Challenged Claims of U.S. Patent No. 8,269,523 in the Petition.
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`Also, the Board’s decision instituting the IPR stated “Dr. Baker testifies as
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`to his education and qualifications and provides his curriculum vitae. See, Ex. 1002
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`¶¶ 3–12; Ex. 1003. At this preliminary stage, we cannot say that Dr. Baker’s
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`scientific, technical, and other specialized knowledge will not be helpful in
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`understanding the evidence.” (Paper 22 at 8).
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`Patent Owner’s contention is not about the sufficiency or the weight of Dr.
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`Baker’s declaration. Patent Owner’s challenges the admissibility of Dr. Baker’s
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`declaration because Dr. Baker is simply not even qualified as a POSITA in view of
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`Petitioner’s own definition of POSITA. Furthermore, as described in the previous
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`section, Dr. Baker misrepresented that he has purported experience in circuit
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`designs for networks in his declaration (Ex. 1002) with no support in Dr. Baker’s
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`CV (Ex. 1003). Accordingly, Patent owner files this motion to exclude exhibits Ex.
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`1002, Ex. 1003, and all support presented in the Petition based on Ex. 1002 and
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`Ex. 1003 served with the Petition should be excluded.
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`Page 4 of 19
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`C. Dr. Baker Is Not Qualified in the “Pertinent Art” of This Case.
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`Petitioner in its Opposition to Patent Owner’s Motion to exclude Dr. Baker’s
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`testimony, in a related PGR Proceeding (See, Ex. 2021), refers to several previous
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`PTAB cases. To the extent they are relevant in this case, particularly to Dr. Baker’s
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`lack of qualifications in the “pertinent art,” Patent Owner responds to them as
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`follows:
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`(1) Apple Inc. v. Achates Reference Publ’g, Inc., IPR2013-00080, Paper 90
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`at 48-49 (PTAB June 2, 2014) relates to claim construction of certain terms by the
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`expert declarant in support of the petition and is therefore not relevant to the
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`present case.
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`(2) Laird Techs., Inc. v. GrafTech, IPR2014-00025, Paper 45 at 42 (PTAB
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`March 25, 2015) relates to the sufficiency and weight of the expert declarant in
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`support of the petition, and so is not relevant to the present case in which Dr.
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`Baker’s testimony is inadmissible because he lacks any experience in the field of
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`the invention and misrepresented his expertise in networks.
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`(3) With respect to MindGeek, s.a.r.l. v. Skky Inc., IPR2014-01236, Paper 45
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`at 23 (PTAB January 29, 2016), the Board’s final decision was that with or without
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`the consideration of the weight of the expert witness’s declaration and exhibits it
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`did not affect the final outcome and so it is not relevant to the present case.
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`Page 5 of 19
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`(4) With respect to AVX Corp. v. Greatbatch, Ltd., IPR2014-00697, Paper
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`57 at 26 (PTAB October 21, 2015), the Board’s final decision was that the moving
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`party did not dispute the declarant was a POSITA, and so it is not relevant to the
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`present case. Here, Patent Owner contends that Dr. Baker is not even qualified as
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`a POSITA, and so Patent Owner’s Motion is directed to the admissibility of Dr.
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`Baker’s testimony because he is unqualified as such in the field of the invention,
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`namely, networks, according to Petitioner’s own definition.
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`(5) With respect to CaptionCall, LLC v. Ultratec, Inc., IPR2013-00550,
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`Paper 57 at 11-12 (PTAB March 3, 2015), the moving party disputed that the
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`declarant was a POSITA in “telecommunications technology for the deaf and hard
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`of hearing”, whereas it conceded that the declarant was qualified in
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`“telecommunications technology”. There, the moving party argued to constrict the
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`“pertinent art,” i.e., the pertinent technology, to a particular subset of individuals
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`who use the pertinent technology, rather than the pertinent technology itself, and
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`the Board’s final decision thus noted that the relevant inquiry was as to the
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`sufficiency and weight of the testimony by the expert declarant, not the
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`admissibility of the testimony.
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`In the present case, Patent Owner contends Dr. Baker does not have any
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`expertise in networks. Accordingly, Dr. Baker’s testimony is inadmissible, and
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`Page 6 of 19
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`exhibits Ex. 1002, Ex. 1003, and all support presented in the Petition based on Ex.
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`1002 and Ex. 1003 served with the Petition should be excluded.
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`Patent Owner, in his preliminary response (Paper 8 at 8), submitted that a
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`POSITA at the time of the invention of the ‘523 Patent would have had a master’s
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`degree in electrical engineering or a similar field, and at least two to three years of
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`experience with integrated circuits, interconnection networks and Field
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`Programmable Gate Arrays. More education can supplement practical
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`experience and vice versa.
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`Notably, Petitioner submitted that “Indeed, Dr. Baker has considerable
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`experience and knowledge in field programmable gate array (“FPGA”) technology
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`as well as interconnected networks. See Ex. 1002 at ¶¶ 7, 9, 14; see generally Ex.
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`1003. For instance, Dr. Baker authored and coauthored numerous papers in the
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`area of FPGAs (Ex. 1002 at ¶9; Ex. 1003 at 17) and has industrial experience with
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`memory modules and controllers implemented with FPGAs and application
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`specific integrated circuits (“ASICs”) (Ex. 1003 at 3).” (See, Exhibit 2021 at 6-7
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`(emphasis added)). As described below, these are two misrepresentations by
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`Petitioner, its Counsel and Dr. Baker regarding the field programmable gate array
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`(“FPGA”) technology as to the field of the invention, namely, interconnection
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`networks.
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`Page 7 of 19
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`Moreover, the term “FPGA” appears four times in Dr. Baker’s CV of 35
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`pages. Three of those refer to the use of an FPGA and not to implementation or
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`design of an FPGA or the interconnection network for the FPGA (An analogy is
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`that a person who can drive an automobile is not a POSITA in the design of an
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`automobile or the drivetrain to connect to an internal combustion engine). (See, Ex.
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`1003 at 1, 3 and 17.) The fourth reference in Dr. Baker’s CV of 35 pages is to
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`implement memory for an FPGA (See, Exhibit 1003 at 2), which is independent of
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`the implementation of an interconnection network implemented in the FPGA itself.
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`The term “interconnected networks” or “interconnection networks” appears
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`ZERO times in Dr. Baker’s CV of 35 pages.
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`In summary, Dr. Baker has no experience in the implementation of
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`“networks” or “interconnection networks” for a “Field Programmable Gate Array
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`(“FPGA”)” which is the “pertinent art” in the current case. Accordingly, Dr.
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`Baker’s testimony is inadmissible, and, therefore, exhibits Ex. 1002, Ex. 1003 and
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`all support presented in the Petition based on Ex. 1002 and Ex. 1003 served with
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`the Petition should be excluded.
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`Page 8 of 19
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`D. Petitioner, Its Counsel and Dr. Baker under the Penalty of Perjury
`Misrepresented That Dr. Baker Is Qualified in the “Pertinent Art” Several
`More Times
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`Petitioner also argued that “Patent Owner ignores other parts of the
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`Declaration which describe, for example, Dr. Baker’s education in Electrical
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`Engineering and experience in “circuit designs for networks and communications”
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`and “communications systems, and fiber optics.” See e.g., Ex. 1002 at ¶¶ 7-9.”
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`(See, Ex. 2021 at 6). As described below, these are two more blatant
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`misrepresentations by Petitioner, its Counsel and Dr. Baker under the penalty of
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`perjury regarding the relevance of “communications systems” and “fiber optics”.
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`The term “fiber optics” is used three times in Dr. Baker’s CV of 35 pages
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`(See, Ex. 1003 at 2 twice and at 16). All three of them refer to fiber optic devices
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`which have got nothing to do with “networks” or “interconnection networks” or
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`FPGAs.
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`Moreover, the term “communications” is used five times in Dr. Baker’s CV
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`of 35 pages (See, Ex. 1003 at 2, at 6 twice, at 23and at 26). None of the five of
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`them has anything to do with “networks” or “interconnection networks” or FPGAs.
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`In summary, Dr. Baker misrepresented his purported experience in
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`“networks” or “interconnection networks” for a “Field Programmable Gate Array
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`(“FPGA”)” which is the “pertinent art” in the current case. Accordingly, Dr.
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`Baker’s testimony is inadmissible. As a result, exhibits Ex. 1002, Ex. 1003 and all
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`Page 9 of 19
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`support presented in the Petition based on Ex. 1002 and Ex. 1003 served with the
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`Petition must be excluded.
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`E. Dr. Baker Made Several Key Errors in the Petition Due to His Lack of
`Expertise in the “Pertinent Art”.
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`The Curriculum Vitae of Dr. Baker (Ex. 1003) does not list a single
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`publication, or a course taught at UNLV or a granted patent in the design or
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`implementation of either networks or interconnection networks or Field
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`Programmable Gate Arrays.
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` Due to his lack of educational background or actual experience in the
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`pertinent art, Dr. Baker made three key errors in his declaration, which are
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`pivotal since the Board accepted Dr. Baker’s declaration under the penalty of
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`perjury (Paper 22 at 8). However, Dr. Baker lacks a basic understanding of
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`hypercube networks which is required for him to qualify as a POSITA having two
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`to three years of experience with interconnection networks, and thus Dr. Baker
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`failed to understand that hypercube networks with dimension zero have only one
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`node (or Block).
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`Hypercube networks of different dimensions (or degrees) are known and
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`understood by a person to qualify as a POSITA in the present case. Referring to
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`Computer Science Notes of the Graduate course “Parallel Computing” at Chapter 2
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`- Parallel Architectures and interconnection networks, by Prof. Stewart Weiss at
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`the City University of New York (Ex. 2006, at 5), Figure 2.5 illustrates hypercube
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`networks of dimensions 0, 1, 2 and 3. Also, refer to the second and third
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`paragraphs in Section 2.2.5 discussing the details of the hypercube networks in
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`Figure 2.5, as follows:
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`“To start, a single point can be thought of as a 0-cube. Suppose its label is 0.
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`Now suppose that we replicate this 0-cube, putting the copy at a distance of
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`one unit away, and connecting the original and the copy by a line segment of
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`length 1, as shown in Figure 2.5. We will give the duplicate node the label,
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`1. We extend this idea one step further. We will replicate the 1-cube, putting
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`the copy parallel to the original at a distance of one unit away in an
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`orthogonal direction, and connect corresponding nodes in the copy to those
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`in the original. We will use binary numbers to label the nodes, instead of
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`decimal. The nodes in the copy will be labeled with the same labels as those
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`of the original except for one change: the most significant bit in the original
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`will be changed from 0 to 1 in the copy, as shown in Figure 2.5. Now we
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`repeat this procedure to create a 3-cube: we replicate the 2-cube, putting the
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`copy parallel to the original at a distance of 1 unit away in the orthogonal
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`direction, connect nodes in the copy to the corresponding nodes in the
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`original, and relabel all nodes by adding another significant bit, 0 in the
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`original and 1 in the copy.”
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`See Ex. 2006, at 5.
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`Clearly, a hypercube network of dimension 0 has only one node and no
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`wires connected to any other nodes as there is only one node. Unlike Dr. Baker, a
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`POSITA with background and experience in interconnection networks,
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`specifically, in hypercube networks, would understand the amendment to claim 1
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`during the prosecution of the application for the ‘523 Patent by the Examiner.
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`Furthermore, the ‘523 Patent states that “Finally applicant notes that in each
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`quadrant or half the blocks are arranged as a general binary hypercube. Recursively
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`in larger multi-stage network
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` where N1 = N2 > 32, the layout
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`in this embodiment in accordance with the current invention, will be such that the
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`super-quadrants will also be arranged in d-ary hypercube manner. (In the
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`embodiment of the layout 100C of FIG. 1C, it is binary hypercube manner since d
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`= 2, in the network
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` 100B of FIG. 1B).” (Ex. 1001, at 48, 14:1-
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`9). Unlike Dr. Baker, a POSITA would understand that the 2D-layouts disclosed
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`for multi-stage networks in the ‘523 Patent are also applicable for a hypercube
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`network topology scheme of dimension zero with only one block comprising one
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`Page 12 of 19
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`stage, particularly as shown in FIG. 2A3 of the ‘523 Patent. However, since Dr.
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`Baker has no experience in interconnection networks he stated that he failed to
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`understand a topology with only one stage in the multi-stage network. (Ex. 1002
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`¶¶ 47-52). Instead, if Dr. Baker actually understood the difference between a
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`multi-stage network arranged in a hypercube topology of 2D-layout, it would
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`have been clear to him. This is the first error by Dr. Baker in his declaration.
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`Additionally, claim 8 of the ‘523 Patent is understood by a POSITA that
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`when y = 1, the length of the horizontal shuffle exchange links in the highest stage
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`(clearly since there is only one stage in one block, the lowest stage and highest
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`stage are the same) is equal to half the size of the horizontal size of said two
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`dimensional grid of sub-integrated circuit blocks (and since the size of horizontal
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`shuffle exchange links is zero, there are no horizontal shuffle exchange links) and
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`the length of the vertical shuffle exchange links in the highest stage (since there is
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`only one stage in one block, the lowest stage and highest stage are the same) is
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`equal to half the size of the vertical size of said two dimensional grid of sub-
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`integrated circuit blocks (and since the size of vertical shuffle exchange links is
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`zero, there are no vertical shuffle exchange links). Dr. Baker stated that he failed to
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`understand Claim 8 as well. (Ex. 1002 ¶ 59) However, claim 8 depends from claim
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`1 and further clarifies the meaning of one stage as shown in FIG. 2A3 of the ‘523
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`Patent. This is Dr. Baker’s second error in his declaration.
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`It is apparent to a POSITA that there is only one stage in the 2D-layout of a
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`multi-stage network disclosed in the ‘523 Patent when there is only one block in
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`the network with N = 2 as illustrated in FIG. 2A3. A POSITA would clearly
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`understand that in electrical engineering terms or mathematically it is a
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`fundamental case to describe the mathematical rigor or boundary conditions. Dr.
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`Baker’s statement that “undue” experimentation would be needed for a POSITA to
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`understand that when there is one stage there is only one block in a fundamental
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`case is simply wrong (Ex. 1002 ¶ 62). This is Dr. Baker’s third error in his
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`declaration.
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`In summary, because of the errors that he made in his declaration, Dr. Baker
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`lacks the necessary education and/or experience in the pertinent art to qualify as a
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`i.e., the field of “networks” or “interconnection networks” for a Field
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`Programmable Gate Array (“FPGA”), and the three errors committed by Dr. Baker
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`were pivotal for the institution of this IPR by the Board.
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`Accordingly Patent owner files this motion to exclude exhibits Ex. 1002, Ex.
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`1003 and all support presented in the Petition based on Ex. 1002 and Ex. 1003
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`Page 14 of 19
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`served with the Petition because Dr. Baker lacks qualification in the pertinent art
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`and his testimony is therefore inadmissible.
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`F. Dr. Baker Is the Only Witness in Support of the Petition.
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`According to his Curriculum Vitae, Dr. Baker has been an expert witness in
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`more than 85 cases, but none of them are in the “pertinent art” of “networks” or
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`“interconnection networks” or “Field Programmable Gate Array (“FPGA”)”
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`technology. Petitioner, its Counsel and Dr. Baker disingenuously submitted his
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`declaration in the Petition with misrepresentations of his qualifications as a
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`POSITA and several errors. Notably, Dr. Baker is the only declarant in support of
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`the Petition. Exhibits Ex. 1002, Ex. 1003 and all support presented in the Petition
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`based on Ex. 1002 and Ex. 1003 served with the Petition should be excluded due to
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`the inadmissibility of Dr. Baker’s testimony because he does not qualify in the
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`pertinent art.
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`IV. CONCLUSION
`
`In conclusion, Patent Owner respectfully requests the Board to grant this
`
`Motion to exclude, pursuant to 37 C.F.R. § 42.64, 37 C.F.R. § 42.11, and 37 C.F.R.
`
`§ 42.51(b)(iii). For the foregoing reasons, Ex. 1002, Ex. 1003 and all the support
`
`presented in the Petition based on Ex. 1002 and Ex. 1003 should be excluded.
`
`
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`
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`Page 15 of 19
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`
`
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`IPR2020-00260
`Patent 8,269,523
`
`
`
`
`Paper No. 25
`PO’s Motion to Exclude Evidence
`
`Date: August 10, 2020
`
`Respectfully submitted,
`
`
`
`
`
`/Venkat Konda/
`Venkat Konda
`Pro Se Counsel
`6278 Grand Oak Way
`San Jose, CA 95135
`
`
`
`Page 16 of 19
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`
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`IPR2020-00260
`Patent 8,269,523
`
`
`
`
`Paper No. 25
`PO’s Motion to Exclude Evidence
`
`CERTIFICATE OF SERVICE
`
`
`
`Pursuant to 37 C.F.R. § 42.6(e) and consent of the Petitioner, I certify that
`
`on August 10, 2020, a copy of Patent Owner’s Motion to Exclude Evidence was
`
`served on counsel of record for Petitioner by email to PH-FlexLogix-Konda-
`
`IPR@paulhastings.com
`
`
`
`Dated: August 10, 2020
`
`
`
`
`
`
`
`
`
`Respectfully submitted,
`
`
`
`/Venkat Konda/
`Venkat Konda
`Pro Se Counsel
`
`Certificates - Page 1 of 19
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