r
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`Under the Paperwork Reduction Act of 1995
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`Substitute for form 1449/PTO
`
`INFORMATION DISCLOSURE
`STATEMENT BY APPLICANT
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`\... Sheet
`
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`
`I of
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`PTO/SB/08a (07-09)
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`U.S. Patent and Trademark Office; U.S. DEPARTMENT OF COMMERCE
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`Complete if Known
`16/562,450 - GAU: 2464
`09-06-2019
`Venkat Konda
`
`"
`
`Application Number
`Filing Date
`First Named Inventor
`Art Unit
`Examiner Name
`Attorney Docket Number V-0060US
`
`~
`
`Pages, Columns, Lines, Where
`Relevant Passages or Relevant
`Figures Appear
`
`all FIGs
`
`all FIGs
`all FIGs
`
`all FIGs
`
`all FIGs
`
`all FIGs
`
`layout FIGs
`
`layout FIGs
`
`layout FIGs
`
`layout FIGs
`
`layout FIGs
`
`Pages, Columns, Lines,
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`Examiner
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`
`Document Number
`
`U.S. PATENT DOCUMENTS
`Publication Date
`Name of Patentee or
`MM-DD-YYYY
`Applicant of Cited Document
`
`Venkat Kanda
`
`Venkat Kanda
`Venkat Kanda
`
`Venkat Kanda
`
`Venkat Kanda
`
`Venkat Kanda
`
`09-18-2012
`11-25-2014
`12-27-2016
`09-18-2012
`05-01-2012
`01-29-2013
`02-06-2001
`Muthukrishnan et. al.
`09-06-2005 Wong
`09-19-1995
`Yang et. al.
`... - -- ---
`01-25-2000
`
`V
`
`...,..,
`
`..._,...,_
`
`Kenneth E. Batcher
`
`Shimon Even
`
`Change(
`s applied
`"nt,
`to docum
`/C.C.5
`-/
`l/26/20
`'L l
`
`1
`
`2
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`9
`
`10
`
`11
`
`12
`
`13
`
`14
`
`Number-Kind Code2 r;tknown;
`US- 8269523-b2
`US- 8898611-b2
`US- 9529958-b2
`US- 82704QQ-b2
`US- 81 70040-b2
`US- 8363649-b2
`US- 6185220-b1
`US- 6940308-b2
`US- 5451936
`US- 5153843 10/1992
`US- 6018523
`US-
`
`US-
`
`US-
`
`US-
`
`US-
`
`US-
`
`US-
`
`US-
`
`Examiner
`Initials*
`
`Cite
`No. 1
`
`Foreign Patent Document
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`Country Code 3 -Number 4 -Kind Code5 (if known)
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`FOREIGN PATENT DOCUMENTS
`Publication
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`/RASHEED GIDADO/
`08/03/2020
`*EXAMINER: Initial if reference considered, whether or not citation is in conformance with MPEP 609. Draw line through citation if not in conformance and not
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`/R.G/
`
`FLEX LOGIX EXHIBIT 1055 (Part 1 of 2)
`Flex Logix Technologies v. Venkat Konda
`IPR2020-00260
`
`Page 1 of 818
`
`

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`PARTB-FEE(S) TRANSMITTAL
`Complete and send this form, together with the applicable fee(s), by mail or fax, or via EFS-Web.
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`INS1RUCTIONS: Thisfurm should be used fur transmitting the ISSUE FEE andPUBLICA TIONFEE (ifrequired). Blocks I through5 shouldbecorrpleted where appropriate.
`All further correspondence including the Patent, advance orders and notification ofrmintenance fues will be rmiled to the current correspondence address as indicated unless
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`CURRENT CORRESPONDENCE ADDRESS (Note: Use Block I fur any change ofaddress)
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`By fax, send to:
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`(571) 273-2885
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`Kanda Technologies Inc
`6278 Grand Oak Way
`San Jose, CA 95135
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`Note: A certificate of rmiling can only be used fur doirestic rmilings of the
`Fee(s) Transmittal. This certificate cannot be used fur any other accorrpanying
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`Certificate of Mailing or Transmission
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`(Signature)
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`(Date)
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`APPLICATION NO
`16/562,450
`
`FILING DATE
`09-06-2019
`
`FIRST NAMED INVENTOR
`Venkat Konda
`
`ATTORNEY DOCKET NO
`V-0060US
`
`CONFIRMATION NO
`6438
`
`TITLE OF INVENTION:
`
`APPLN.TYPE
`
`ENTITY TATU
`
`UE FEE DUE
`
`PUBLI AT! NFEEDUE
`
`PREY.PAID I
`
`TAL FEE( ) DUE
`
`DATE DUE
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`Nonprovisional
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`SMALL
`
`$600
`
`$0
`
`$0
`
`$600
`
`02/18/2021
`
`EXAMINER
`
`ART UNIT
`
`CLASS-SUBCLASS
`
`I. Change of correspondence address or indication of" Fee
`Address" (37 CFR 1.363)
`D Change of correspondence address (or Change of
`Correspondence Address furmPTO/SB/122) attached.
`D" Fee Address" indication (or "Fee Address" Indication
`furm PTO/SB/47; Rev 03-09 or more recent)
`attached. Use of a Customer Number is required.
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`2. For printing on the patent front page, list
`(I) The naires ofup to 3 registered patent attorneys
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`(2) The naire of a single firm (having as a irenber
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`2.
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`ASSIGNEE NAME AND RESIDENCE DATA TO BE PRINTED ON 1HE PA TENT (print or type)
`PLEASE NOTE: Unless an assignee is identified below, no assignee data will appear on the patent. !fan assignee is identified below, the docuirent nust have been
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`(B) RESIDENCE: (CITY and STA TE or COUN1RY)
`(A) NAME OF ASSIGNEE
`Konda Technologies Inc.
`San Jose, CA
`
`Please check the appropriate assignee category or categories (will not be printed on the patent): D Individual D Corporation or other private group entity D Governirent
`0Issue Fee D PublicationFee (ifrequired) D Advance Order- # of Copies ________ _
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`4b. Method of Payirent (Please first reapply any previously paid fee shown above):
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`0Enclosed check D Non-electronic payirent by credit card (Attach furmPT0-2038)
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`5. Change of Entity Status (fromstatus indicated above)
`D Applicant certifying micro entity status. See 37 CFR 1.29.
`0 Applicant asserting srmll entity status. See 3 7 CFR 1.2 7.
`D Applicant changing to regular undiscounted fue status.
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`NOTE: Absent a valid Certification ofMicro Entity Status (see furms PTO/SB/15A and 15B), issue fue
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`NOTE: If the application was previously under micro entity status, checking this box will be taken as
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`NOTE: Checking this box will be taken as a notificationofloss ofentitleirent to srmll or micro entity
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`NOTE: This furm nust be signed in accordance with 3 7 CFR 1.3 I and 1.3 3. See 3 7 CFR 1.4 fur signature requireirents and certifications.
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`Authorized Signature
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`Typed or printed naire
`
`/Venkat Kanda/
`Venkat Konda
`
`Date 02-14-2021
`
`Registration No.
`
`PTOL-85 Part B (08-18) Approved furuse through 03/31/2023
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`0MB 0651-0033
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`USPTO becomes aware of a violation or potentia I violation of law or regulation.
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`

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`Electronic Patent Application Fee Transmittal
`
`Application Number:
`
`Filing Date:
`
`16562450
`
`06-Sep-2019
`
`Title of Invention:
`
`FAST SCHEDULING AND OPTMIZATION OF MULTI-STAGE HIERARCHICAL
`NETWORKS
`
`First Named Inventor/Applicant Name:
`
`Venkat Kanda
`
`Filer:
`
`Attorney Docket Number:
`
`Filed as Small Entity
`
`Filing Fees for Utility under 35 USC 111 (a)
`
`Venkat Kanda
`
`V-0060US
`
`Description
`
`Fee Code
`
`Quantity
`
`Amount
`
`Sub-Total in
`USO($)
`
`Basic Filing:
`
`Pages:
`
`Claims:
`
`Miscellaneous-Filing:
`
`Petition:
`
`Patent-Appeals-and-Interference:
`
`Post-Allowance-and-Post-Issuance:
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`UTILITY APPL ISSUE FEE
`
`2501
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`1
`
`600
`
`600
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`Page 4 of 818
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`

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`Description
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`Fee Code
`
`Quantity
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`Amount
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`Sub-Total in
`USO($)
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`Extension-of-Time:
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`Miscellaneous:
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`Total in USO($)
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`600
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`Page 5 of 818
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`Electronic Acknowledgement Receipt
`
`EFSID:
`
`Application Number:
`
`41920445
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`16562450
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`International Application Number:
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`Confirmation Number:
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`6438
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`Title of Invention:
`
`FAST SCHEDULING AND OPTMIZATION OF MULTI-STAGE HIERARCHICAL
`NETWORKS
`
`First Named Inventor/Applicant Name:
`
`Venkat Kanda
`
`Customer Number:
`
`38139
`
`Filer:
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`Venkat Kanda
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`Filer Authorized By:
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`Attorney Docket Number:
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`V-0060US
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`ptol85b-V0060.pdf
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`fee-info.pdf
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`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONERFORPATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`www.uspto.gov
`
`APPLICATION NO.
`
`FILING DATE
`
`FIRST NAMED INVENTOR
`
`ATTORNEY DOCKET NO.
`
`CONFIRMATION NO.
`
`16/562,450
`
`09/06/2019
`
`Venkat Konda
`
`V-0060US
`
`6438
`
`7590
`38139
`Konda Technologies, Inc
`6278 GRAND OAK WAY
`SAN JOSE, CA 95135
`
`02/08/2021
`
`EXAMINER
`
`GIDADO, RASHEED
`
`ART UNIT
`
`PAPER NUMBER
`
`2464
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`02/08/2021
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
`following e-mail address(es):
`
`venkat@kondatech.com
`vkonda@gmail.com
`
`PTOL-90A (Rev. 04/07)
`
`Page 8 of 818
`
`

`

`Response to Rule 312 Communication
`
`Application No.
`
`Applicant(s)
`
`16/562,450
`
`Examiner
`
`Konda, Venkat
`
`Art Unit AIA (FITF) Status
`
`RASHEED GI DADO
`
`2464
`
`Yes
`
`-- The MAILING DA TE of this communication appears on the cover sheet with the correspondence address --
`
`1. ~The amendment filed on 21 January 2021 under 37 CFR 1.312 has been considered, and has been:
`a) ~ entered.
`
`b) D entered as directed to matters of form not affecting the scope of the invention.
`
`c) D disapproved because the amendment was filed after the payment of the issue fee.
`Any amendment filed after the date the issue fee is paid must be accompanied by a petition under 37 CFR 1.313(c)(1)
`
`and the required fee to withdraw the application from issue.
`
`d) D disapproved. See explanation below.
`
`e) D entered in part. See explanation below.
`
`/RASHEED GIDADO/
`Primary Examiner, Art Unit 2464
`
`U.S. Patent and Trademark Office
`PTOL-271 (Rev. 04-01)
`
`Reponse to Rule 312 Communication
`
`Part of Paper No. 20210202
`
`Page 9 of 818
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`

`

`Electronic Acknowledgement Receipt
`
`EFSID:
`
`Application Number:
`
`41819578
`
`16562450
`
`International Application Number:
`
`Confirmation Number:
`
`6438
`
`Title of Invention:
`
`FAST SCHEDULING AND OPTMIZATION OF MULTI-STAGE HIERARCHICAL
`NETWORKS
`
`First Named Inventor/Applicant Name:
`
`Venkat Kanda
`
`Customer Number:
`
`38139
`
`Filer:
`
`Venkat Kanda
`
`Filer Authorized By:
`
`Attorney Docket Number:
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`V-0060US
`
`Receipt Date:
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`Filing Date:
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`Time Stamp:
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`03-FEB-2021
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`06-SEP-2019
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`

`

`Information:
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`217256
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`Application Number: 16/562,450
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`Art Unit: 2464
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`AMENDMENT AFTER ALLOWANCE UNDER RULE 312
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`In 'Ine Vnitetf States <Patent .JI.ntf 'I'ratfemar{ Office
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`Application Number: 16/562,450
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`Application Filed: 9/6/2019
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`5 Applicant(s):
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`Venkat Konda
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`Title:
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`Fast Scheduling and Optimization of Multi-stage Hierarchical Networks
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`Examiner/ Art Unit: Rasheed Gidado / 2464
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`10
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`AMENDMENT AFTER ALLOWANCE UNDER RULE 312
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`San Jose, 2020 February 3, Wed
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`Mail Stop Amendment
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`Commissioner for Patents
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`P.O. Box 1450
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`15 Alexandria, Virginia, 22313-1450
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`Dear Sir/Madam:
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`This replies to the Notice of Allowance and Fee(s) Due from the United States
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`Patent and Trademark Office mailed on November 18, 2020 in connection with the
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`20
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`above-identified patent application. Pursuant to Rule 312, applicant respectfully requests
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`that the above application be amended as follows:
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`Page 12 of 818
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`Application Number: 16/562,450
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`Art Unit: 2464
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`AMENDMENT AFTER ALLOWANCE UNDER RULE 312, Contd.
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`Amendments to the Claims:
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`Applicant sincerely acknowledges the allowance of claims 1 - 20 with appreciation.
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`Claims: Claims 1 - 20 are amended to clarify and they do not change the scope of the
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`5
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`previously allowed claims:
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`-2-
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`Page 13 of 818
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`Application Number: 16/562,450
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`Art Unit: 2464
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`AMENDMENT AFTER ALLOWANCE UNDER RULE 312, Contd.
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`Claims
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`What is claimed is:
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`1.
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`(Currently Amended): A multi-stage hierarchical network comprisinK
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`a plurality of partial multi-stage networks, each partia-1 multi stage network of said
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`5
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`plurality of partia-1 multi stage netv10rks comprising a plurality of inlet links and a
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`plurality of outlet links.,_;-and said plurality of partial multi-stage networks arranged in a
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`two-dimensional grid efhaving a plurality of rows and a plurality of columns; and
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`each partial multi-stage network of said plurality of partial multi-stage networks .further
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`comprising one or more slices, each slice of said one or more slices .further comprising
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`10
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`one or more rings, each ring of said one or more rings .further comprising y stages, where
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`y 2 2; and
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`each stage of said y stages comprising at least one switch of size d, x d 0 , where d, 2 2
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`and d0 2 2 .,_ and each switch of said at least one switch of size d, x d 0 having d,
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`incoming links and d 0 outgoing links;-and.,_ each switch of said at least one switch of size
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`15
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`d, x d 0 .further comprising a plurality of multiplexers of size d 2 2 with each multiplexer
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`of said plurality of multiplexers comprising d inputs and one output; and
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`wherein said at least one switch of size d, x d 0 comprises either only one of a) a forward
`switch, or only a backward switch, or hl both a forward switch and a bachvard U-tum
`switch, Bf f) a forward switch, a backward switch and£!: U-tum switch, or a fonvard
`switch, a bachvard switch and a U turn switch without 180 degree tum paths or ill. a
`forward switch, a backward switch, a U-tum switch and a reverse U-tum switch Bf~ a
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`20
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`forward switch, a backward switch, a U-tum switch and a reverse U-tum switch without
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`+w 180-degree tum paths, or an integrated switch of a forward switch, a bachvard
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`s1tvitch and U tum switch, or an integrated switch of a forward switch, a backward switch
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`25
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`and a U tum switch without 180 degree tum paths or an integrated switch of a forward
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`switch, a backward switch, a U tum switch and a reverse U turn switch or and f) an
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`-3-
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`Page 14 of 818
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`Application Number: 16/562,450
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`Art Unit: 2464
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`AMENDMENT AFTER ALLOWANCE UNDER RULE 312, Contd.
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`integrated switch et'comprising a forward switch, a backward switch, a U-tum switch and
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`a reverse U-tum switch without-l-&G 180-degree tum paths; and
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`wherein said d, incoming links and said d 0 outgoing links comprise comprises a
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`plurality of one or more internal connections and a plurality of one or more hop wires;
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`5 M€l where said pllH'ality of one or more hop wires further comprising comprise a pllH'ality
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`et' one or more internal hop wires or a plurality of one or more external hop wires; and
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`wherein each outlet link of said plurality of outlet links is connected to the output of£!:
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`first multiplexer ene of said plurality of multiplexers of a first ene switch of said at least
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`one switch of size d, x d 0 of a first ene stage of said y stages of a first ene partial multi-
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`10
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`stage network of said plurality of partial multi-stage networks, and each inlet link of said
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`plurality of inlet links is connected to one of the a first input of said d inputs of one or
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`more multiplexers of said plurality of multiplexers of one or more -saHi switches of said at
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`least one switch of size d, x d 0 of one or more -saHi stages of said y stages of one or
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`more partial multi-stage networks of said plurality of partial multi-stage networks; and
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`15
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`wherein a first partial multi-stage network of said plurality of partial multi-stage networks
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`comprising comprises one of a) a the same number Bf and b) a different number of said
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`plurality of inlet links as a second partial multi-stage network of said plurality of partial
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`multi-stage networks~ and a first partial multi-stage network of said plurality of partial
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`multi-stage networks comprising comprises one of a) a the same number Bf and b) a
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`20
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`different number of said plurality of outlet links as a second partial multi-stage network
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`of said plurality of partial multi-stage networks; a first partial multi-stage network of said
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`plurality of partial multi-stage networks comprising comprises one of a) a the same
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`number Bf and b) a different number of said one or more slices as a second partial multi(cid:173)
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`stage network of said plurality of partial multi-stage networks; a first slice of said one or
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`25 more slices comprising comprises one of a) a the same number Bf and b) a different
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`number of said one or more rings as a second slice of said one or more slices; a first ring
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`of said one or more rings comprising comprises one of a) a the same number Bf and b) a
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`different number of said y stages as a second ring of said one or more rings; and a first
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`stage of said y stages comprising comprises one of a) a the same number Bf and b) a
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`-4-
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`Page 15 of 818
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`Application Number: 16/562,450
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`Art Unit: 2464
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`AMENDMENT AFTER ALLOWANCE UNDER RULE 312, Contd.
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`different number of said at least one switch of size d, x d 0 as a second stage of said y
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`stages; a first switch of said at least one switch of size d, x d 0 is one of a) a the same size
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`Bf and b) a different size as a second switch of said at least one switch of size d, x d 0 ; and
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`a first multiplexer in said plurality of multiplexers of size d 2 2 is one of a) a the same
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`5
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`size Bf and b) a different size as a second multiplexer in said plurality of multiplexers of
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`size d 2 2 ; and
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`wherein each internal connection of said plurality of one or more internal connections
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`connected from the output of a first multiplexer of said plurality of multiplexers of a first
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`switch of said at least one switch of size d, x d 0 of a first stage of said y stages of a first
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`10
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`ring of said one or more rings to a first input of said d inputs of a second multiplexer of
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`said plurality of multiplexers of a second switch of said at least one switch of size d, x d 0
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`of a second stage of said y stages of the first ring of said one or more rings; and
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`wherein each internal hop wire of said plurality of one or more internal hop wires is
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`connected from the output of a multiplexer of said plurality of multiplexers of a switch of
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`15
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`said at least one switch of size d, x d 0 of a stage of said y stages of a first ring of said
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`one or more rings of a first slice of said one or more slices to a first input of said d inputs
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`of one or more multiplexers of said plurality of multiplexers of one or more switches of
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`said at least one switch of size d, x d 0 of one or more stages of said y stages of one or
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`more rings different from the first ring of said one or more rings of the -same first slice of
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`20
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`said one or more slices; and
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`wherein each external hop wire of said pllH'ality of one or more external hop wires is
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`connected from the output a multiplexer of said plurality of multiplexers of a switch of
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`said at least one switch of size d, x d 0 of a stage of said y stages of a ring of said one or
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`more rings of a slice of said one or more slices of a first partial multi-stage network of
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`25
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`said plurality of partial multi-stage networks to an input of said d inputs of one or more
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`multiplexers of said plurality of multiplexers of one or more switches of said at least one
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`switch of size d, x d 0 of one or more stages of said y stages of said one or more rings of
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`a slice of said one or more slices of one or more partial multi-stage networks different
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`-5-
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`Page 16 of 818
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`Application Number: 16/562,450
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`Art Unit: 2464
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`AMENDMENT AFTER ALLOWANCE UNDER RULE 312, Contd.
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`from the first partial multi-stage network of said plurality of partial multi-stage networks;
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`and
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`wherein one or more external hop wires of said pllH'a-lity of one or more external hop
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`wires are eithef one of a) connected between one or more multiplexers of said plurality of
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`5 multiplexers of one or more switches of said at least one switch of size d, x d 0 in same
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`numbered stages of said y stages in three or more partial multi-stage networks of said
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`plurality of partial multi-stage networks (hereinafter "multi-drop hop wires") Bf and b)
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`connected between one or mo