United States Patent (19)
`Kishita et al.
`
`USOO584751.6A
`Patent Number:
`11
`(45) Date of Patent:
`
`5,847,516
`Dec. 8, 1998
`
`54 ELECTROLUMINESCENT DISPLAY DRIVER
`DEVICE
`
`75 Inventors: Hiroyuki Kishita, Kariya; Masahiko
`Osada, Hekinan; Hiroaki Himi,
`Nagoya, Nobuei Ito, Chiryu; Tadashi
`Hattori, Okazaki; Hideki Saito, Kariya,
`all of Japan
`73 Assignee: Nippondenso Co., Ltd., Kariya, Japan
`
`21 Appl. No.: 675,672
`22 Filed:
`Jul. 3, 1996
`30
`Foreign Application Priority Data
`Jul. 4, 1995
`JP
`Japan .................................... 7-168822
`Aug. 11, 1995
`JP
`Japan ...
`Aug. 11, 1995
`JP
`Japan .................................... 7-206345
`51
`Int. Cl. ................................ G09G 3/12; G09G 3/30
`52 U.S. Cl. ..................................... 315/169.3; 315/169.1;
`345/204; 345/209; 34.5/76; 34.5/79
`58 Field of Search .............................. 315/169.1, 169.3;
`345/76, 95, 210, 211, 79, 204, 209, 208
`References Cited
`
`56)
`
`U.S. PATENT DOCUMENTS
`4,864,182 9/1989 Fujioka et al........................ 315/169.3
`4,999,618 3/1991 Inada et al. ...................... 315/169.3 X
`
`FOREIGN PATENT DOCUMENTS
`Japan .
`Japan .
`Japan .
`Japan .
`Japan ....................................... 345/76
`Japan .
`Japan .
`
`8/1985
`60-147790
`5/1989
`1-121897
`3-129698 6/1991
`3-181987 8/1991
`405333815. A 12/1993
`5-333815 12/1993
`7-31483 4/1995
`
`Primary Examiner Arnold Kinkead
`Attorney, Agent, or Firm- Pillsbury Madison & Sutro LLP
`57
`ABSTRACT
`A scan driver IC for an EL element in an EL display device
`Supplies, in a positive field, a positive polarity Scan Voltage
`and an offset Voltage which is higher than ground to Scan
`Side driver ICs from Voltage Supply circuits, and the Scan
`side driver ICs set voltage of scan electrodes to be the offset
`Voltage in the positive field, together with outputting the
`positive polarity Scan Voltage to the Scan electrodes during
`electroluminescence timing. Consequently, a Voltage of
`Vr-Vim is applied to the scan side driver ICs, and so the
`breakdown Voltage can be lowered by an amount corre
`sponding to the offset Voltage Vm. Circuits for providing
`Such voltages, for providing alternating current drive
`Voltages, and for reducing power consumption of the drive
`circuits are also disclosed.
`
`12 Claims, 11 Drawing Sheets
`
`---------- i. 6, 7
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`DATA SIDE
`DRIVER
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`DATA SIDE DRIVER
`IC SIGNALS
`-- 2, 3
`
`SCANSIDE
`DRIVER
`I C
`
`i
`
`SCAN SDE DRVER
`IC SIGNALS
`
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`U.S. Patent
`
`Dec. 8, 1998
`
`Sheet 1 of 11
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`5,847,516
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`F. G. 1
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`Dec. 8, 1998
`Sheet 2 of 11
`F. G. 2
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`2ND INSULLAYER
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`5,847,516
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`U.S. Patent
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`SUPPLY
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`U.S. Patent
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`Dec. 8, 1998
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`Sheet 3 of 11
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`5,847,516
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`POS. FIELD
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`NEG. FIELD
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`U.S. Patent
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`Dec. 8, 1998
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`Sheet 4 of 11
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`5,847,516
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`U.S. Patent
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`Dec. 8, 1998
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`Sheet 5 of 11
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`5,847,516
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`U.S. Patent
`
`Dec. 8, 1998
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`Sheet 6 of 11
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`5,847,516
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`
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`FG.6A 20
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`F. G.6B 301
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`U.S. Patent
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`Dec. 8, 1998
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`Sheet 7 of 11
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`5,847,516
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`F. G. 1 O
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`U.S. Patent
`
`Dec. 8, 1998
`
`Sheet 8 of 11
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`5,847,516
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`F. G. 12
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`+TERM.
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`F. G.15 PRIOR ART
`–
`705
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`U.S. Patent
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`Dec. 8, 1998
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`Sheet 9 of 11
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`5,847,516
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`F. G.13
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`U.S. Patent
`
`Dec. 8, 1998
`
`Sheet 10 of 11
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`5,847,516
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`
`
`FIRST FELD
`
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`U.S. Patent
`
`Dec. 8, 1998
`
`Sheet 11 of 11
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`5,847,516
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`s
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`SECOND FELD
`
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`

`

`1
`ELECTROLUMNESCENT DISPLAY DRIVER
`DEVICE
`
`5,847,516
`
`2
`Also, driving the above-described prior art device, elec
`trical charging and discharging with respect to the EL
`display panel is performed at each Scan line electrolumines
`cence operation, and there exists a problem wherein drive
`power consumption per cycle becomes large.
`The device disclosed in Japanese Patent Publication Laid
`Open No. 63-168998 attempts to solve this problem. After
`an EL element has emitted light, accumulated charge is
`Stored in a capacitor provided externally, and this accumu
`lated charge is re used during Subsequent
`electroluminescence, thereby reducing power consumption.
`As shown in FIG. 15, this circuit includes a data voltage
`Supply circuit 7 having a charge collection capacitor 701,
`Switching elements 702 through 704, and diodes 705 and
`706, and Vm/2 is utilized as the power source voltage. The
`size of the charge collection capacitor 701 is sufficiently
`large in comparison with the charge capacity of the entirety
`of the EL display panel, and a charge equivalent to Vm/2 is
`charged therein as an initial State.
`Operation of this device will be described hereinafter with
`reference to the graphs shown in FIGS. 16A-16F.
`In the Second field, when performing drive for a prede
`termined scan line, firstly the Switching element 704 is
`Switched on as shown in FIG. 16C, a P-channel FET
`connected to a data electrode of an EL element to emit light
`is switched on and a corresponding N-channel FET is
`Switched off as shown in FIGS. 16D and 16E, and voltage
`Vm/2 is applied to the data electrode as shown in FIG. 16F.
`Next, the Switching element 702 is switched on as shown
`in FIG. 16A, voltage Vm being power source voltage Vm/2
`with Vm/2 corresponding to a capacitor charge added
`thereto is applied to the data electrode of the EL element to
`emit light, and the EL element emits light. Subsequent to this
`electroluminescence operation, the Switching elements 702
`and 704 are switched off, and approximately half of the
`charge output from the P-channel FET of the data side driver
`IC 4 is collected via the diode 705 in the charge collection
`capacitor 701.
`The collected charge is consumed when Switching on the
`Switching element 704 in the Subsequent Scan line Selection
`period. This operation is repeated until the final line.
`However, Structure and operation of the charge collection
`capacitor 701 of the above-described device are complex,
`and there are problems where applied Voltage at the time of
`the next Scan line Selection is affected by an amount of
`accumulated capacitor charge and is unstable, and So on.
`SUMMARY OF THE INVENTION
`In light of the foregoing problems, it is an object of the
`present invention to provide a drive circuit that is able to
`drive an EL element, where the drive circuit for the EL
`element has a low breakdown Voltage.
`To attain the above-described object, an EL display device
`according to a first aspect of the present invention applies a
`Scan Voltage having a differing polarity with each positive
`and negative field to drive an EL display where the Scan
`Voltage includes, in a positive field, a positive polarity Scan
`Voltage and a first offset Voltage which is higher than ground
`level to a Scan electrode drive circuit from a voltage Supply
`circuit, and the Scan electrode drive circuit Sets the Voltage
`of a Scan electrode to be the first offset Voltage in the positive
`field, together with outputting the positive polarity Scan
`Voltage to the Scan electrode during electroluminescence
`timing.
`Consequently, because Voltage Supplied to the Scan elec
`trode drive circuit can be lowered by an amount correspond
`
`15
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`35
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`25
`
`CROSS-REFERENCE TO RELATED
`APPLICATION
`The present application is related to and claims priority
`from Japanese Patent Application Nos. Hei. 7-168822,
`7206344 and 7-206345, incorporated herein by reference.
`BACKGROUND OF THE INVENTION
`1. Field of the Invention
`This invention relates to a circuit for driving an electrolu
`minescent (EL) display device.
`2. Description of Related Art
`A device disclosed in Japanese Patent Application Laid
`Open Publication No. Hei 5-333815 is known as a circuit for
`driving an EL display.
`According to this device, EL elements in the display are
`arranged in a matrix and a Scan side driver IC and data Side
`driver IC are respectively provided on a Scan Side and data
`Side of the display elements. Accordingly, drive Voltage
`pulses having a differing polarity with each positive and
`negative field are applied to the EL elements by the respec
`tive driver ICs and the EL elements emit light.
`That is to say, in the positive field, a ground voltage (OV)
`is taken to be a reference Voltage and a Voltage Vr corre
`sponding to an EL drive Voltage is output to a Scan electrode
`of the EL display from the scan side driver IC, and from the
`data Side driver IC, the ground Voltage is output to the EL
`element So that it emits light, a modulation Voltage Vm is
`output to a data electrode of an EL element to put it in a
`non-electroluminescent State, Voltage of the data electrode is
`grounded with respect to the Scan electrode to which the
`Voltage Vr has been output, the Vir Voltage is applied to the
`EL element, and the EL element emits light.
`Additionally, in the negative field, ground Voltage (OV) is
`taken to be a reference Voltage and a Voltage of -Vr+Vm is
`output to the Scan electrode from the Scan Side driver IC, and
`from the data side driver IC, the modulation voltage Vm is
`output to the EL element So that it emits light, the ground
`Voltage is output to a data electrode of an EL element to put
`it in a non-electroluminescent State, Voltage of the data
`electrode is Set at the modulation Voltage Vm with respect to
`the scan electrode to which voltage of -Vr+Vm has been
`45
`output, -Vr Voltage is applied to the EL element, and the EL
`element emits light.
`In a case wherein drive Such as the foregoing is
`performed, the power Source Voltages of the Scan Side driver
`IC becomes Vr and ground Voltage when driving in the
`positive field, and So the Voltage Vr is applied to the Scan
`Side driver IC, and consequently the breakdown voltage
`thereof must be Vr or higher. Because the EL element is
`driven at a comparatively high Voltage which becomes, for
`example, approximately 260 V, a device with high break
`down voltage as the Scan side driver IC becomes necessary.
`Because a general purpose driver IC does not have Such a
`high breakdown Voltage, it is necessary to Specially design
`a high breakdown voltage driver IC which has a high
`breakdown Voltage to Satisfy the above requirements, and
`this causes problems in terms of integration and cost. These
`considerations also apply to the data Side driver Side IC.
`Further, when the rear electrode has been grounded and a
`positive and negative alternating current Signal is applied to
`the transparent electrode, two types of positive and negative
`power Sources normally become necessary, and power
`Source circuitry becomes large.
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`3
`ing to the first offset Voltage relative to prior art devices, the
`necessary breakdown Voltage of the Scan electrode drive
`circuit can be reduced.
`Preferably, the circuit Supplies a modulation Voltage to Set
`electroluminescence/non-electroluminescence of an EL ele
`ment and a Second offset Voltage which is higher than
`ground level to a data electrode drive circuit, where the data
`electrode drive circuit, in the negative field, with respect to
`a data electrode of an EL element in an electroluminescent
`State, Sets Voltage thereof at the modulation Voltage, and
`with respect to a data electrode of an EL element in a
`non-electroluminescent State, Sets Voltage thereof at the
`Second offset Voltage.
`Consequently, because Voltage Supplied to the data elec
`trode drive circuit can be lowered by an amount correspond
`ing to the Second offset Voltage than in a device according
`to the prior art, the necessary breakdown voltage of the data
`electrode drive circuit can be reduced.
`Such a circuit need not be limited to use with matrix-type
`EL displays and may also be used in EL display devices
`which perform Segmented display, backlighting or the like.
`It is another object of the present invention to provide an
`EL display drive circuit which uses a Single power Source to
`apply a positive and negative alternating current Voltage to
`an EL element when outputting alternating current Voltage to
`a load Such as an EL element or the like, without employing
`two types of positive and negative power Sources.
`This object is attained according to another aspect of the
`invention by providing a first Switching device to open and
`close a connection between a positive electrode of a power
`Source and a first reference Voltage and a Second Switching
`device to open and close a connection between a negative
`electrode of the power Source and a Second reference Voltage
`to be alternatively actuated in accordance with a control
`Signal, and further to Select a Voltage of the power Source
`positive electrode and negative electrode and to perform
`output for driving a load.
`Because of this, Voltage of negative polarity with a
`magnitude of the first reference Voltage is created by the
`negative electrode of the power Source when the first Switch
`ing device has been actuated, and Voltage of positive polarity
`with a magnitude of the Second reference Voltage is created
`by the positive electrode of the power source when the
`Second Switching device has been actuated.
`Consequently, by Selecting and outputting the created
`Voltage, an alternating current Signal is output and a load
`such as an EL element or the like can be driven by the
`output.
`It is another object of the present invention to provide a
`circuit to perform charge collection and rise in Voltage to at
`least two stages, and moreover, to Stabilize the applied
`Voltage at a time of collected charge reuse without being
`affected by an amount of accumulated capacitor charge.
`This object is attained according to another aspect of the
`present invention by providing a circuit in which charging of
`an EL display element by a charge collected by a charge
`collecting capacitor is performed and a predetermined Volt
`age is applied to the EL display element prior to electrolu
`minescence drive for the EL display element, and thereafter,
`during electroluminescence drive, power Source Voltage
`(modulation Voltage) is applied directly to the EL display
`element and a Voltage rise is performed, and electrolumi
`neScence drive of the EL display element is performed.
`Subsequently to electroluminescence drive, charge Stored in
`the EL display element is collected in the capacitor for
`charge collecting use.
`
`4
`Consequently, by Structuring the device So that power
`Source Voltage (modulation voltage) is applied directly to the
`EL display element and a Voltage rise is performed during
`electroluminescence drive, no need exists to create Voltage
`corresponding to a power Source Voltage positive capacitor
`charging, and So the Structure of a circuit for this purpose can
`be simplified, and moreover, applied Voltage at a time of
`collected charge reuse can be Stabilized without being
`affected by an amount of accumulated capacitor charge by
`directly applying a power Source Voltage.
`Other objects and features of the invention will appear in
`the course of the description thereof, which follows.
`
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`BRIEF DESCRIPTION OF THE DRAWINGS
`Additional objects and advantages of the present inven
`tion will be more readily apparent from the following
`detailed description of preferred embodiments thereof when
`taken together with the accompanying drawings in which:
`FIG. 1 is a Schematic diagram of an EL display device
`drive circuit according to a first preferred embodiment of the
`present invention;
`FIG. 2 is a cross-sectional view showing the Structure of
`an EL element;
`FIGS. 3A-3M are timing diagrams for the device shown
`in FIG. 1;
`FIG. 4 is a Schematic diagram showing a specific structure
`of a Voltage Supply circuit according to the first embodi
`ment,
`FIG. 5 is a schematic diagram of an EL display device
`according to a Second preferred embodiment of the present
`invention;
`FIGS. 6A-6C are timing diagrams showing the operation
`of the device shown in FIG. 5;
`FIG. 7 is a block diagram of a third preferred embodiment
`of the present invention used for driving a Segmented EL
`display;
`FIG. 8 is a block diagram showing a fourth preferred
`embodiment of the present invention as used in a backlight
`EL display;
`FIG. 9 is a drive waveform diagram of the embodiment
`shown in FIG. 8:
`FIG. 10 is a Schematic diagram of a data Voltage Supply
`circuit according to a fifth preferred embodiment of the
`present invention;
`FIGS. 11A-11E are timing diagrams of drive signals in
`the fifth embodiment;
`FIG. 12 is a Schematic diagram of an output circuit in the
`fifth embodiment;
`FIG. 13 is a schematic diagram of an EL display element
`drive circuit according to a sixth embodiment of the present
`invention;
`FIGS. 14A-14O are timing diagrams of drive signals in
`the sixth embodiment;
`FIG. 15 is a schematic diagram of a prior art drive circuit;
`and
`FIGS. 16A-16F are timing diagrams of drive signals in
`the prior art circuit.
`DETAILED DESCRIPTION OF THE
`PRESENTLY PREFERRED EXEMPLARY
`EMBODIMENTS
`FIG. 2 shows a typical cross-sectional Structure of an EL
`display. An EL element 100 is formed by laminating on a
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`glass Substrate 101 the following: a transparent electrode
`102, a first insulating layer 103, a light emitting layer 104,
`a second insulating layer 105, and a rear electrode 106, and
`emits light responsive to an alternating current pulse applied
`between the transparent electrode 102 and the rear electrode
`106. Accordingly, in FIG. 2, light is emitted through this
`glass substrate 101. Further, light can be emitted in both the
`upper and lower directions in the drawing when the rear
`electrode 106 is transparent.
`FIG. 1 shows an overall structure of an EL display device
`according to a first embodiment of the present invention. In
`this Figure, an EL display panel 1 has a plurality of trans
`parent electrodes and back electrodes in columns and rows
`as Scan electrodes and data electrodes, and is structured to
`perform matrix display.
`In Specific terms, as shown in FIG. 1, odd-numbered Scan
`electrodes 201, 202, 203, etc. and even-numbered scan
`electrodes 301, 302, etc. are formed along the column
`direction of the display, and data electrodes 401, 402, 403,
`etc. are formed along the row direction of the display 1.
`EL elements 111, 112, etc. are formed as pixels at inter
`Sections of the Scan electrodes 201, 301, 202, 302, etc. and
`the data electrodes 401, 402, 403, etc. The EL elements are
`capacitive elements and are represented by capacitor Sym
`25
`bols in the Figure.
`Scan side driver ICs 2 and 3 and a data side driver IC 4
`are provided to perform display drive for this EL display
`panel 1.
`The scan side driver IC 2 is a push-pull type drive circuit
`having P-channel FETs 21a, 22a, etc. and N-channel FETs
`21b, 22b, etc. connected to the odd-numbered Scan elec
`trodes 201, 202, etc. and applies Scan voltage to the odd
`numbered scan electrodes 201, 202, etc. in accordance with
`output from a control circuit 20.
`Additionally, parasitic diodes 21c, 21d, 22c, 22d, etc. are
`formed in each of the FETs 21a, 21b, 22a, 22b, etc. to
`establish the Voltage of the Scan electrodes at a desired
`reference Voltage.
`The Scan Side driver IC 3 has a similar structure, having
`a control circuit 30, P-channel FETS 31a, 32a, etc. and
`N-channel FETs 31b,32b, etc. and supplies scanning voltage
`to the even-numbered scan electrodes 301, 302, etc.
`The data side driver IC 4 also has a control circuit 40,
`P-channel FETs 41a, 42a, etc. and N-channel FETS 41b,
`42b, etc. and Supplies data Voltage to the data electrodes 401,
`402, 403, etc.
`Scan Voltage Supply circuits 5 and 6 are provided to
`Supply Scan Voltages to the Scan Side driver ICS 2 and 3. The
`Scan Voltage Supply circuit 5 has Switching elements 51 and
`52 and, in accordance with on/off States thereof, Supplies a
`DC voltage Vr or ground to a P-channel FET source side
`common line L1 in the Scan side driver ICs 2 and 3.
`The Scan Voltage Supply circuit 6 has Switching elements
`61 and 62 and, in accordance with on/off states thereof,
`Supplies a direct current Voltage -Vr+Vm or an offset
`voltage Vo to an N-channel FET Source side common line
`L2 in the scan side driver ICs 2 and 3. According to this
`embodiment, Vo is taken to be a modulation Voltage Vm,
`and so will be described as Vm hereinafter.
`Additionally, a data Voltage Supply circuit 7 is provided
`with respect to the data side driver IC 4. The data voltage
`Supply circuit 7 Supplies a direct current Voltage Vm to a
`P-channel FET source side common line of the data side
`driver IC 4 and Supplies a ground Voltage to an N-channel
`FET source side common line of the data side driver IC 4.
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`According to the above-described Structure, it is neces
`Sary to apply an alternating current pulse Voltage between
`the Scan electrode and the data electrode So that the EL
`element emits light, and because of this, a pulse Voltage
`whose polarity reverses in each field is provided at each of
`the Several Scan lines to drive the display. Operation in
`positive and negative fields will be described hereinafter
`with reference to the timing diagrams shown in FIGS.
`3A 3M.
`In the positive portion of the field, the Switching elements
`51 and 62 are Switched on, and the Switching elements 52
`and 61 are switched off. At this time, the reference voltage
`of the Scan electrodes 201, 301, 202, 302, etc. becomes
`offset Voltage Vm due to operation of the parasitic diodes of
`the FETs of the scan side driver ICs 2 and 3. Additionally,
`the FETs 41a, 42a, 43a, etc. of the data side driver IC 4 are
`Switched on, and Voltage of the data electrodes is Vm. In this
`State, Voltage applied to all EL elements becomes 0 V, and
`So the EL elements do not emit light.
`Thereafter, electroluminescence operation in the positive
`field is started. Firstly, the P-channel FET 21a of the scan
`side driver IC 20 connected to the scan electrode 201 of the
`first column is Switched on, and Voltage of the Scan electrode
`201 is set to Vr. Additionally, output stage FETs of the scan
`Side driver ICS2 and 3 connected to other Scan electrodes are
`all Switched off, and these Scan electrodes enter a floating
`State.
`Additionally, among the data electrodes 401, 402, 403,
`etc., a P-channel FET of the data side driver IC 4 connected
`to a data electrode of an EL element to emit light is Switched
`off and an N-channel FET thereof is Switched on, and a
`P-channel FET of the data side driver IC 4 connected to a
`data electrode of an EL element to not emit light is Switched
`on and an N-channel FET thereof is switched off.
`Because of this, the data electrode of the EL element to
`emit light is grounded, and So the Voltage Vr being a
`threshold Voltage or more is applied to the EL element and
`the EL element emits light. Additionally, the voltage Vm of
`the data electrode of the EL element to not emit light remains
`unchanged at Vm, and a Voltage of Vr-Vim is applied to that
`EL element.
`This voltage of Vr-Vim is lower than the threshold volt
`age; thus, that EL element does not emit light.
`The timing diagram of FIG. 3I shows a state where the
`P-channel FET 41a of the data side driver IC 4 is Switched
`off and the N-channel FET 41b thereof is Switched on, and
`FIG.3J shows a state wherein voltage Vr is applied to the EL
`element 111 and the EL element 111 emits light.
`Thereafter, charge accumulated in the EL element on the
`scan electrode 201 is discharged by Switching off the
`P-channel FET 21a of the scan side driver IC 2 connected to
`the scan electrode 201 of the first column, and Switching on
`the N-channel FET 21b thereof as shown in FIGS. 3C and
`3D.
`Next, the P-channel FET 31a of the scan side driver IC 3
`connected to the scan electrode 301 is turned on, and the
`voltage of the scan electrode 301 is set to Vr as shown in
`FIG. 3H. Additionally, output stage FETs of the scan side
`driver ICs 2 and 3 connected to other scan electrodes are all
`Switched off, and these Scan electrodes enter a floating State.
`Additionally, driving of the EL elements of the second
`column is performed Similarly to the foregoing by Setting the
`voltage levels of the data electrodes 401, 402, 403, etc. to
`levels corresponding to an EL element to emit light and to
`an EL element to not emit light.
`The timing diagram of FIG. 3I shows a state where the
`P-channel FET 41a of the data side driver IC 4 is Switched
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`on, the N-channel FET 41b thereof is Switched off and the
`voltage of the data electrode 401 is Vm, and that of FIG.3K
`shows that voltage Vr-Vim is applied to the EL element 121
`and the EL element 121 does not emit light.
`Thereafter, charge accumulated in the EL element on the
`scan electrode 301 is discharged by Switching off the
`P-channel FET 31a of the Scan side driver IC3 connected to
`the scan electrode 301 of the second column and Switching
`on the N-channel FET 31b thereof.
`Thereafter, line-Sequential Scanning, wherein the above
`described operation is repeated until the final Scan line is
`reached, is performed Similarly.
`In the negative field portion, the Switching elements 52
`and 61 are Switched on, the Switching elements 51 and 62 are
`Switched off, and operation Similar to the operation in the
`positive field is performed with reversed polarity. At this
`time, reference voltage of the scan electrodes 201, 301, 202,
`302, etc. goes to ground. Additionally, the FETs 41b, 42b,
`43b, etc. of the data side driver IC 4 are Switched on, and
`Voltage of the data electrodes is Set to ground. In this State,
`the Voltage applied to all EL elements becomes 0 V, and So
`the EL elements do not emit light.
`Thereafter, line-Sequential Scanning Similar to that done in
`the positive field is performed for the negative field as well.
`-Vr-Vim is applied to the scan electrode of the column
`where display Selection is performed. On the data electrode
`Side, oppositely to the positive field, Voltage of a data
`electrode to emit light is set to Vm, and Voltage of a data
`electrode which is to not emit light is remains at ground.
`Consequently, when Voltage Vm is applied to a data
`electrode with respect to a Scan electrode to which a voltage
`of-Vr--Vim is applied, a voltage of -Vr is applied to an EL
`element corresponding thereto, and the EL element emits
`light. Furthermore, when Voltage of a data electrode is
`ground Voltage, a Voltage of -Vr+Vm, which is lower than
`the threshold Voltage, is applied to the EL element, and So
`the EL element does not emit light.
`Accordingly, one cycle of display operation is completed
`by drive of the above-described positive and negative fields,
`and this is performed repeatedly.
`AS is understood from the above-described operation, a
`voltage of Vr-Vim is applied to the scan side driver ICs 2 and
`3 in both the positive and negative fields. Consequently, the
`necessary breakdown voltage of the Scan Side driver ICS 2
`and 3 can be lowered by an amount corresponding to the
`Second offset Voltage in comparison with prior art devices,
`and breakdown voltage of the scan side driver ICs 2 and 3
`can be reduced.
`Moreover, because a change from offset Voltage Vm to
`voltage Vr for drive use is used in the positive field, the
`Voltage change thereof can be Smaller, peak current flowing
`to the EL element can be lowered, and reliability of the EL
`element can be improved.
`55
`Specific Structures of the Scan Voltage Supply circuit 6 and
`data voltage supply circuit 7 will be described below. A
`circuit where the Switches 51 and 61 can be omitted due to
`utilization of a power source of (Vr-Vm) is shown in FIG.
`4.
`In this Figure, Voltage Supply circuits 5 through 7 are
`provided with a first power source 81 having a voltage of
`Vm and a Second power Source 82 having a Voltage of
`Vr-Vm, and the positive terminal of the first power source
`81 and the negative terminal of the second power source 82
`are connected via a P-channel FET 84 (i.e., a second
`Switching device as recited in the appended claims).
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`Additionally, the positive electrode of the Second power
`source 82 is grounded via an N-channel FET 83 (i.e., a first
`Switching device as recited in the appended claims).
`A control signal is provided to the P-channel FET 84 from
`an input terminal S2 via a coupling capacitor 85, input
`protection Zener diode 86, resistor 87, and filter circuit 88.
`Additionally, a control Signal is provided to the N-channel
`FET 83 from an input terminal S1 via a filter circuit 89.
`When in the positive field, low level control signals are
`provided to both input terminals S1 and S2, and the
`N-channel FET 83 is Switched off and the P-channel FET 84
`is Switched on. At this time, a voltage Vm of the first power
`Source 81 is output from the negative electrode of the Second
`power Source 82 to a negative electrode Voltage Supply line
`L2 as an offset voltage, and a voltage Vr (=Vr-Vm+Vm) is
`output to the positive electrode Voltage Supply line L1 from
`the positive electrode of the second power source 82.
`Additionally, Voltages Vm and 0 V are respectively Sup
`plied to the data side driver IC 4 from the positive and
`negative electrodes of the first power source 81.
`Consequently, the drive Voltage in the positive field is
`created by the above-described Voltages.
`Furthermore, according to the structure shown in FIG. 4,
`a control Signal for Scan Side driver IC drive use is provided
`to the scan side driver ICs 2 and 3 via an isolation circuit (not
`illustrated), and line Sequential Scanning of the Scan side
`driver ICs is performed. The isolation circuit performs a
`level shift at a time of Signal transmission between circuits
`having differing reference potentials, and functions to con
`Vey logic levels correctly.
`Additionally, display data is output according to a control
`signal from the data side driver IC 4.
`In the foregoing first embodiment, lowering of breakdown
`voltage with respect to the scan side driver ICs 2 and 3 was
`provided, but according to a Second preferred embodiment
`of the present invention, lowering of breakdown voltage
`with respect to the data side driver IC 4 as well is provided.
`The overall structure of this embodiment is shown in FIG.
`5.
`In this Figure, the data Voltage Supply circuit 7 Selectively
`outputs four voltages Vm, Vm-V, V, and 0 V in accor
`dance with operation of Switching elements 71 through 74.
`That is to say, in the positive field, Switching elements 72
`and 74 are Switched on and Switching elements 71 and 73 are
`Switched off, and voltages Vm-Vo and 0 V are supplied to
`the data side driver IC 4.
`Herein, the EL element emits li