ee
`
`Third Edition
`
`Fundamentals of
`INGOtne
`MONO)faeatN014004
`
`Solid#State Physics; Fluidics,
`ALGaveriyaeCewMtocosatCepetwtn
`Micro- and Nanotechnology
`
`
`
`Ess
`Marc J. Madou
`
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`T hird Edition
`Fundamentals of
`
`MICROf ABRICATION
`
`�oNANOTECHNOLOGY
`
`VOLUME I
`
`Solid-State Physics, Fluidics,
`
`
`
`and Analytical Techniques in
`Micro-and Nanotechnology
`
`Marc}. Madou
`
`UI CRC Press
`�
`
`Taylor & Francis Group
`loo blon W'ldQI, NewoYorlr
`
`cac Prcu is :in imprint of the
`
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`Orientation and Dopant Dependence
`
`
`of Oxidation Kinetics
`
`CryslOl ls Soll King 241
`that does not
`
`mask and structured ,vith the same mask. It pro­
`
`
`l'or a local oxidation, a material
`allow
`
`
`
`oxygen diffusion at the typical oxidation tempera­
`
`
`
`vided sacrificial Si for the "bird's beak," and the total
`
`
`dimension of the field oxide could be reduced. But
`
`
`tures of 1000-1 I00°C must protect the areas of the
`
`
`even this is not sufficient for feature sizes around
`
`
`Si not to be oxidized. The only material that is used
`N,. It can be
`and below L µm.
`
`
`
`for this purpose is silicon nitride, Si3
`
`The LOCOS process eventually
`
`
`
`deposited and structured easily, and it is compat­
`became a very
`complicated
`
`
`
`ible with Si IC processing. However, Si
`
`
`process in its own right, and with fea­
`intro­
`
`
`theture sizes shrinking ever more, LOCOS reached
`
`duces two major problems when deposited directly
`
`on top of Si. Using a Si3N
`
`4 layer for protecting parts
`
`
`end of its useful lifespan in the 1990s and had to be
`
`
`
`replaced by "box isolation." The idea in box isola­
`
`
`of the Si from thermal oxidation does not prevent
`
`
`
`tion is clear: etch a hole (with vertical sidewalls) in
`
`
`
`
`oxygen diffusion through the oxide already formed
`(lat­
`
`
`the Si wherever you want an oxide, and next simply
`
`
`from oxidizing the Si underneath the Si3
`•fi II* it with oxide.
`
`
`
`eral oxidation). Another major problem is the vol­
`
`
`ume expansion that occurs in Si oxidation, which
`
`expands a given volume of Si so that the nitride
`
`
`mask is then pressed upward at the edges as illus­
`
`
`
`
`trated in Figure 4.33C. With increasing oxidation
`The thermal oxidation rate, as mentioned above, is
`
`
`
`
`
`
`
`time and oxide thickness, pressure under the nitride
`
`
`
`slightly influenced by the orientation of the Si sub­
`
`
`mask increases, and at some point, the critical yield
`
`
`
`
`
`strate. The effect involves the linear oxidation rate
`
`
`
`
`strength of Si is exceeded. Plastic deformation then
`constant
`
`used in the Deal-Grove model in the regime
`
`
`
`starts, and dislocations are generated and move into
`
`
`
`where the surface reaction is rate limiting. This con­
`the Si. Below the edges of the local oxide a high den­
`
`
`4.45.stant was given as 8/A (in µm/h) in Equation
`
`
`
`sity of dislocations may destroy the electronic func­
`
`The ratio of this constant, for a (111) Si plane to that
`
`
`tion under construction. The oxidation step is not
`
`for a (100) Si plane, is given by:
`
`
`
`even necessary to produce the dislocations because
`( 2.0 eV)
`Si3N
`
`
`even at4 layers are always under large stresses
`
`C,(l l l}exp -�
`!(111)
`
`
`room temperature and exert shear stresses on the Si.
`A
`1.68 (4.47)
`
`
`
`The important message is that one cannot deposit
`( 2.0eV)
`!(100)
`
`C,(l00)exp -�
`Si3N4 directly
`on Si.
`A
`
`To save the LOCOS concept, one must introduce
`
`
`Notice that the activation energy for both dry and
`
`
`
`
`the Sioxide between a buffer oxide. A buffer
`
`
`
`
`wet oxidation in the surface reaction limited regime
`
`
`
`mask and the Si substrate relieves the stress build­
`
`
`
`oxidizes about 1.7 timesis 2 eV. ·111us, a (100) surface
`The SiO2 buffer layer acts
`ing up during oxidation.
`
`
`
`more slowly than a {111} surface. ll1e lower oxida­
`the hard Si3N, is now press­
`
`as a •grease" material:
`
`
`tion rate of (100) surfaces might be because of the
`
`
`
`ing down on something "soft," and the stress felt
`
`
`fewer silicon bonds on the surface with which oxy­
`
`by the Si does not reach the yield stress. TI1is way
`
`
`
`gen can react. The available bond density at a (111)
`
`
`one avoids dislocations, but a comparatively large
`
`
`plane equals 11.76 x 1014 cm-2 and 6.77 x 1014 cnr2
`
`
`
`
`lateral oxidation instead results, leading to a con­
`
`
`
`for the (100) plane. The linear oxidation rate for Si
`
`
`figuration known as 'bird's beak" for the obvious
`
`follows the sequence {ll0) > (111) > (311) > (511) >
`
`
`
`
`reason shown in Figure 4.33D. The lateral extension
`
`
`
`(100), corresponding to an increasing activation
`
`of the field oxide via the bird's beak is comparable
`
`
`energy that incorporates a term for the bond density
`
`
`with its thickness and limits the minimum feature
`
`in the plane, as well as one for the bond orienta­
`
`
`
`
`size. Although this was not a serious problem in the
`
`
`
`tion. As might be expected, steric hindrance results
`
`early days of IC technology, it could not be toler­
`
`
`
`in higher activation energy.•
`
`ated beyond the middle of the 1980s. One solution
`
`
`
`In anisotropic wet etching, as we will discover in
`
`
`
`
`was the use of a poly-Si la)'er as a sacrificial layer. It
`
`
`Volume II, Chapter 4, the sequence of the etch rates
`
`was put on top of the buffer oxide below the nitride
`
`N4
`
`
`
`3N4
`
`
`
`Silicon Single
`
`3N4
`
`
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`
`Techniques in Micro· and Nanotechnol242 Solid-State Physics, fluiclics, and Anolytical
`og y
`
`is dimensionally confined. For example, oxidation
`
`
`is mostly reversed compared with that of oxidation.
`
`
`
`
`
`
`
`
`For example, a (l00} plane etches up to 100 times occurring in a confined corner, in which volume
`
`
`
`expansion is more difficult, is different from oxi­
`
`
`faster than a (111) plane. It has been postulated
`
`
`to that the slow etching of a (111) Si plane relative
`
`
`
`
`dation of a flat surface. Retardation of oxidation is
`
`a (1.00) plane may be because of its more efficient
`
`
`
`very strong for sharp corners, i.e., for r small or 1/r
`
`
`
`
`oxidation, protecting it better against etching than
`
`
`
`in some cases). large (e.g., a factor of two retardation
`
`
`Retardation is also more pronounced for lower tem­
`
`
`a (JOO) plane.' In this interpretation-etching being
`
`
`peraLUres, and there are virtually no corner effects
`
`
`an electrochemical process-one assumes that
`
`
`
`observed for l200°C. Interior (concave) corners
`
`
`
`
`anodic oxidation, just like thermal oxidation, will
`
`
`occur faster at a (111) Si surface. To our knowledge,
`
`
`
`show more pronounced retardation effects than
`
`
`exterior (convex) corners.
`
`
`
`no evidence to support this theory has been pre­
`
`
`
`out sented as of yet. Moreover, Seidel et al.6 pointed
`
`
`
`It is important to include stress when simulating
`
`
`
`
`oxide growth in the LOCOS process (see above). Si
`
`
`that the huge anisotropy in wet etching of Si could
`
`
`
`oxidation modeling using ATHENA software pre­
`
`not be credited to the number of bonds available on
`
`
`
`different Si planes, as that number barely differs by
`
`
`dicts the oxide shape much better when stress is
`
`
`
`included as a parameter (http://www.silvaco.com/
`
`
`
`
`a factor of (see Volume Chapter From the
`2
`II,
`4).
`
`
`
`numbers observed, such an explanation could be
`
`
`tech_lib/si mulationstandard/ I 997/aug/a3/a3.html).
`
`In Volume Ill, Chapter 10 we show how oxidation
`
`
`
`valid for the anisotropy in thermal oxidation. 'lbere
`
`
`sharpening is used to make sharp Si needle tips for
`
`
`is no agreement, however, about the exact mecha­
`
`nism, and an understanding of the orientation
`
`
`
`
`scanning tunneling microscopes (STMs) and atomic
`
`
`force microscopes (AFMs; Volume Ill, Figure 10.12}.
`
`
`
`
`dependence of the oxidation rate is still lacking. It
`
`
`
`has been attributed at various times to the number
`Nonthermal Methods for
`
`
`
`
`of Si-Si bonds available for reaction and the orienta•
`
`
`Depositing Si0Films
`
`
`tion of these bonds, the presence of surface steps,
`Thermal oxidation involving the consumption of a
`
`
`
`
`
`
`
`mechanical effects such as stress in the oxide film,
`
`
`
`thin layer of the Si surface results in excellent adhe­
`
`
`and the attainment of maximum coherence across
`the Si/SiO2 interface.• It should also be noted that
`
`
`
`sion and good electrical and mechanical proper­
`
`
`ties. It is an excellent technique when available.
`
`
`
`the oxidation rate sequence depends on temperature
`
`
`
`
`However, the thermal oxidation described in the
`
`
`and oxide thickness-one more reason lo take any
`model with a grain of salt:•
`
`previous section is by no means the only method
`
`
`In Si, n-type dopants (As and I') at high concen­
`
`
`
`available to implement a SiOfilm. Two nomher­
`
`
`
`
`
`
`
`
`trations (11-) lead to increases in oxidation rate, par­mal SiO2 deposition methods include electrochem­
`
`
`
`ticularly at low temperatures. is It is found that
`
`
`ical oxidation of Si and chemical vapor deposition.
`
`
`Electrochemical oxidation of Si has been studied
`
`
`
`
`affected but that remains unaffected. Ho-Plummer
`B
`B/A
`11) but has not
`
`
`(see, e.g., Schmidt'• and Lewerenz
`explained this phenomenon by postulating that
`
`
`
`
`
`
`
`
`
`point defects (vacancies) are being consumed dur­led to commercial usage. Even though these anodic
`
`
`
`oxides are pinhole free, they exhibit many inter­
`
`
`ing the volume expansion that accompanies Si
`
`
`mechanisms face states. Madou et al.12 investigated
`
`
`8T he oxidation rate is changed much less
`oxidation.7·
`
`for anodic oxidation of Si and the introduction
`
`
`
`in case of highly boron-doped (p") wafers. Whereas
`
`
`of oxide 'dopants· into these anodically formed
`
`boron atoms are taken up by the oxide, P and As pile
`
`up at the Si/SiOinterface.'
`
`
`oxides. Such oxide dopants can be used as a source
`
`
`
`for doping of the underlying Si al elevated tempera­
`
`
`
`Oxidation is also influenced by stress. Etched sub­
`
`
`
`
`strates exhibiting shaped structures oxidize at dif­
`
`
`
`
`tures. Further study material on silicon oxidation
`
`
`
`ferent rates than planar wafers. Oxide layers formed
`can be found in Fair13 and Katz.•
`
`
`
`on silicon are under compressive stress, even in the
`
`
`
`Silicon dioxide is frequently used as an insulator
`
`
`planar case, and these stresses can be much larger
`
`
`
`
`between two layers of metallization. In such cases,
`
`some form of deposited oxide must be used rather
`
`
`on curved surfaces because the volume expansion
`
`2
`
`2
`
`2
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`
`
`
`
`Silicon Single Cry,tal 1, S�II King 243
`
`2.2�A t�A
`
`O�e-n
`
`can be pro­than grown oxides. Deposited oxides
`
`
`
`
`
`
`
`duced by various reactions between gaseous silicon
`r--9:.
`
`
`
`
`compounds and gaseous oxidizers. Deposited oxides
`'(
`Si
`'
`Silicon.
`��'1:r--o!l:,-,o�o
`
`
`
`tend to possess low densities and large numbers of
`0 ••••••
`
`
`
`
`defect sites, meaning they are not suitable for use as
`
`
`gate dielectrics for MOS transistors but are accept­
`(a)
`
`
`
`able for use as insulating layers between multiple
`
`
`
`conductor layers or as protective overcoats.
`
`
`For deposition of oxides at lower temperatures,
`
`we will learn in much more detail in Volume II,
`
`
`Chapter 7 that one may use low-pressure chemical
`
`
`vapor deposition (LPCVD), such as in the following
`reaction:
`
`\
`
`Cr.<
`
`0
`
`(h)
`
`SiH, + 02 ➔ SiO2 + 2 H2
`: 450°C Reaction 4.3
`
`(<)
`FIGURE 4.34 (a) Basic structural unit of silicon diox­
`
`
`
`
`Another advantage, besides the lower temperature,
`
`
`ide. (b) Two-dimensional representation of a quartz
`
`
`
`crystal lattice. (c) Two-dimensional representation
`
`is the fact that one can dope an Ll'CVD silicon oxide
`
`
`
`of the amorphous structure of silicon dioxide.
`
`
`
`licate film easily to create, for example, a phosphosi
`
`of the reasons for the poor performance of silicon
`
`
`glass ( PSG):
`
`
`
`dioxide-based ion-sensitive field-effect ttansistors
`: P 5 H2O: 700°C
`
`
`
`
`(ISFE1s) in aqueous solutions can be traced back
`
`Reaction 4.4
`
`
`to the simple observation that SiO
`in water almost
`
`
`
`behaves like a sponge for ions." This is why, in such
`Phosphorus-doped glass, also called
`
`
`/>-glass or PSG,
`is often topped off with the ionic bar­
`
`devices, SiO
`
`
`
`and borophosphosilicate glasses (BPSGs) soften and
`of SiO2 as a diffusion
`
`rier material Si3N.,. The use
`
`
`flow at lower temperatures, enabling the smooth­
`is easy to
`
`
`ing of topography. They etch much faster than
`
`mask often stems from convenience; SiO
`
`
`cannot be put directly onto Si
`
`grow, whereas Si
`
`
`as sacrificial SiO2, which benefits their application
`
`
`
`material in surface micromachining (see Volume 11,
`
`without problems.
`The quality of silicon dioxide depends heavily on
`
`
`
`
`
`Chapter 7).
`
`
`its growth method. Dr)• oxidation al high temper­
`Properties of Thermally
`
`
`( between 900 and I 150°C) in pure oxygen
`alUres
`
`
`
`produces a better quality oxide than steam oxida­
`
`
`A film of thermal SiO, performs excellently as a
`
`
`
`tion. Such a thermal oxide is stoichiometric, has a
`
`
`
`mask against diffusion of the common dopants in
`D, of boron at 900°C in
`
`
`
`
`high density, and is basically pinhole free. Wet oxi­
`
`Si. The diffusion coefficient,
`with 4.4 x 10·16
`1• cm2/s compared
`SiO2 is 2.2 x 10-
`
`
`
`dation in steam occurs much faster but produces a
`
`
`
`
`lesser quality oxide, with water causing a loosening
`9.3 x 10·" cm2/s
`
`in Si. For phosphorus, D equals
`
`
`effect on the Si 02
`, making it more prone to impurity
`
`compared with 7.7 x 10-•s
`in Si (from the common
`
`
`
`Si dopants, only Ga diffuses fast through the oxide
`
`
`
`diffusion. Both types of oxidation are carried out in
`
`
`
`a quartz tube. Oxide thicknesses of a few tenths of a
`
`
`elements, with D = 1.3 x IO·"). For some other
`SiO
`
`
`forms a poor diffusion barrier. The amor­
`
`
`
`micrometer are used most frequently, with 1-2 µm
`
`being the upper limit for conventional thermal
`phous oxide has a more open structure than crys­
`
`
`
`oxides. Addition of chlorine-containing chemicals
`
`
`
`talline quartz-only 43% of the space is occupied
`
`
`
`
`(see Figure 4.34). Consequently, a wide variety of
`
`
`
`
`during oxidation increases the dielectric breakdown
`
`
`strength and the rate of oxidation while also improv­
`
`
`
`impurities (especially alkali ions such as Na· and
`ing the threshold voltage of many electronic devices.15
`
`
`
`
`K·} can readily diffuse through amorphous SiO
`2.
`
`the open SiO2 structure hap­
`
`
`
`However, too high concentrations of halogens at
`
`Diffusion through
`
`
`
`high temperatures can pit the silicon surface. The
`
`
`pens especially fast when the oxide is hydrated. One
`
`Grown 5i02
`
`2
`
`2
`
`3N4
`
`
`
`2
`
`
`2 PH3 ➔ SiO2
`SiH, 7/2 02
`
`
`
`+
`
`+
`
`+
`
`2
`
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`
`
`244 Solid-State Physics, Fluidics, and Analytical Techniques in Micro· and Nonotechnol
`og y
`
`reach hundreds of MPa. Oxide films thicker than
`
`
`influence of chlorine, hydrogen, and other gases on
`
`
`
`the SiO2 growth rate and the resulting
`I µm can cause bowing of the Si wafer. Wet oxida­
`
`
`interface and
`
`
`
`tion relaxes the compressive stress while speeding
`
`
`
`oxide quality has been a fertile research field, a short
`
`up the SiO2 growth.
`summary of which can be found in Fair.13 It should
`
`In Table 4.8, we review some of the more signifi­
`
`be noted that for the IC industry, the electronic
`
`
`
`
`quality of the Si/SiO, interface is expressed through
`
`cant properties of thermally grown SiO,. The oxide
`
`
`
`low concentrations of interface trap states, low
`
`
`
`is characterized by a variety of means reviewed in
`
`
`
`Volume Ill, Chapter 6 on metrology. Electrical tests
`
`
`6xed oxide surface charges, low bulk oxide trapped
`
`
`
`are conducted to establish the capacitance (CV)
`
`
`
`charges, and mobile charges (impurity ions such as
`
`
`
`quality is Li•, Na•, K•) (Figure 4.35);16 the interface
`
`
`at high and low frequencies 10 calculate the inter­
`
`
`
`of li11le consequence in micromachining. In micro­
`
`
`
`
`face density, to measure dielectric breakdown, and
`
`
`machining, the oxide is used as a structural element,
`
`
`
`for electrical stressing (with temperature ramp).
`
`
`
`a sacrificial layer, or a dielectric in a passive device,
`
`
`
`Optical tests are carried out for thickness and opti­
`
`
`cal constant determination using color (see Table
`
`
`
`
`
`applications where the interface quality rarely mat­
`
`
`ters. One notable exception is the aforementioned
`
`
`
`
`and 4.7), interferometry (needs calibrated substrate),
`
`
`
`ellipsometry. Physical tests for thickness, surface
`
`
`
`micromachined ISFEl: where the electronic p,·op­
`
`
`
`
`quality, etc. involve profilometry, Ah"1, and cross­
`
`erties of the gate oxide are key to its functioning;
`
`
`a perfect oxide and oxide/semiconductor interface
`
`
`sections by scanning electron microscopy (SEM)/
`
`
`
`transmission electron microscopy (TEM).
`
`hold as much importance in this case as it does in
`the IC industry.
`
`Oxidation furnaces may be purchased from
`
`
`Because of molecular volume mismatch and ther­
`
`
`Thermcraft (h11p://www.1hermcraf1inc.com/pro6le.
`
`
`
`html) and 1ystar (h11p://www.1ys1ar.com) (which
`
`
`
`
`mal expansion differences, a thermal silicon oxide is
`
`
`
`compressed. ·me compressive stress depends on the
`
`
`
`makes 1ytan Horizontal Furnace Systems; hllp://
`www.1ys1ar.com/furnace.htm).
`
`
`
`total thickness of the silicon dioxide layer and can
`
`o,;
`
`.0 : · Mobile kink
`+ + + +
`,•. d,irgeQ,..
`.
`+ + + +
`Bulk ocbid� trap1>ed
`chatge�
`
`•·
`
`Oistance(z)-
`
`lntt:rfuce trap
`
`.states
`2)
`(N11 - IOIS/e,,n
`
`(b) Fixed oxide surfa«
`
`chargt$ (Ne-2x 1011/cm1)
`for dt)' 02 al I H:XYC
`
`lrralmtnl and
`1 forw(I
`N, ..... 2:x 101
`(1-120 at L Locrc
`l�lmtnl)
`
`(c)Mobile impurity ions
`
`(ll•,Na•,K•)
`(Nm. < I012ions)
`
`(d) Chargt"S trappt-d in
`tht bulk oxide
`(Not. nUli)' be positive
`
`or negative)
`
`
`
`
`
`FIGURE 4.35 Location of oxide charges in thermally oxidized silicon structures as defined by Bruce Deal. Q1 and Q11 are
`
`
`
`much lower for (100) silicon than for (111).
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`

`

`
`
`TABLE 4.8 Properties of Thermal Si0,
`
`
`Property
`
`
`
`Silicon Single Cry,tal
`1, S�II King 245
`
`
`
`Si-Based Electronic Devices
`
`
`
`Density (g/cm')
`
`Value
`
`2.24-2.27 (dry) and
`
`2.18-2.20 (wet)
`Oielectric constant 3.8-3.9
`
`
`
`Dielectric strength {V/cm) 2 x 10• {dry) and 3 x 10•
`(wet)
`-8
`1000
`
`Introduction
`The following active electronic devices will be
`
`
`
`
`
`
`
`reviewed in this section: diodes, special-purpose
`
`
`
`diodes jincluding light-emitting diodes (LEDs), pho­
`
`
`
`
`todiodes, solar cells, Zener diodes, avalanche diodes,
`Energy gap (eV)
`
`
`
`
`and tunneling (Esaki) diodes!, and two types of tran­
`
`Etch rate in buffered HF
`(A/min)
`
`
`
`sistors (bipolar and MOSFE1'). Si and Ce are the two
`Infrared absorption peak (µm) 9.3
`
`
`
`
`most common single elements that are used to make
`
`Meltina point ('C)
`-1700
`
`
`diodes. A compound semiconductor that is commonly
`60.08
`
`Molecular weight
`
`used is CaAs, especially in the case of LEDs because
`3
`2.3 X 1QU
`Molecules/cm
`
`
`
`of its large direct bandgap. We analyze in some detail
`
`Refractive index
`1.46
`
`
`
`the scaling issues involved in the further miniaturiza­
`
`Resistivity at 25'C {1km) 3 x 10" (dry) and
`3-5 x 10" (wel)
`
`tion of Si MOSFETs, and in this context we introduce
`Specific heat (J/g'CJ
`
`1.0
`
`
`
`strained Si, which expands the prospect of continued
`
`
`Stress in film on Si (dyne/cm')
`2-4 x 10• (compressive)
`
`
`Si use. Fundamental limits to MOSFET downscaling
`Thermal conductivity 0.014
`
`
`
`include not only electromagnetic, quantum mechani­
`/yV/cm°C)
`
`cal, and thermodynamic effects but also technical
`Thermal linear expansion s x 10-1 (0.5 ppmf'C)
`
`('C-0)
`coefficient
`
`
`and economic (practical) considerations. In the cur­
`
`
`rent volume Chapters 3 and 5 on quantum mechan­
`
`ics, and photonics, respectively and in Volume 111,
`
`The End of the Line for SiO?
`
`
`
`Chapter 3 on nanotechnology, alternative device oper­
`
`
`In the following sections we learn about the gate
`
`
`
`ating principles that exploit the quantization effects,
`
`
`
`oxide thickness crisis. 'Jhe projected gate oxide
`
`
`rather than being hampered by them, are investigated.
`
`
`in thickness for 70 nm CMOS of 10-15 A results
`
`
`
`
`These approaches include quantum wells, quantum
`
`
`
`
`
`large tunneling currents (see Chapter 3) through the
`
`
`
`
`
`wires, quantum dots, resonant tunneling diodes and
`
`
`
`for ther­oxide. is a challenge 10 find a replacement
`
`
`
`transistors, superlattices, and molecular electronics.
`It
`
`
`mal silicon dioxide with comparable dielectric prop­
`
`
`
`
`
`erties. Oxides ,vith high dielectric constant E, >> 3.9
`Diodes
`
`
`are most desirable. Possible 1 replacements
`
`
`Many semiconductor devices are based on the proper­
`Si0
`
`
`
`developed at present are silicon oxynitride (SiO,N,),
`
`
`
`
`ties of the junction between p-type and n-type semi­
`Al2O3, Ta,O5, and Hf and Zr silicates.
`
`
`
`conductors (Figure 4.36). Russell Kohl at Bell Labs
`
`2
`
`n
`
`ta)
`
`♦
`-
`..
`
`v,
`I
`
`n
`
`-·•
`-:�
`f-<to-1
`(b)
`
`V(x)
`
`tel
`
`1.,.� �1,i(t
`
`X
`
`(d)
`
`FIGURE 4.36 (a) p and n semiconductor before majority carriers cross the junction. (b) Motions of majority charge carri�
`
`
`
`
`
`
`
`
`
`
`ers across the junction uncover two space�charge layers associated with uncompensated donor ions (to the right of the
`
`
`
`
`
`plane) and acceptors ions {to the left). {cl Associated with the space charge is a contact potential difference
`V0, which
`
`
`
`
`
`
`
`
`
`acts to limit the flow of majority carriers. (d) The diffusion of majority carriers across the junction produces a diffusion
`
`
`
`
`
`
`current, ldat• The small concentration of minority carriers on either side of the junction moves in the opposite direction of
`rise to a drift current, /drifl· In an isolated
`the majority carriers, giving
`
`
`
`
`junction, the diffusion current is compensated for
`
`
`
`
`by the drift current, with the result that the net current through the junction is zero.
`
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`Samsung v. Solas - IPR2020-00140
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